3 This document describes the Linux kernel Makefiles.
9 === 3 The kbuild Makefiles
10 --- 3.1 Goal definitions
11 --- 3.2 Built-in object goals - obj-y
12 --- 3.3 Loadable module goals - obj-m
13 --- 3.4 Objects which export symbols
14 --- 3.5 Library file goals - lib-y
15 --- 3.6 Descending down in directories
16 --- 3.7 Compilation flags
17 --- 3.8 Command line dependency
18 --- 3.9 Dependency tracking
19 --- 3.10 Special Rules
21 === 4 Host Program support
22 --- 4.1 Simple Host Program
23 --- 4.2 Composite Host Programs
24 --- 4.3 Defining shared libraries
25 --- 4.4 Using C++ for host programs
26 --- 4.5 Controlling compiler options for host programs
27 --- 4.6 When host programs are actually built
29 === 5 Kbuild clean infrastructure
31 === 6 Architecture Makefiles
32 --- 6.1 Set variables to tweak the build to the architecture
33 --- 6.2 Add prerequisites to prepare:
34 --- 6.3 List directories to visit when descending
35 --- 6.4 Architecture specific boot images
36 --- 6.5 Building non-kbuild targets
37 --- 6.6 Commands useful for building a boot image
38 --- 6.7 Custom kbuild commands
40 === 7 Kbuild Variables
41 === 8 Makefile language
47 The Makefiles have five parts:
49 Makefile the top Makefile.
50 .config the kernel configuration file.
51 arch/$(ARCH)/Makefile the arch Makefile.
52 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
53 kbuild Makefiles there are about 500 of these.
55 The top Makefile reads the .config file, which comes from the kernel
56 configuration process.
58 The top Makefile is responsible for building two major products: vmlinux
59 (the resident kernel image) and modules (any module files).
60 It builds these goals by recursively descending into the subdirectories of
61 the kernel source tree.
62 The list of subdirectories which are visited depends upon the kernel
63 configuration. The top Makefile textually includes an arch Makefile
64 with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
65 architecture-specific information to the top Makefile.
67 Each subdirectory has a kbuild Makefile which carries out the commands
68 passed down from above. The kbuild Makefile uses information from the
69 .config file to construct various file lists used by kbuild to build
70 any built-in or modular targets.
72 scripts/Makefile.* contains all the definitions/rules etc. that
73 are used to build the kernel based on the kbuild makefiles.
78 People have four different relationships with the kernel Makefiles.
80 *Users* are people who build kernels. These people type commands such as
81 "make menuconfig" or "make". They usually do not read or edit
82 any kernel Makefiles (or any other source files).
84 *Normal developers* are people who work on features such as device
85 drivers, file systems, and network protocols. These people need to
86 maintain the kbuild Makefiles for the subsystem that they are
87 working on. In order to do this effectively, they need some overall
88 knowledge about the kernel Makefiles, plus detailed knowledge about the
89 public interface for kbuild.
91 *Arch developers* are people who work on an entire architecture, such
92 as sparc or ia64. Arch developers need to know about the arch Makefile
93 as well as kbuild Makefiles.
95 *Kbuild developers* are people who work on the kernel build system itself.
96 These people need to know about all aspects of the kernel Makefiles.
98 This document is aimed towards normal developers and arch developers.
101 === 3 The kbuild Makefiles
103 Most Makefiles within the kernel are kbuild Makefiles that use the
104 kbuild infrastructure. This chapter introduce the syntax used in the
107 Section 3.1 "Goal definitions" is a quick intro, further chapters provide
108 more details, with real examples.
110 --- 3.1 Goal definitions
112 Goal definitions are the main part (heart) of the kbuild Makefile.
113 These lines define the files to be built, any special compilation
114 options, and any subdirectories to be entered recursively.
116 The most simple kbuild makefile contains one line:
121 This tell kbuild that there is one object in that directory named
122 foo.o. foo.o will be built from foo.c or foo.S.
124 If foo.o shall be built as a module, the variable obj-m is used.
125 Therefore the following pattern is often used:
128 obj-$(CONFIG_FOO) += foo.o
130 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
131 If CONFIG_FOO is neither y nor m, then the file will not be compiled
134 --- 3.2 Built-in object goals - obj-y
136 The kbuild Makefile specifies object files for vmlinux
137 in the lists $(obj-y). These lists depend on the kernel
140 Kbuild compiles all the $(obj-y) files. It then calls
141 "$(LD) -r" to merge these files into one built-in.o file.
142 built-in.o is later linked into vmlinux by the parent Makefile.
144 The order of files in $(obj-y) is significant. Duplicates in
145 the lists are allowed: the first instance will be linked into
146 built-in.o and succeeding instances will be ignored.
148 Link order is significant, because certain functions
149 (module_init() / __initcall) will be called during boot in the
150 order they appear. So keep in mind that changing the link
151 order may e.g. change the order in which your SCSI
152 controllers are detected, and thus you disks are renumbered.
155 #drivers/isdn/i4l/Makefile
156 # Makefile for the kernel ISDN subsystem and device drivers.
157 # Each configuration option enables a list of files.
158 obj-$(CONFIG_ISDN) += isdn.o
159 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
161 --- 3.3 Loadable module goals - obj-m
163 $(obj-m) specify object files which are built as loadable
166 A module may be built from one source file or several source
167 files. In the case of one source file, the kbuild makefile
168 simply adds the file to $(obj-m).
171 #drivers/isdn/i4l/Makefile
172 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
174 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
176 If a kernel module is built from several source files, you specify
177 that you want to build a module in the same way as above.
179 Kbuild needs to know which the parts that you want to build your
180 module from, so you have to tell it by setting an
181 $(<module_name>-objs) variable.
184 #drivers/isdn/i4l/Makefile
185 obj-$(CONFIG_ISDN) += isdn.o
186 isdn-objs := isdn_net_lib.o isdn_v110.o isdn_common.o
188 In this example, the module name will be isdn.o. Kbuild will
189 compile the objects listed in $(isdn-objs) and then run
190 "$(LD) -r" on the list of these files to generate isdn.o.
192 Kbuild recognises objects used for composite objects by the suffix
193 -objs, and the suffix -y. This allows the Makefiles to use
194 the value of a CONFIG_ symbol to determine if an object is part
195 of a composite object.
199 obj-$(CONFIG_EXT2_FS) += ext2.o
200 ext2-y := balloc.o bitmap.o
201 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o
203 In this example xattr.o is only part of the composite object
204 ext2.o, if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'.
206 Note: Of course, when you are building objects into the kernel,
207 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
208 kbuild will build an ext2.o file for you out of the individual
209 parts and then link this into built-in.o, as you would expect.
211 --- 3.4 Objects which export symbols
213 No special notation is required in the makefiles for
214 modules exporting symbols.
216 --- 3.5 Library file goals - lib-y
218 Objects listed with obj-* are used for modules or
219 combined in a built-in.o for that specific directory.
220 There is also the possibility to list objects that will
221 be included in a library, lib.a.
222 All objects listed with lib-y are combined in a single
223 library for that directory.
224 Objects that are listed in obj-y and additional listed in
225 lib-y will not be included in the library, since they will anyway
227 For consistency objects listed in lib-m will be included in lib.a.
229 Note that the same kbuild makefile may list files to be built-in
230 and to be part of a library. Therefore the same directory
231 may contain both a built-in.o and a lib.a file.
234 #arch/i386/lib/Makefile
235 lib-y := checksum.o delay.o
237 This will create a library lib.a based on checksum.o and delay.o.
238 For kbuild to actually recognize that there is a lib.a being build
239 the directory shall be listed in libs-y.
240 See also "6.3 List directories to visit when descending".
242 Usage of lib-y is normally restricted to lib/ and arch/*/lib.
244 --- 3.6 Descending down in directories
246 A Makefile is only responsible for building objects in its own
247 directory. Files in subdirectories should be taken care of by
248 Makefiles in these subdirs. The build system will automatically
249 invoke make recursively in subdirectories, provided you let it know of
252 To do so obj-y and obj-m are used.
253 ext2 lives in a separate directory, and the Makefile present in fs/
254 tells kbuild to descend down using the following assignment.
258 obj-$(CONFIG_EXT2_FS) += ext2/
260 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
261 the corresponding obj- variable will be set, and kbuild will descend
262 down in the ext2 directory.
263 Kbuild only uses this information to decide that it needs to visit
264 the directory, it is the Makefile in the subdirectory that
265 specifies what is modules and what is built-in.
267 It is good practice to use a CONFIG_ variable when assigning directory
268 names. This allows kbuild to totally skip the directory if the
269 corresponding CONFIG_ option is neither 'y' nor 'm'.
271 --- 3.7 Compilation flags
273 EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS, EXTRA_ARFLAGS
275 All the EXTRA_ variables apply only to the kbuild makefile
276 where they are assigned. The EXTRA_ variables apply to all
277 commands executed in the kbuild makefile.
279 $(EXTRA_CFLAGS) specifies options for compiling C files with
283 # drivers/sound/emu10k1/Makefile
284 EXTRA_CFLAGS += -I$(obj)
286 EXTRA_CFLAGS += -DEMU10K1_DEBUG
290 This variable is necessary because the top Makefile owns the
291 variable $(CFLAGS) and uses it for compilation flags for the
294 $(EXTRA_AFLAGS) is a similar string for per-directory options
295 when compiling assembly language source.
298 #arch/x86_64/kernel/Makefile
299 EXTRA_AFLAGS := -traditional
302 $(EXTRA_LDFLAGS) and $(EXTRA_ARFLAGS) are similar strings for
303 per-directory options to $(LD) and $(AR).
306 #arch/m68k/fpsp040/Makefile
311 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
314 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
315 part has a literal value which specifies the file that it is for.
318 # drivers/scsi/Makefile
319 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
320 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
322 CFLAGS_seagate.o = -DARBITRATE -DPARITY -DSEAGATE_USE_ASM
324 These three lines specify compilation flags for aha152x.o,
325 gdth.o, and seagate.o
327 $(AFLAGS_$@) is a similar feature for source files in assembly
331 # arch/arm/kernel/Makefile
332 AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR) -traditional
333 AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR) -traditional
335 --- 3.9 Dependency tracking
337 Kbuild tracks dependencies on the following:
338 1) All prerequisite files (both *.c and *.h)
339 2) CONFIG_ options used in all prerequisite files
340 3) Command-line used to compile target
342 Thus, if you change an option to $(CC) all affected files will
345 --- 3.10 Special Rules
347 Special rules are used when the kbuild infrastructure does
348 not provide the required support. A typical example is
349 header files generated during the build process.
350 Another example is the architecture specific Makefiles which
351 needs special rules to prepare boot images etc.
353 Special rules are written as normal Make rules.
354 Kbuild is not executing in the directory where the Makefile is
355 located, so all special rules shall provide a relative
356 path to prerequisite files and target files.
358 Two variables are used when defining special rules:
361 $(src) is a relative path which points to the directory
362 where the Makefile is located. Always use $(src) when
363 referring to files located in the src tree.
366 $(obj) is a relative path which points to the directory
367 where the target is saved. Always use $(obj) when
368 referring to generated files.
371 #drivers/scsi/Makefile
372 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
373 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
375 This is a special rule, following the normal syntax
377 The target file depends on two prerequisite files. References
378 to the target file are prefixed with $(obj), references
379 to prerequisites are referenced with $(src) (because they are not
383 === 4 Host Program support
385 Kbuild supports building executables on the host for use during the
387 Two steps are required in order to use a host executable.
389 The first step is to tell kbuild that a host program exists. This is
390 done utilising the variable host-prog.
392 The second step is to add an explicit dependency to the executable.
393 This can be done in two ways. Either add the dependency in a rule,
394 or utilise the variable $(always).
395 Both possibilities are described in the following.
397 --- 4.1 Simple Host Program
399 In some cases there is a need to compile and run a program on the
400 computer where the build is running.
401 The following line tells kbuild that the program bin2hex shall be
402 built on the build host.
405 host-progs := bin2hex
407 Kbuild assumes in the above example that bin2hex is made from a single
408 c-source file named bin2hex.c located in the same directory as
411 --- 4.2 Composite Host Programs
413 Host programs can be made up based on composite objects.
414 The syntax used to define composite objects for host programs is
415 similar to the syntax used for kernel objects.
416 $(<executeable>-objs) list all objects used to link the final
420 #scripts/lxdialog/Makefile
421 host-progs := lxdialog
422 lxdialog-objs := checklist.o lxdialog.o
424 Objects with extension .o are compiled from the corresponding .c
425 files. In the above example checklist.c is compiled to checklist.o
426 and lxdialog.c is compiled to lxdialog.o.
427 Finally the two .o files are linked to the executable, lxdialog.
428 Note: The syntax <executable>-y is not permitted for host-programs.
430 --- 4.3 Defining shared libraries
432 Objects with extension .so are considered shared libraries, and
433 will be compiled as position independent objects.
434 Kbuild provides support for shared libraries, but the usage
436 In the following example the libkconfig.so shared library is used
437 to link the executable conf.
440 #scripts/kconfig/Makefile
442 conf-objs := conf.o libkconfig.so
443 libkconfig-objs := expr.o type.o
445 Shared libraries always require a corresponding -objs line, and
446 in the example above the shared library libkconfig is composed by
447 the two objects expr.o and type.o.
448 expr.o and type.o will be built as position independent code and
449 linked as a shared library libkconfig.so. C++ is not supported for
452 --- 4.4 Using C++ for host programs
454 kbuild offers support for host programs written in C++. This was
455 introduced solely to support kconfig, and is not recommended
459 #scripts/kconfig/Makefile
461 qconf-cxxobjs := qconf.o
463 In the example above the executable is composed of the C++ file
464 qconf.cc - identified by $(qconf-cxxobjs).
466 If qconf is composed by a mixture of .c and .cc files, then an
467 additional line can be used to identify this.
470 #scripts/kconfig/Makefile
472 qconf-cxxobjs := qconf.o
473 qconf-objs := check.o
475 --- 4.5 Controlling compiler options for host programs
477 When compiling host programs, it is possible to set specific flags.
478 The programs will always be compiled utilising $(HOSTCC) passed
479 the options specified in $(HOSTCFLAGS).
480 To set flags that will take effect for all host programs created
481 in that Makefile use the variable HOST_EXTRACFLAGS.
484 #scripts/lxdialog/Makefile
485 HOST_EXTRACFLAGS += -I/usr/include/ncurses
487 To set specific flags for a single file the following construction
491 #arch/ppc64/boot/Makefile
492 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
494 It is also possible to specify additional options to the linker.
497 #scripts/kconfig/Makefile
498 HOSTLOADLIBES_qconf := -L$(QTDIR)/lib
500 When linking qconf it will be passed the extra option "-L$(QTDIR)/lib".
502 --- 4.6 When host programs are actually built
504 Kbuild will only build host-programs when they are referenced
506 This is possible in two ways:
508 (1) List the prerequisite explicitly in a special rule.
511 #drivers/pci/Makefile
512 host-progs := gen-devlist
513 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
514 ( cd $(obj); ./gen-devlist ) < $<
516 The target $(obj)/devlist.h will not be built before
517 $(obj)/gen-devlist is updated. Note that references to
518 the host programs in special rules must be prefixed with $(obj).
521 When there is no suitable special rule, and the host program
522 shall be built when a makefile is entered, the $(always)
523 variable shall be used.
526 #scripts/lxdialog/Makefile
527 host-progs := lxdialog
528 always := $(host-progs)
530 This will tell kbuild to build lxdialog even if not referenced in
533 === 5 Kbuild clean infrastructure
535 "make clean" deletes most generated files in the src tree where the kernel
536 is compiled. This includes generated files such as host programs.
537 Kbuild knows targets listed in $(host-progs), $(always), $(extra-y) and
538 $(targets). They are all deleted during "make clean".
539 Files matching the patterns "*.[oas]", "*.ko", plus some additional files
540 generated by kbuild are deleted all over the kernel src tree when
541 "make clean" is executed.
543 Additional files can be specified in kbuild makefiles by use of $(clean-files).
546 #drivers/pci/Makefile
547 clean-files := devlist.h classlist.h
549 When executing "make clean", the two files "devlist.h classlist.h" will
550 be deleted. Kbuild knows that files specified by $(clean-files) are
551 located in the same directory as the makefile.
553 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
554 but in the architecture makefiles where the kbuild infrastructure
555 is not sufficient this sometimes needs to be explicit.
558 #arch/i386/boot/Makefile
559 subdir- := compressed/
561 The above assignment instructs kbuild to descend down in the
562 directory compressed/ when "make clean" is executed.
564 To support the clean infrastructure in the Makefiles that builds the
565 final bootimage there is an optional target named archclean:
570 $(Q)$(MAKE) $(clean)=arch/i386/boot
572 When "make clean" is executed, make will descend down in arch/i386/boot,
573 and clean as usual. The Makefile located in arch/i386/boot/ may use
574 the subdir- trick to descend further down.
576 Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
577 included in the top level makefile, and the kbuild infrastructure
578 is not operational at that point.
580 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
581 be visited during "make clean".
583 === 6 Architecture Makefiles
585 The top level Makefile sets up the environment and does the preparation,
586 before starting to descend down in the individual directories.
587 The top level makefile contains the generic part, whereas the
588 arch/$(ARCH)/Makefile contains what is required to set-up kbuild
589 to the said architecture.
590 To do so arch/$(ARCH)/Makefile sets a number of variables, and defines
593 When kbuild executes the following steps are followed (roughly):
594 1) Configuration of the kernel => produced .config
595 2) Store kernel version in include/linux/version.h
596 3) Symlink include/asm to include/asm-$(ARCH)
597 4) Updating all other prerequisites to the target prepare:
598 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
599 5) Recursively descend down in all directories listed in
600 init-* core* drivers-* net-* libs-* and build all targets.
601 - The value of the above variables are extended in arch/$(ARCH)/Makefile.
602 6) All object files are then linked and the resulting file vmlinux is
603 located at the root of the src tree.
604 The very first objects linked are listed in head-y, assigned by
605 arch/$(ARCH)/Makefile.
606 7) Finally the architecture specific part does any required post processing
607 and builds the final bootimage.
608 - This includes building boot records
609 - Preparing initrd images and the like
612 --- 6.1 Set variables to tweak the build to the architecture
614 LDFLAGS Generic $(LD) options
616 Flags used for all invocations of the linker.
617 Often specifying the emulation is sufficient.
621 LDFLAGS := -m elf_s390
622 Note: EXTRA_LDFLAGS and LDFLAGS_$@ can be used to further customise
623 the flags used. See chapter 7.
625 LDFLAGS_MODULE Options for $(LD) when linking modules
627 LDFLAGS_MODULE is used to set specific flags for $(LD) when
628 linking the .ko files used for modules.
629 Default is "-r", for relocatable output.
631 LDFLAGS_vmlinux Options for $(LD) when linking vmlinux
633 LDFLAGS_vmlinux is used to specify additional flags to pass to
634 the linker when linking the final vmlinux.
635 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
639 LDFLAGS_vmlinux := -e stext
641 LDFLAGS_BLOB Options for $(LD) when linking the initramfs blob
643 The image used for initramfs is made during the build process.
644 LDFLAGS_BLOB is used to specify additional flags to be used when
645 creating the initramfs_data.o file.
648 LDFLAGS_BLOB := --format binary --oformat elf32-i386
650 OBJCOPYFLAGS objcopy flags
652 When $(call if_changed,objcopy) is used to translate a .o file,
653 then the flags specified in OBJCOPYFLAGS will be used.
654 $(call if_changed,objcopy) is often used to generate raw binaries on
659 OBJCOPYFLAGS := -O binary
661 #arch/s390/boot/Makefile
662 $(obj)/image: vmlinux FORCE
663 $(call if_changed,objcopy)
665 In this example the binary $(obj)/image is a binary version of
666 vmlinux. The usage of $(call if_changed,xxx) will be described later.
668 AFLAGS $(AS) assembler flags
670 Default value - see top level Makefile
671 Append or modify as required per architecture.
674 #arch/sparc64/Makefile
675 AFLAGS += -m64 -mcpu=ultrasparc
677 CFLAGS $(CC) compiler flags
679 Default value - see top level Makefile
680 Append or modify as required per architecture.
682 Often the CFLAGS variable depends on the configuration.
686 cflags-$(CONFIG_M386) += -march=i386
687 CFLAGS += $(cflags-y)
689 Many arch Makefiles dynamically run the target C compiler to
690 probe supported options:
693 check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc \
694 /dev/null\ > /dev/null 2>&1; then echo "$(1)"; \
695 else echo "$(2)"; fi)
696 cflags-$(CONFIG_MCYRIXIII) += $(call check_gcc,\
697 -march=c3,-march=i486)
699 CFLAGS += $(cflags-y)
701 The above examples both utilise the trick that a config option expands
702 to 'y' when selected.
704 CFLAGS_KERNEL $(CC) options specific for built-in
706 $(CFLAGS_KERNEL) contains extra C compiler flags used to compile
707 resident kernel code.
709 CFLAGS_MODULE $(CC) options specific for modules
711 $(CFLAGS_MODULE) contains extra C compiler flags used to compile code
712 for loadable kernel modules.
715 --- 6.2 Add prerequisites to prepare:
717 The prepare: rule is used to list prerequisites that needs to be
718 built before starting to descend down in the subdirectories.
719 This is usual header files containing assembler constants.
723 prepare: include/asm-$(ARCH)/offsets.h
725 In this example the file include/asm-$(ARCH)/offsets.h will
726 be built before descending down in the subdirectories.
727 See also chapter XXX-TODO that describe how kbuild supports
728 generating offset header files.
731 --- 6.3 List directories to visit when descending
733 An arch Makefile cooperates with the top Makefile to define variables
734 which specify how to build the vmlinux file. Note that there is no
735 corresponding arch-specific section for modules; the module-building
736 machinery is all architecture-independent.
739 head-y, init-y, core-y, libs-y, drivers-y, net-y
741 $(head-y) list objects to be linked first in vmlinux.
742 $(libs-y) list directories where a lib.a archive can be located.
743 The rest list directories where a built-in.o object file can be located.
745 $(init-y) objects will be located after $(head-y).
746 Then the rest follows in this order:
747 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
749 The top level Makefile define values for all generic directories,
750 and arch/$(ARCH)/Makefile only adds architecture specific directories.
753 #arch/sparc64/Makefile
754 core-y += arch/sparc64/kernel/
755 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
756 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
759 --- 6.4 Architecture specific boot images
761 An arch Makefile specifies goals that take the vmlinux file, compress
762 it, wrap it in bootstrapping code, and copy the resulting files
763 somewhere. This includes various kinds of installation commands.
764 The actual goals are not standardized across architectures.
766 It is common to locate any additional processing in a boot/
767 directory below arch/$(ARCH)/.
769 Kbuild does not provide any smart way to support building a
770 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
771 call make manually to build a target in boot/.
773 The recommended approach is to include shortcuts in
774 arch/$(ARCH)/Makefile, and use the full path when calling down
775 into the arch/$(ARCH)/boot/Makefile.
779 boot := arch/i386/boot
781 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
783 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
784 make in a subdirectory.
786 There are no rules for naming of the architecture specific targets,
787 but executing "make help" will list all relevant targets.
788 To support this $(archhelp) must be defined.
793 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
796 When make is executed without arguments, the first goal encountered
797 will be built. In the top level Makefile the first goal present
799 An architecture shall always per default build a bootable image.
800 In "make help" the default goal is highlighted with a '*'.
801 Add a new prerequisite to all: to select a default goal different
808 When "make" is executed without arguments, bzImage will be built.
810 --- 6.5 Building non-kbuild targets
814 extra-y specify additional targets created in the current
815 directory, in addition to any targets specified by obj-*.
817 Listing all targets in extra-y is required for two purposes:
818 1) Enable kbuild to check changes in command lines
819 - When $(call if_changed,xxx) is used
820 2) kbuild knows what files to delete during "make clean"
823 #arch/i386/kernel/Makefile
824 extra-y := head.o init_task.o
826 In this example extra-y is used to list object files that
827 shall be built, but shall not be linked as part of built-in.o.
830 --- 6.6 Commands useful for building a boot image
832 Kbuild provides a few macros that are useful when building a
837 if_changed is the infrastructure used for the following commands.
840 target: source(s) FORCE
841 $(call if_changed,ld/objcopy/gzip)
843 When the rule is evaluated it is checked to see if any files
844 needs an update, or the commandline has changed since last
845 invocation. The latter will force a rebuild if any options
846 to the executable have changed.
847 Any target that utilises if_changed must be listed in $(targets),
848 otherwise the command line check will fail, and the target will
850 Assignments to $(targets) are without $(obj)/ prefix.
851 if_changed may be used in conjunction with custom commands as
852 defined in 6.7 "Custom kbuild commands".
853 Note: It is a typical mistake to forget the FORCE prerequisite.
856 Link target. Often LDFLAGS_$@ is used to set specific options to ld.
859 Copy binary. Uses OBJCOPYFLAGS usually specified in
860 arch/$(ARCH)/Makefile.
861 OBJCOPYFLAGS_$@ may be used to set additional options.
864 Compress target. Use maximum compression to compress target.
867 #arch/i386/boot/Makefile
868 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
869 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
871 targets += setup setup.o bootsect bootsect.o
872 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
873 $(call if_changed,ld)
875 In this example there are two possible targets, requiring different
876 options to the linker. the linker options are specified using the
877 LDFLAGS_$@ syntax - one for each potential target.
878 $(targets) are assinged all potential targets, herby kbuild knows
879 the targets and will:
880 1) check for commandline changes
881 2) delete target during make clean
883 The ": %: %.o" part of the prerequisite is a shorthand that
884 free us from listing the setup.o and bootsect.o files.
885 Note: It is a common mistake to forget the "target :=" assignment,
886 resulting in the target file being recompiled for no
890 --- 6.7 Custom kbuild commands
892 When kbuild is executing with KBUILD_VERBOSE=0 then only a shorthand
893 of a command is normally displayed.
894 To enable this behaviour for custom commands kbuild requires
895 two variables to be set:
896 quiet_cmd_<command> - what shall be echoed
897 cmd_<command> - the command to execute
901 quiet_cmd_image = BUILD $@
902 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
903 $(obj)/vmlinux.bin > $@
906 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
907 $(call if_changed,image)
908 @echo 'Kernel: $@ is ready'
910 When updating the $(obj)/bzImage target the line:
912 BUILD arch/i386/boot/bzImage
914 will be displayed with "make KBUILD_VERBOSE=0".
917 === 7 Kbuild Variables
919 The top Makefile exports the following variables:
921 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
923 These variables define the current kernel version. A few arch
924 Makefiles actually use these values directly; they should use
925 $(KERNELRELEASE) instead.
927 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
928 three-part version number, such as "2", "4", and "0". These three
929 values are always numeric.
931 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
932 or additional patches. It is usually some non-numeric string
933 such as "-pre4", and is often blank.
937 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
938 for constructing installation directory names or showing in
939 version strings. Some arch Makefiles use it for this purpose.
943 This variable defines the target architecture, such as "i386",
944 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
945 determine which files to compile.
947 By default, the top Makefile sets $(ARCH) to be the same as the
948 host system architecture. For a cross build, a user may
949 override the value of $(ARCH) on the command line:
956 This variable defines a place for the arch Makefiles to install
957 the resident kernel image and System.map file.
958 Use this for architecture specific install targets.
960 INSTALL_MOD_PATH, MODLIB
962 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
963 installation. This variable is not defined in the Makefile but
964 may be passed in by the user if desired.
966 $(MODLIB) specifies the directory for module installation.
967 The top Makefile defines $(MODLIB) to
968 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
969 override this value on the command line if desired.
971 === 8 Makefile language
973 The kernel Makefiles are designed to run with GNU Make. The Makefiles
974 use only the documented features of GNU Make, but they do use many
977 GNU Make supports elementary list-processing functions. The kernel
978 Makefiles use a novel style of list building and manipulation with few
981 GNU Make has two assignment operators, ":=" and "=". ":=" performs
982 immediate evaluation of the right-hand side and stores an actual string
983 into the left-hand side. "=" is like a formula definition; it stores the
984 right-hand side in an unevaluated form and then evaluates this form each
985 time the left-hand side is used.
987 There are some cases where "=" is appropriate. Usually, though, ":="
992 Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
993 Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
994 Updates by Sam Ravnborg <sam@ravnborg.org>
998 - Describe how kbuild support shipped files with _shipped.
999 - Generating offset header files.
1000 - Add more variables to section 7?