2 * arch/alpha/kernel/traps.c
4 * (C) Copyright 1994 Linus Torvalds
8 * This file initializes the trap entry points
11 #include <linux/config.h>
13 #include <linux/sched.h>
14 #include <linux/tty.h>
15 #include <linux/delay.h>
16 #include <linux/smp_lock.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
20 #include <asm/gentrap.h>
21 #include <asm/uaccess.h>
22 #include <asm/unaligned.h>
23 #include <asm/sysinfo.h>
24 #include <asm/hwrpb.h>
25 #include <asm/mmu_context.h>
29 /* Work-around for some SRMs which mishandle opDEC faults. */
36 __asm__ __volatile__ (
37 /* Load the address of... */
39 /* A stub instruction fault handler. Just add 4 to the
45 /* Install the instruction fault handler. */
47 " call_pal %[wrent]\n"
48 /* With that in place, the fault from the round-to-minf fp
49 insn will arrive either at the "lda 4" insn (bad) or one
50 past that (good). This places the correct fixup in %0. */
52 " cvttq/svm $f31,$f31\n"
54 : [fix] "=r" (opDEC_fix)
55 : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)
56 : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
59 printk("opDEC fixup enabled.\n");
63 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
65 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
66 regs->pc, regs->r26, regs->ps, print_tainted());
67 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
68 regs->r0, regs->r1, regs->r2);
69 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
70 regs->r3, regs->r4, regs->r5);
71 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n",
72 regs->r6, regs->r7, regs->r8);
75 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n",
76 r9_15[9], r9_15[10], r9_15[11]);
77 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n",
78 r9_15[12], r9_15[13], r9_15[14]);
79 printk("s6 = %016lx\n", r9_15[15]);
82 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n",
83 regs->r16, regs->r17, regs->r18);
84 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n",
85 regs->r19, regs->r20, regs->r21);
86 printk("t8 = %016lx t9 = %016lx t10= %016lx\n",
87 regs->r22, regs->r23, regs->r24);
88 printk("t11= %016lx pv = %016lx at = %016lx\n",
89 regs->r25, regs->r27, regs->r28);
90 printk("gp = %016lx sp = %p\n", regs->gp, regs+1);
97 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
98 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
99 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
100 "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
104 dik_show_code(unsigned int *pc)
109 for (i = -6; i < 2; i++) {
111 if (__get_user(insn, pc+i))
113 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>');
119 dik_show_trace(unsigned long *sp)
123 while (0x1ff8 & (unsigned long) sp) {
124 extern char _stext[], _etext[];
125 unsigned long tmp = *sp;
127 if (tmp < (unsigned long) &_stext)
129 if (tmp >= (unsigned long) &_etext)
131 printk("%lx%c", tmp, ' ');
140 static int kstack_depth_to_print = 24;
142 void show_stack(struct task_struct *task, unsigned long *sp)
144 unsigned long *stack;
148 * debugging aid: "show_stack(NULL);" prints the
149 * back trace for this cpu.
152 sp=(unsigned long*)&sp;
155 for(i=0; i < kstack_depth_to_print; i++) {
156 if (((long) stack & (THREAD_SIZE-1)) == 0)
158 if (i && ((i % 4) == 0))
160 printk("%016lx ", *stack++);
166 void dump_stack(void)
168 show_stack(NULL, NULL);
171 EXPORT_SYMBOL(dump_stack);
174 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
179 printk("CPU %d ", hard_smp_processor_id());
181 printk("%s(%d): %s %ld\n", current->comm, current->pid, str, err);
182 dik_show_regs(regs, r9_15);
183 dik_show_trace((unsigned long *)(regs+1));
184 dik_show_code((unsigned int *)regs->pc);
186 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
187 printk("die_if_kernel recursion detected.\n");
194 #ifndef CONFIG_MATHEMU
195 static long dummy_emul(void) { return 0; }
196 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
197 = (void *)dummy_emul;
198 long (*alpha_fp_emul) (unsigned long pc)
199 = (void *)dummy_emul;
201 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
202 long alpha_fp_emul (unsigned long pc);
206 do_entArith(unsigned long summary, unsigned long write_mask,
207 struct pt_regs *regs)
209 long si_code = FPE_FLTINV;
213 /* Software-completion summary bit is set, so try to
214 emulate the instruction. If the processor supports
215 precise exceptions, we don't have to search. */
216 if (!amask(AMASK_PRECISE_TRAP))
217 si_code = alpha_fp_emul(regs->pc - 4);
219 si_code = alpha_fp_emul_imprecise(regs, write_mask);
223 die_if_kernel("Arithmetic fault", regs, 0, 0);
225 info.si_signo = SIGFPE;
227 info.si_code = si_code;
228 info.si_addr = (void *) regs->pc;
229 send_sig_info(SIGFPE, &info, current);
233 do_entIF(unsigned long type, struct pt_regs *regs)
240 const unsigned int *data
241 = (const unsigned int *) regs->pc;
242 printk("Kernel bug at %s:%d\n",
243 (const char *)(data[1] | (long)data[2] << 32),
246 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
251 case 0: /* breakpoint */
252 info.si_signo = SIGTRAP;
254 info.si_code = TRAP_BRKPT;
256 info.si_addr = (void *) regs->pc;
258 if (ptrace_cancel_bpt(current)) {
259 regs->pc -= 4; /* make pc point to former bpt */
262 send_sig_info(SIGTRAP, &info, current);
265 case 1: /* bugcheck */
266 info.si_signo = SIGTRAP;
268 info.si_code = __SI_FAULT;
269 info.si_addr = (void *) regs->pc;
271 send_sig_info(SIGTRAP, &info, current);
274 case 2: /* gentrap */
275 info.si_addr = (void *) regs->pc;
276 info.si_trapno = regs->r16;
277 switch ((long) regs->r16) {
334 info.si_signo = signo;
337 info.si_addr = (void *) regs->pc;
338 send_sig_info(signo, &info, current);
342 if (implver() == IMPLVER_EV4) {
345 /* The some versions of SRM do not handle
346 the opDEC properly - they return the PC of the
347 opDEC fault, not the instruction after as the
348 Alpha architecture requires. Here we fix it up.
349 We do this by intentionally causing an opDEC
350 fault during the boot sequence and testing if
351 we get the correct PC. If not, we set a flag
352 to correct it every time through. */
353 regs->pc += opDEC_fix;
355 /* EV4 does not implement anything except normal
356 rounding. Everything else will come here as
357 an illegal instruction. Emulate them. */
358 si_code = alpha_fp_emul(regs->pc - 4);
362 info.si_signo = SIGFPE;
364 info.si_code = si_code;
365 info.si_addr = (void *) regs->pc;
366 send_sig_info(SIGFPE, &info, current);
372 case 3: /* FEN fault */
373 /* Irritating users can call PAL_clrfen to disable the
374 FPU for the process. The kernel will then trap in
375 do_switch_stack and undo_switch_stack when we try
376 to save and restore the FP registers.
378 Given that GCC by default generates code that uses the
379 FP registers, PAL_clrfen is not useful except for DoS
380 attacks. So turn the bleeding FPU back on and be done
382 current_thread_info()->pcb.flags |= 1;
383 __reload_thread(¤t_thread_info()->pcb);
387 default: /* unexpected instruction-fault type */
391 info.si_signo = SIGILL;
393 info.si_code = ILL_ILLOPC;
394 info.si_addr = (void *) regs->pc;
395 send_sig_info(SIGILL, &info, current);
398 /* There is an ifdef in the PALcode in MILO that enables a
399 "kernel debugging entry point" as an unprivileged call_pal.
401 We don't want to have anything to do with it, but unfortunately
402 several versions of MILO included in distributions have it enabled,
403 and if we don't put something on the entry point we'll oops. */
406 do_entDbg(struct pt_regs *regs)
410 die_if_kernel("Instruction fault", regs, 0, 0);
412 info.si_signo = SIGILL;
414 info.si_code = ILL_ILLOPC;
415 info.si_addr = (void *) regs->pc;
416 force_sig_info(SIGILL, &info, current);
421 * entUna has a different register layout to be reasonably simple. It
422 * needs access to all the integer registers (the kernel doesn't use
423 * fp-regs), and it needs to have them in order for simpler access.
425 * Due to the non-standard register layout (and because we don't want
426 * to handle floating-point regs), user-mode unaligned accesses are
427 * handled separately by do_entUnaUser below.
429 * Oh, btw, we don't handle the "gp" register correctly, but if we fault
430 * on a gp-register unaligned load/store, something is _very_ wrong
431 * in the kernel anyway..
434 unsigned long regs[32];
435 unsigned long ps, pc, gp, a0, a1, a2;
438 struct unaligned_stat {
439 unsigned long count, va, pc;
443 /* Macro for exception fixup code to access integer registers. */
444 #define una_reg(r) (regs.regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
448 do_entUna(void * va, unsigned long opcode, unsigned long reg,
449 unsigned long a3, unsigned long a4, unsigned long a5,
452 long error, tmp1, tmp2, tmp3, tmp4;
453 unsigned long pc = regs.pc - 4;
454 const struct exception_table_entry *fixup;
456 unaligned[0].count++;
457 unaligned[0].va = (unsigned long) va;
458 unaligned[0].pc = pc;
460 /* We don't want to use the generic get/put unaligned macros as
461 we want to trap exceptions. Only if we actually get an
462 exception will we decide whether we should have caught it. */
465 case 0x0c: /* ldwu */
466 __asm__ __volatile__(
467 "1: ldq_u %1,0(%3)\n"
468 "2: ldq_u %2,1(%3)\n"
472 ".section __ex_table,\"a\"\n"
474 " lda %1,3b-1b(%0)\n"
476 " lda %2,3b-2b(%0)\n"
478 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
482 una_reg(reg) = tmp1|tmp2;
486 __asm__ __volatile__(
487 "1: ldq_u %1,0(%3)\n"
488 "2: ldq_u %2,3(%3)\n"
492 ".section __ex_table,\"a\"\n"
494 " lda %1,3b-1b(%0)\n"
496 " lda %2,3b-2b(%0)\n"
498 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
502 una_reg(reg) = (int)(tmp1|tmp2);
506 __asm__ __volatile__(
507 "1: ldq_u %1,0(%3)\n"
508 "2: ldq_u %2,7(%3)\n"
512 ".section __ex_table,\"a\"\n"
514 " lda %1,3b-1b(%0)\n"
516 " lda %2,3b-2b(%0)\n"
518 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
522 una_reg(reg) = tmp1|tmp2;
525 /* Note that the store sequences do not indicate that they change
526 memory because it _should_ be affecting nothing in this context.
527 (Otherwise we have other, much larger, problems.) */
529 __asm__ __volatile__(
530 "1: ldq_u %2,1(%5)\n"
531 "2: ldq_u %1,0(%5)\n"
538 "3: stq_u %2,1(%5)\n"
539 "4: stq_u %1,0(%5)\n"
541 ".section __ex_table,\"a\"\n"
543 " lda %2,5b-1b(%0)\n"
545 " lda %1,5b-2b(%0)\n"
547 " lda $31,5b-3b(%0)\n"
549 " lda $31,5b-4b(%0)\n"
551 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
552 "=&r"(tmp3), "=&r"(tmp4)
553 : "r"(va), "r"(una_reg(reg)), "0"(0));
559 __asm__ __volatile__(
560 "1: ldq_u %2,3(%5)\n"
561 "2: ldq_u %1,0(%5)\n"
568 "3: stq_u %2,3(%5)\n"
569 "4: stq_u %1,0(%5)\n"
571 ".section __ex_table,\"a\"\n"
573 " lda %2,5b-1b(%0)\n"
575 " lda %1,5b-2b(%0)\n"
577 " lda $31,5b-3b(%0)\n"
579 " lda $31,5b-4b(%0)\n"
581 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
582 "=&r"(tmp3), "=&r"(tmp4)
583 : "r"(va), "r"(una_reg(reg)), "0"(0));
589 __asm__ __volatile__(
590 "1: ldq_u %2,7(%5)\n"
591 "2: ldq_u %1,0(%5)\n"
598 "3: stq_u %2,7(%5)\n"
599 "4: stq_u %1,0(%5)\n"
601 ".section __ex_table,\"a\"\n\t"
603 " lda %2,5b-1b(%0)\n"
605 " lda %1,5b-2b(%0)\n"
607 " lda $31,5b-3b(%0)\n"
609 " lda $31,5b-4b(%0)\n"
611 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
612 "=&r"(tmp3), "=&r"(tmp4)
613 : "r"(va), "r"(una_reg(reg)), "0"(0));
620 printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n",
621 pc, va, opcode, reg);
625 /* Ok, we caught the exception, but we don't want it. Is there
626 someone to pass it along to? */
627 if ((fixup = search_exception_tables(pc)) != 0) {
629 newpc = fixup_exception(una_reg, fixup, pc);
631 printk("Forwarding unaligned exception at %lx (%lx)\n",
639 * Yikes! No one to forward the exception to.
640 * Since the registers are in a weird format, dump them ourselves.
644 printk("%s(%d): unhandled unaligned exception\n",
645 current->comm, current->pid);
647 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
648 pc, una_reg(26), regs.ps);
649 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
650 una_reg(0), una_reg(1), una_reg(2));
651 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
652 una_reg(3), una_reg(4), una_reg(5));
653 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
654 una_reg(6), una_reg(7), una_reg(8));
655 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
656 una_reg(9), una_reg(10), una_reg(11));
657 printk("r12= %016lx r13= %016lx r14= %016lx\n",
658 una_reg(12), una_reg(13), una_reg(14));
659 printk("r15= %016lx\n", una_reg(15));
660 printk("r16= %016lx r17= %016lx r18= %016lx\n",
661 una_reg(16), una_reg(17), una_reg(18));
662 printk("r19= %016lx r20= %016lx r21= %016lx\n",
663 una_reg(19), una_reg(20), una_reg(21));
664 printk("r22= %016lx r23= %016lx r24= %016lx\n",
665 una_reg(22), una_reg(23), una_reg(24));
666 printk("r25= %016lx r27= %016lx r28= %016lx\n",
667 una_reg(25), una_reg(27), una_reg(28));
668 printk("gp = %016lx sp = %p\n", regs.gp, ®s+1);
670 dik_show_code((unsigned int *)pc);
671 dik_show_trace((unsigned long *)(®s+1));
673 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
674 printk("die_if_kernel recursion detected.\n");
682 * Convert an s-floating point value in memory format to the
683 * corresponding value in register format. The exponent
684 * needs to be remapped to preserve non-finite values
685 * (infinities, not-a-numbers, denormals).
687 static inline unsigned long
688 s_mem_to_reg (unsigned long s_mem)
690 unsigned long frac = (s_mem >> 0) & 0x7fffff;
691 unsigned long sign = (s_mem >> 31) & 0x1;
692 unsigned long exp_msb = (s_mem >> 30) & 0x1;
693 unsigned long exp_low = (s_mem >> 23) & 0x7f;
696 exp = (exp_msb << 10) | exp_low; /* common case */
698 if (exp_low == 0x7f) {
702 if (exp_low == 0x00) {
708 return (sign << 63) | (exp << 52) | (frac << 29);
712 * Convert an s-floating point value in register format to the
713 * corresponding value in memory format.
715 static inline unsigned long
716 s_reg_to_mem (unsigned long s_reg)
718 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
722 * Handle user-level unaligned fault. Handling user-level unaligned
723 * faults is *extremely* slow and produces nasty messages. A user
724 * program *should* fix unaligned faults ASAP.
726 * Notice that we have (almost) the regular kernel stack layout here,
727 * so finding the appropriate registers is a little more difficult
728 * than in the kernel case.
730 * Finally, we handle regular integer load/stores only. In
731 * particular, load-linked/store-conditionally and floating point
732 * load/stores are not supported. The former make no sense with
733 * unaligned faults (they are guaranteed to fail) and I don't think
734 * the latter will occur in any decent program.
736 * Sigh. We *do* have to handle some FP operations, because GCC will
737 * uses them as temporary storage for integer memory to memory copies.
738 * However, we need to deal with stt/ldt and sts/lds only.
741 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \
742 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \
743 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \
744 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
746 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \
747 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \
748 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
750 #define R(x) ((size_t) &((struct pt_regs *)0)->x)
752 static int unauser_reg_offsets[32] = {
753 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
754 /* r9 ... r15 are stored in front of regs. */
755 -56, -48, -40, -32, -24, -16, -8,
756 R(r16), R(r17), R(r18),
757 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
758 R(r27), R(r28), R(gp),
765 do_entUnaUser(void * va, unsigned long opcode,
766 unsigned long reg, struct pt_regs *regs)
769 static long last_time = 0;
771 unsigned long tmp1, tmp2, tmp3, tmp4;
772 unsigned long fake_reg, *reg_addr = &fake_reg;
776 /* Check the UAC bits to decide what the user wants us to do
777 with the unaliged access. */
779 if (!test_thread_flag (TIF_UAC_NOPRINT)) {
780 if (cnt >= 5 && jiffies - last_time > 5*HZ) {
784 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
785 current->comm, current->pid,
786 regs->pc - 4, va, opcode, reg);
790 if (test_thread_flag (TIF_UAC_SIGBUS))
792 /* Not sure why you'd want to use this, but... */
793 if (test_thread_flag (TIF_UAC_NOFIX))
796 /* Don't bother reading ds in the access check since we already
797 know that this came from the user. Also rely on the fact that
798 the page at TASK_SIZE is unmapped and so can't be touched anyway. */
799 if (!__access_ok((unsigned long)va, 0, USER_DS))
802 ++unaligned[1].count;
803 unaligned[1].va = (unsigned long)va;
804 unaligned[1].pc = regs->pc - 4;
806 if ((1L << opcode) & OP_INT_MASK) {
807 /* it's an integer load/store */
809 reg_addr = (unsigned long *)
810 ((char *)regs + unauser_reg_offsets[reg]);
811 } else if (reg == 30) {
812 /* usp in PAL regs */
815 /* zero "register" */
820 /* We don't want to use the generic get/put unaligned macros as
821 we want to trap exceptions. Only if we actually get an
822 exception will we decide whether we should have caught it. */
825 case 0x0c: /* ldwu */
826 __asm__ __volatile__(
827 "1: ldq_u %1,0(%3)\n"
828 "2: ldq_u %2,1(%3)\n"
832 ".section __ex_table,\"a\"\n"
834 " lda %1,3b-1b(%0)\n"
836 " lda %2,3b-2b(%0)\n"
838 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
842 *reg_addr = tmp1|tmp2;
846 __asm__ __volatile__(
847 "1: ldq_u %1,0(%3)\n"
848 "2: ldq_u %2,3(%3)\n"
852 ".section __ex_table,\"a\"\n"
854 " lda %1,3b-1b(%0)\n"
856 " lda %2,3b-2b(%0)\n"
858 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
862 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
866 __asm__ __volatile__(
867 "1: ldq_u %1,0(%3)\n"
868 "2: ldq_u %2,7(%3)\n"
872 ".section __ex_table,\"a\"\n"
874 " lda %1,3b-1b(%0)\n"
876 " lda %2,3b-2b(%0)\n"
878 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
882 alpha_write_fp_reg(reg, tmp1|tmp2);
886 __asm__ __volatile__(
887 "1: ldq_u %1,0(%3)\n"
888 "2: ldq_u %2,3(%3)\n"
892 ".section __ex_table,\"a\"\n"
894 " lda %1,3b-1b(%0)\n"
896 " lda %2,3b-2b(%0)\n"
898 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
902 *reg_addr = (int)(tmp1|tmp2);
906 __asm__ __volatile__(
907 "1: ldq_u %1,0(%3)\n"
908 "2: ldq_u %2,7(%3)\n"
912 ".section __ex_table,\"a\"\n"
914 " lda %1,3b-1b(%0)\n"
916 " lda %2,3b-2b(%0)\n"
918 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
922 *reg_addr = tmp1|tmp2;
925 /* Note that the store sequences do not indicate that they change
926 memory because it _should_ be affecting nothing in this context.
927 (Otherwise we have other, much larger, problems.) */
929 __asm__ __volatile__(
930 "1: ldq_u %2,1(%5)\n"
931 "2: ldq_u %1,0(%5)\n"
938 "3: stq_u %2,1(%5)\n"
939 "4: stq_u %1,0(%5)\n"
941 ".section __ex_table,\"a\"\n"
943 " lda %2,5b-1b(%0)\n"
945 " lda %1,5b-2b(%0)\n"
947 " lda $31,5b-3b(%0)\n"
949 " lda $31,5b-4b(%0)\n"
951 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
952 "=&r"(tmp3), "=&r"(tmp4)
953 : "r"(va), "r"(*reg_addr), "0"(0));
959 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
963 __asm__ __volatile__(
964 "1: ldq_u %2,3(%5)\n"
965 "2: ldq_u %1,0(%5)\n"
972 "3: stq_u %2,3(%5)\n"
973 "4: stq_u %1,0(%5)\n"
975 ".section __ex_table,\"a\"\n"
977 " lda %2,5b-1b(%0)\n"
979 " lda %1,5b-2b(%0)\n"
981 " lda $31,5b-3b(%0)\n"
983 " lda $31,5b-4b(%0)\n"
985 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
986 "=&r"(tmp3), "=&r"(tmp4)
987 : "r"(va), "r"(*reg_addr), "0"(0));
993 fake_reg = alpha_read_fp_reg(reg);
997 __asm__ __volatile__(
998 "1: ldq_u %2,7(%5)\n"
999 "2: ldq_u %1,0(%5)\n"
1006 "3: stq_u %2,7(%5)\n"
1007 "4: stq_u %1,0(%5)\n"
1009 ".section __ex_table,\"a\"\n\t"
1011 " lda %2,5b-1b(%0)\n"
1013 " lda %1,5b-2b(%0)\n"
1015 " lda $31,5b-3b(%0)\n"
1017 " lda $31,5b-4b(%0)\n"
1019 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1020 "=&r"(tmp3), "=&r"(tmp4)
1021 : "r"(va), "r"(*reg_addr), "0"(0));
1027 /* What instruction were you trying to use, exactly? */
1031 /* Only integer loads should get here; everyone else returns early. */
1037 regs->pc -= 4; /* make pc point to faulting insn */
1038 info.si_signo = SIGSEGV;
1041 /* We need to replicate some of the logic in mm/fault.c,
1042 since we don't have access to the fault code in the
1043 exception handling return path. */
1044 if (!__access_ok((unsigned long)va, 0, USER_DS))
1045 info.si_code = SEGV_ACCERR;
1047 struct mm_struct *mm = current->mm;
1048 down_read(&mm->mmap_sem);
1049 if (find_vma(mm, (unsigned long)va))
1050 info.si_code = SEGV_ACCERR;
1052 info.si_code = SEGV_MAPERR;
1053 up_read(&mm->mmap_sem);
1056 send_sig_info(SIGSEGV, &info, current);
1061 info.si_signo = SIGBUS;
1063 info.si_code = BUS_ADRALN;
1065 send_sig_info(SIGBUS, &info, current);
1072 /* Tell PAL-code what global pointer we want in the kernel. */
1073 register unsigned long gptr __asm__("$29");
1076 /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1077 a bug in the handling of the opDEC fault. Fix it up if so. */
1078 if (implver() == IMPLVER_EV4)