2 * linux/arch/arm/mach-integrator/core.c
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/spinlock.h>
15 #include <linux/interrupt.h>
16 #include <linux/sched.h>
18 #include <asm/hardware.h>
21 #include <asm/hardware/amba.h>
22 #include <asm/arch/cm.h>
23 #include <asm/system.h>
25 #include <asm/mach/time.h>
27 static struct amba_device rtc_device = {
32 .start = INTEGRATOR_RTC_BASE,
33 .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
34 .flags = IORESOURCE_MEM,
36 .irq = { IRQ_RTCINT, NO_IRQ },
37 .periphid = 0x00041030,
40 static struct amba_device uart0_device = {
45 .start = INTEGRATOR_UART0_BASE,
46 .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
47 .flags = IORESOURCE_MEM,
49 .irq = { IRQ_UARTINT0, NO_IRQ },
50 .periphid = 0x0041010,
53 static struct amba_device uart1_device = {
58 .start = INTEGRATOR_UART1_BASE,
59 .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
60 .flags = IORESOURCE_MEM,
62 .irq = { IRQ_UARTINT1, NO_IRQ },
63 .periphid = 0x0041010,
66 static struct amba_device kmi0_device = {
72 .end = KMI0_BASE + SZ_4K - 1,
73 .flags = IORESOURCE_MEM,
75 .irq = { IRQ_KMIINT0, NO_IRQ },
76 .periphid = 0x00041050,
79 static struct amba_device kmi1_device = {
85 .end = KMI1_BASE + SZ_4K - 1,
86 .flags = IORESOURCE_MEM,
88 .irq = { IRQ_KMIINT1, NO_IRQ },
89 .periphid = 0x00041050,
92 static struct amba_device *amba_devs[] __initdata = {
100 static int __init integrator_init(void)
104 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
105 struct amba_device *d = amba_devs[i];
106 amba_device_register(d, &iomem_resource);
112 arch_initcall(integrator_init);
114 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
116 static spinlock_t cm_lock = SPIN_LOCK_UNLOCKED;
119 * cm_control - update the CM_CTRL register.
120 * @mask: bits to change
123 void cm_control(u32 mask, u32 set)
128 spin_lock_irqsave(&cm_lock, flags);
129 val = readl(CM_CTRL) & ~mask;
130 writel(val | set, CM_CTRL);
131 spin_unlock_irqrestore(&cm_lock, flags);
134 EXPORT_SYMBOL(cm_control);
137 * Where is the timer (VA)?
139 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
140 #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
141 #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
142 #define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
145 * How long is the timer interval?
147 #define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
148 #if TIMER_INTERVAL >= 0x100000
149 #define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
150 #elif TIMER_INTERVAL >= 0x10000
151 #define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
153 #define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
157 * What does it look like?
159 typedef struct TimerStruct {
160 unsigned long TimerLoad;
161 unsigned long TimerValue;
162 unsigned long TimerControl;
163 unsigned long TimerClear;
166 extern unsigned long (*gettimeoffset)(void);
168 static unsigned long timer_reload;
171 * Returns number of ms since last clock interrupt. Note that interrupts
172 * will have been disabled by do_gettimeoffset()
174 static unsigned long integrator_gettimeoffset(void)
176 volatile TimerStruct_t *timer1 = (TimerStruct_t *)TIMER1_VA_BASE;
177 unsigned long ticks1, ticks2, status;
180 * Get the current number of ticks. Note that there is a race
181 * condition between us reading the timer and checking for
182 * an interrupt. We get around this by ensuring that the
183 * counter has not reloaded between our two reads.
185 ticks2 = timer1->TimerValue & 0xffff;
188 status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
189 ticks2 = timer1->TimerValue & 0xffff;
190 } while (ticks2 > ticks1);
193 * Number of ticks since last interrupt.
195 ticks1 = timer_reload - ticks2;
198 * Interrupt pending? If so, we've reloaded once already.
200 if (status & (1 << IRQ_TIMERINT1))
201 ticks1 += timer_reload;
204 * Convert the ticks to usecs
206 return TICKS2USECS(ticks1);
210 * IRQ handler for the timer
213 integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
215 volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
217 // ...clear the interrupt
218 timer1->TimerClear = 1;
225 static struct irqaction integrator_timer_irq = {
226 .name = "Integrator Timer Tick",
227 .flags = SA_INTERRUPT,
228 .handler = integrator_timer_interrupt
232 * Set up timer interrupt, and return the current time in seconds.
234 void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
236 volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
237 volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
238 volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
239 unsigned int timer_ctrl = 0x80 | 0x40; /* periodic */
241 timer_reload = reload;
244 if (timer_reload > 0x100000) {
246 timer_ctrl |= 0x08; /* /256 */
247 } else if (timer_reload > 0x010000) {
249 timer_ctrl |= 0x04; /* /16 */
253 * Initialise to a known state (all timers off)
255 timer0->TimerControl = 0;
256 timer1->TimerControl = 0;
257 timer2->TimerControl = 0;
259 timer1->TimerLoad = timer_reload;
260 timer1->TimerValue = timer_reload;
261 timer1->TimerControl = timer_ctrl;
264 * Make irqs happen for the system timer
266 setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
267 gettimeoffset = integrator_gettimeoffset;