2 * linux/arch/arm/mach-pxa/mainstone.c
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
20 #include <linux/bitops.h>
22 #include <asm/types.h>
23 #include <asm/setup.h>
24 #include <asm/memory.h>
25 #include <asm/mach-types.h>
26 #include <asm/hardware.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/irq.h>
36 static unsigned long mainstone_irq_enabled;
38 static void mainstone_mask_irq(unsigned int irq)
40 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
41 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
44 static void mainstone_unmask_irq(unsigned int irq)
46 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
47 /* the irq can be acknowledged only if deasserted, so it's done here */
48 MST_INTSETCLR &= ~(1 << mainstone_irq);
49 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
52 static struct irqchip mainstone_irq_chip = {
53 .ack = mainstone_mask_irq,
54 .mask = mainstone_mask_irq,
55 .unmask = mainstone_unmask_irq,
59 static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc,
62 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
64 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
65 if (likely(pending)) {
66 irq = MAINSTONE_IRQ(0) + __ffs(pending);
67 desc = irq_desc + irq;
68 desc->handle(irq, desc, regs);
70 pending = MST_INTSETCLR & mainstone_irq_enabled;
74 static void __init mainstone_init_irq(void)
80 /* setup extra Mainstone irqs */
81 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
82 set_irq_chip(irq, &mainstone_irq_chip);
83 set_irq_handler(irq, do_level_IRQ);
84 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
86 set_irq_flags(MAINSTONE_IRQ(8), 0);
87 set_irq_flags(MAINSTONE_IRQ(12), 0);
92 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
93 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
97 static struct resource smc91x_resources[] = {
99 .start = (MST_ETH_PHYS + 0x300),
100 .end = (MST_ETH_PHYS + 0xfffff),
101 .flags = IORESOURCE_MEM,
104 .start = MAINSTONE_IRQ(3),
105 .end = MAINSTONE_IRQ(3),
106 .flags = IORESOURCE_IRQ,
110 static struct platform_device smc91x_device = {
113 .num_resources = ARRAY_SIZE(smc91x_resources),
114 .resource = smc91x_resources,
117 static void __init mainstone_init(void)
119 platform_add_device(&smc91x_device);
123 static struct map_desc mainstone_io_desc[] __initdata = {
124 { MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */
127 static void __init mainstone_map_io(void)
130 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
133 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
134 MAINTAINER("MontaVista Software Inc.")
135 BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
136 MAPIO(mainstone_map_io)
137 INITIRQ(mainstone_init_irq)
138 INIT_MACHINE(mainstone_init)