2 * PXA250/210 Power Management Routines
4 * Original code for the SA11x0:
5 * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
7 * Modified for the PXA250 by Nicolas Pitre:
8 * Copyright (c) 2002 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License.
13 #include <linux/config.h>
14 #include <linux/init.h>
15 #include <linux/suspend.h>
16 #include <linux/errno.h>
17 #include <linux/time.h>
19 #include <asm/hardware.h>
20 #include <asm/memory.h>
21 #include <asm/system.h>
29 extern void pxa_cpu_suspend(void);
30 extern void pxa_cpu_resume(void);
32 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
33 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
35 #define RESTORE_GPLEVEL(n) do { \
36 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
37 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
41 * List of global PXA peripheral registers to preserve.
42 * More ones like CP and general purpose register values are preserved
43 * with the stack pointer in sleep.S.
45 enum { SLEEP_SAVE_START = 0,
47 SLEEP_SAVE_OSCR, SLEEP_SAVE_OIER,
48 SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
50 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2,
51 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2,
52 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2,
53 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2,
54 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR2_L,
55 SLEEP_SAVE_GAFR0_U, SLEEP_SAVE_GAFR1_U, SLEEP_SAVE_GAFR2_U,
66 static int pxa_pm_enter(u32 state)
68 unsigned long sleep_save[SLEEP_SAVE_SIZE];
69 unsigned long checksum = 0;
73 if (state != PM_SUSPEND_MEM)
76 /* preserve current time */
77 delta = xtime.tv_sec - RCNR;
79 /* save vital registers */
87 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
88 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
89 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
90 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
91 SAVE(GAFR0_L); SAVE(GAFR0_U);
92 SAVE(GAFR1_L); SAVE(GAFR1_U);
93 SAVE(GAFR2_L); SAVE(GAFR2_U);
101 /* Note: wake up source are set up in each machine specific files */
103 /* clear GPIO transition detect bits */
104 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
106 /* Clear sleep reset status */
109 /* set resume return address */
110 PSPR = virt_to_phys(pxa_cpu_resume);
112 /* before sleeping, calculate and save a checksum */
113 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
114 checksum += sleep_save[i];
115 sleep_save[SLEEP_SAVE_CKSUM] = checksum;
120 /* after sleeping, validate the checksum */
122 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
123 checksum += sleep_save[i];
125 /* if invalid, display message and wait for a hardware reset */
126 if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
127 #ifdef CONFIG_ARCH_LUBBOCK
128 LUB_HEXLED = 0xbadbadc5;
133 /* ensure not to come back here if it wasn't intended */
136 /* restore registers */
137 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
138 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
139 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
140 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
141 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
142 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
143 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
145 PSSR = PSSR_RDH | PSSR_PH;
160 /* restore current time */
161 xtime.tv_sec = RCNR + delta;
164 printk(KERN_DEBUG "*** made it back from resume\n");
170 unsigned long sleep_phys_sp(void *sp)
172 return virt_to_phys(sp);
176 * Called after processes are frozen, but before we shut down devices.
178 static int pxa_pm_prepare(u32 state)
184 * Called after devices are re-setup, but before processes are thawed.
186 static int pxa_pm_finish(u32 state)
192 * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
194 static struct pm_ops pxa_pm_ops = {
195 .pm_disk_mode = PM_DISK_FIRMWARE,
196 .prepare = pxa_pm_prepare,
197 .enter = pxa_pm_enter,
198 .finish = pxa_pm_finish,
201 static int __init pxa_pm_init(void)
203 pm_set_ops(&pxa_pm_ops);
207 late_initcall(pxa_pm_init);