2 * linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 * Rob Scott (rscott@mtrob.fdns.net)
6 * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 * These are the low level assembler for performing cache and TLB
24 * functions on the ARM720T. The ARM720T has a writethrough IDC
25 * cache, so we don't need to clean it.
28 * 05-09-2000 SJH Created by moving 720 specific functions
29 * out of 'proc-arm6,7.S' per RMK discussion
30 * 07-25-2000 SJH Added idle function.
31 * 08-25-2000 DBS Updated for integration of ARM Ltd version.
33 #include <linux/linkage.h>
34 #include <linux/init.h>
35 #include <asm/assembler.h>
36 #include <asm/constants.h>
37 #include <asm/pgtable.h>
38 #include <asm/procinfo.h>
39 #include <asm/ptrace.h>
40 #include <asm/hardware.h>
43 * Function: arm720_proc_init (void)
44 * : arm720_proc_fin (void)
46 * Notes : This processor does not require these
48 ENTRY(cpu_arm720_dcache_clean_area)
49 ENTRY(cpu_arm720_proc_init)
52 ENTRY(cpu_arm720_proc_fin)
54 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
56 mrc p15, 0, r0, c1, c0, 0
57 bic r0, r0, #0x1000 @ ...i............
58 bic r0, r0, #0x000e @ ............wca.
59 mcr p15, 0, r0, c1, c0, 0 @ disable caches
60 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
64 * Function: arm720_proc_do_idle(void)
65 * Params : r0 = unused
66 * Purpose : put the processer in proper idle mode
68 ENTRY(cpu_arm720_do_idle)
72 * Function: arm720_switch_mm(unsigned long pgd_phys)
73 * Params : pgd_phys Physical address of page table
74 * Purpose : Perform a task switch, saving the old process' state and restoring
77 ENTRY(cpu_arm720_switch_mm)
79 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
80 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
81 mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4)
85 * Function: arm720_set_pte(pte_t *ptep, pte_t pte)
86 * Params : r0 = Address to set
88 * Purpose : Set a PTE and flush it out of any WB cache
91 ENTRY(cpu_arm720_set_pte)
92 str r1, [r0], #-2048 @ linux version
94 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
96 bic r2, r1, #PTE_SMALL_AP_MASK
97 bic r2, r2, #PTE_TYPE_MASK
98 orr r2, r2, #PTE_TYPE_SMALL
100 tst r1, #L_PTE_USER @ User?
101 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
103 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
104 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
106 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young
109 str r2, [r0] @ hardware version
113 * Function: arm720_reset
114 * Params : r0 = address to jump to
115 * Notes : This sets up everything for a reset
117 ENTRY(cpu_arm720_reset)
119 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
120 mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
121 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
122 bic ip, ip, #0x000f @ ............wcam
123 bic ip, ip, #0x2100 @ ..v....s........
124 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
129 .type __arm710_setup, #function
130 __arm710_setup: mov r0, #0
131 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
132 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
133 mcr p15, 0, r4, c2, c0 @ load page table pointer
134 mov r0, #0x1f @ Domains 0, 1 = client
135 mcr p15, 0, r0, c3, c0 @ load domain access register
137 mrc p15, 0, r0, c1, c0 @ get control register
138 bic r0, r0, #0x0e00 @ ..V. ..RS BLDP WCAM
139 orr r0, r0, #0x0100 @ .... .... .111 .... (old)
140 orr r0, r0, #0x003d @ .... ..01 ..11 1101 (new)
141 mov pc, lr @ __ret (head.S)
142 .size __arm710_setup, . - __arm710_setup
144 .type __arm720_setup, #function
145 __arm720_setup: mov r0, #0
146 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
147 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
148 mcr p15, 0, r4, c2, c0 @ load page table pointer
149 mov r0, #0x1f @ Domains 0, 1 = client
150 mcr p15, 0, r0, c3, c0 @ load domain access register
152 mrc p15, 0, r0, c1, c0 @ get control register
153 bic r0, r0, #0x0e00 @ ..V. ..RS BLDP WCAM
154 orr r0, r0, #0x2100 @ .... .... .111 .... (old)
155 orr r0, r0, #0x003d @ ..1. ..01 ..11 1101 (new)
156 mov pc, lr @ __ret (head.S)
157 .size __arm720_setup, . - __arm720_setup
162 * Purpose : Function pointers used to access above functions - all calls
165 .type arm720_processor_functions, #object
166 ENTRY(arm720_processor_functions)
168 .word cpu_arm720_proc_init
169 .word cpu_arm720_proc_fin
170 .word cpu_arm720_reset
171 .word cpu_arm720_do_idle
172 .word cpu_arm720_dcache_clean_area
173 .word cpu_arm720_switch_mm
174 .word cpu_arm720_set_pte
175 .size arm720_processor_functions, . - arm720_processor_functions
179 .type cpu_arch_name, #object
180 cpu_arch_name: .asciz "armv4t"
181 .size cpu_arch_name, . - cpu_arch_name
183 .type cpu_elf_name, #object
184 cpu_elf_name: .asciz "v4"
185 .size cpu_elf_name, . - cpu_elf_name
187 .type cpu_arm710_name, #object
190 .size cpu_arm710_name, . - cpu_arm710_name
192 .type cpu_arm720_name, #object
195 .size cpu_arm720_name, . - cpu_arm720_name
200 * See linux/include/asm-arm/procinfo.h for a definition of this structure.
203 .section ".proc.info", #alloc, #execinstr
205 .type __arm710_proc_info, #object
207 .long 0x41807100 @ cpu_val
208 .long 0xffffff00 @ cpu_mask
209 .long 0x00000c1e @ section_mmu_flags
210 b __arm710_setup @ cpu_flush
211 .long cpu_arch_name @ arch_name
212 .long cpu_elf_name @ elf_name
213 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB @ elf_hwcap
214 .long cpu_arm710_name @ name
215 .long arm720_processor_functions
219 .size __arm710_proc_info, . - __arm710_proc_info
221 .type __arm720_proc_info, #object
223 .long 0x41807200 @ cpu_val
224 .long 0xffffff00 @ cpu_mask
225 .long 0x00000c1e @ section_mmu_flags
226 b __arm720_setup @ cpu_flush
227 .long cpu_arch_name @ arch_name
228 .long cpu_elf_name @ elf_name
229 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB @ elf_hwcap
230 .long cpu_arm720_name @ name
231 .long arm720_processor_functions
235 .size __arm720_proc_info, . - __arm720_proc_info