2 * linux/arch/i386/traps.c
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/version.h>
31 #include <linux/ioport.h>
32 #include <linux/eisa.h>
36 #include <linux/mca.h>
39 #include <asm/processor.h>
40 #include <asm/system.h>
41 #include <asm/uaccess.h>
43 #include <asm/atomic.h>
44 #include <asm/debugreg.h>
50 #include <asm/arch_hooks.h>
52 #include <linux/irq.h>
53 #include <linux/module.h>
55 #include "mach_traps.h"
57 struct desc_struct default_ldt[] __attribute__((__section__(".data.default_ldt"))) = { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } };
58 struct page *default_ldt_page;
60 /* Do we ignore FPU interrupts ? */
61 char ignore_fpu_irq = 0;
64 * The IDT has to be page-aligned to simplify the Pentium
65 * F0 0F bug workaround.. We have a special link segment
68 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
70 asmlinkage void divide_error(void);
71 asmlinkage void debug(void);
72 asmlinkage void nmi(void);
73 asmlinkage void int3(void);
74 asmlinkage void overflow(void);
75 asmlinkage void bounds(void);
76 asmlinkage void invalid_op(void);
77 asmlinkage void device_not_available(void);
78 asmlinkage void coprocessor_segment_overrun(void);
79 asmlinkage void invalid_TSS(void);
80 asmlinkage void segment_not_present(void);
81 asmlinkage void stack_segment(void);
82 asmlinkage void general_protection(void);
83 asmlinkage void page_fault(void);
84 asmlinkage void coprocessor_error(void);
85 asmlinkage void simd_coprocessor_error(void);
86 asmlinkage void alignment_check(void);
87 asmlinkage void spurious_interrupt_bug(void);
88 asmlinkage void machine_check(void);
90 static int kstack_depth_to_print = 24;
92 static int valid_stack_ptr(struct task_struct *task, void *p)
94 if (p <= (void *)task->thread_info)
101 #ifdef CONFIG_FRAME_POINTER
102 void print_context_stack(struct task_struct *task, unsigned long *stack,
107 while (valid_stack_ptr(task, (void *)ebp)) {
108 addr = *(unsigned long *)(ebp + 4);
109 printk(" [<%08lx>] ", addr);
110 print_symbol("%s", addr);
112 ebp = *(unsigned long *)ebp;
116 void print_context_stack(struct task_struct *task, unsigned long *stack,
121 while (!kstack_end(stack)) {
123 if (kernel_text_address(addr)) {
124 printk(" [<%08lx>] ", addr);
125 print_symbol("%s\n", addr);
131 void show_trace(struct task_struct *task, unsigned long * stack)
138 if (!valid_stack_ptr(task, stack)) {
139 printk("Stack pointer is garbage, not printing trace\n");
143 if (task == current) {
144 /* Grab ebp right from our regs */
145 asm ("movl %%ebp, %0" : "=r" (ebp) : );
147 /* ebp is the last reg pushed by switch_to */
148 ebp = *(unsigned long *) task->thread.esp;
152 struct thread_info *context;
153 context = (struct thread_info *)
154 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
155 print_context_stack(task, stack, ebp);
156 stack = (unsigned long*)context->previous_esp;
159 printk(" =======================\n");
163 void show_stack(struct task_struct *task, unsigned long *esp)
165 unsigned long *stack;
170 esp = (unsigned long*)task->thread.esp;
172 esp = (unsigned long *)&esp;
176 for(i = 0; i < kstack_depth_to_print; i++) {
177 if (kstack_end(stack))
179 if (i && ((i % 8) == 0))
181 printk("%08lx ", *stack++);
183 printk("\nCall Trace:\n");
184 show_trace(task, esp);
188 * The architecture-independent dump_stack generator
190 void dump_stack(void)
194 show_trace(current, &stack);
197 EXPORT_SYMBOL(dump_stack);
199 void show_registers(struct pt_regs *regs)
206 esp = (unsigned long) (®s->esp);
211 ss = regs->xss & 0xffff;
214 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s\nEFLAGS: %08lx"
216 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
217 print_tainted(), regs->eflags, UTS_RELEASE);
218 print_symbol("EIP is at %s\n", regs->eip);
219 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
220 regs->eax, regs->ebx, regs->ecx, regs->edx);
221 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
222 regs->esi, regs->edi, regs->ebp, esp);
223 printk("ds: %04x es: %04x ss: %04x\n",
224 regs->xds & 0xffff, regs->xes & 0xffff, ss);
225 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
226 current->comm, current->pid, current_thread_info(), current);
228 * When in-kernel, we also print out the stack and code at the
229 * time of the fault..
234 show_stack(NULL, (unsigned long*)esp);
237 if(regs->eip < PAGE_OFFSET)
243 if ((user_mode(regs) && get_user(c, &((unsigned char*)regs->eip)[i])) ||
244 (!user_mode(regs) && __direct_get_user(c, &((unsigned char*)regs->eip)[i]))) {
247 printk(" Bad EIP value.");
256 static void handle_BUG(struct pt_regs *regs)
265 goto no_bug; /* Not in kernel */
269 if (__direct_get_user(ud2, (unsigned short *)eip))
273 if (__direct_get_user(line, (unsigned short *)(eip + 2)))
275 if (__direct_get_user(file, (char **)(eip + 4)) ||
276 __direct_get_user(c, file))
277 file = "<bad filename>";
279 printk("------------[ cut here ]------------\n");
280 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
285 /* Here we know it was a BUG but file-n-line is unavailable */
287 printk("Kernel BUG\n");
290 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
292 void die(const char * str, struct pt_regs * regs, long err)
294 static int die_counter;
298 spin_lock_irq(&die_lock);
301 printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
302 #ifdef CONFIG_PREEMPT
310 #ifdef CONFIG_DEBUG_PAGEALLOC
311 printk("DEBUG_PAGEALLOC");
316 show_registers(regs);
318 spin_unlock_irq(&die_lock);
320 panic("Fatal exception in interrupt");
323 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
324 set_current_state(TASK_UNINTERRUPTIBLE);
325 schedule_timeout(5 * HZ);
326 panic("Fatal exception");
331 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
333 if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
337 static inline unsigned long get_cr2(void)
339 unsigned long address;
341 /* get the address */
342 __asm__("movl %%cr2,%0":"=r" (address));
346 static inline void do_trap(int trapnr, int signr, char *str, int vm86,
347 struct pt_regs * regs, long error_code, siginfo_t *info)
349 if (regs->eflags & VM_MASK) {
355 if (!(regs->xcs & 3))
359 struct task_struct *tsk = current;
360 tsk->thread.error_code = error_code;
361 tsk->thread.trap_no = trapnr;
363 force_sig_info(signr, info, tsk);
365 force_sig(signr, tsk);
370 if (!fixup_exception(regs))
371 die(str, regs, error_code);
376 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
377 if (ret) goto trap_signal;
382 #define DO_ERROR(trapnr, signr, str, name) \
383 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
385 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
388 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
389 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
392 info.si_signo = signr; \
394 info.si_code = sicode; \
395 info.si_addr = (void *)siaddr; \
396 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
399 #define DO_VM86_ERROR(trapnr, signr, str, name) \
400 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
402 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
405 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
406 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
409 info.si_signo = signr; \
411 info.si_code = sicode; \
412 info.si_addr = (void *)siaddr; \
413 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
416 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
417 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
418 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
419 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
420 DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
421 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
422 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
423 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
424 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
425 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, get_cr2())
428 * the original non-exec stack patch was written by
429 * Solar Designer <solar at openwall.com>. Thanks!
431 asmlinkage void do_general_protection(struct pt_regs * regs, long error_code)
433 if (regs->eflags & X86_EFLAGS_IF)
436 if (regs->eflags & VM_MASK)
439 if (!(regs->xcs & 3))
443 * lazy-check for CS validity on exec-shield binaries:
446 int cpu = smp_processor_id();
447 struct desc_struct *desc1, *desc2;
448 struct vm_area_struct *vma;
449 unsigned long limit = 0;
451 spin_lock(¤t->mm->page_table_lock);
452 for (vma = current->mm->mmap; vma; vma = vma->vm_next)
453 if ((vma->vm_flags & VM_EXEC) && (vma->vm_end > limit))
455 spin_unlock(¤t->mm->page_table_lock);
457 current->mm->context.exec_limit = limit;
458 set_user_cs(¤t->mm->context.user_cs, limit);
460 desc1 = ¤t->mm->context.user_cs;
461 desc2 = cpu_gdt_table[cpu] + GDT_ENTRY_DEFAULT_USER_CS;
464 * The CS was not in sync - reload it and retry the
465 * instruction. If the instruction still faults then
466 * we wont hit this branch next time around.
468 if (desc1->a != desc2->a || desc1->b != desc2->b) {
469 if (print_fatal_signals >= 2) {
470 printk("#GPF fixup (%ld[seg:%lx]) at %08lx, CPU#%d.\n", error_code, error_code/8, regs->eip, smp_processor_id());
471 printk(" exec_limit: %08lx, user_cs: %08lx/%08lx, CPU_cs: %08lx/%08lx.\n", current->mm->context.exec_limit, desc1->a, desc1->b, desc2->a, desc2->b);
473 load_user_cs_desc(cpu, current->mm);
477 if (print_fatal_signals) {
478 printk("#GPF(%ld[seg:%lx]) at %08lx, CPU#%d.\n", error_code, error_code/8, regs->eip, smp_processor_id());
479 printk(" exec_limit: %08lx, user_cs: %08lx/%08lx.\n", current->mm->context.exec_limit, current->mm->context.user_cs.a, current->mm->context.user_cs.b);
482 current->thread.error_code = error_code;
483 current->thread.trap_no = 13;
484 force_sig(SIGSEGV, current);
489 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
493 if (!fixup_exception(regs))
494 die("general protection fault", regs, error_code);
497 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
499 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
500 printk("You probably have a hardware problem with your RAM chips\n");
502 /* Clear and disable the memory parity error line. */
503 clear_mem_error(reason);
506 static void io_check_error(unsigned char reason, struct pt_regs * regs)
510 printk("NMI: IOCK error (debug interrupt?)\n");
511 show_registers(regs);
513 /* Re-enable the IOCK line, wait for a few seconds */
514 reason = (reason & 0xf) | 8;
517 while (--i) udelay(1000);
522 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
525 /* Might actually be able to figure out what the guilty party
532 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
533 reason, smp_processor_id());
534 printk("Dazed and confused, but trying to continue\n");
535 printk("Do you have a strange power saving mode enabled?\n");
538 static void default_do_nmi(struct pt_regs * regs)
540 unsigned char reason = get_nmi_reason();
542 if (!(reason & 0xc0)) {
543 #ifdef CONFIG_X86_LOCAL_APIC
545 * Ok, so this is none of the documented NMI sources,
546 * so it must be the NMI watchdog.
549 nmi_watchdog_tick(regs);
553 unknown_nmi_error(reason, regs);
557 mem_parity_error(reason, regs);
559 io_check_error(reason, regs);
561 * Reassert NMI in case it became active meanwhile
562 * as it's edge-triggered.
567 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
572 static nmi_callback_t nmi_callback = dummy_nmi_callback;
574 asmlinkage void do_nmi(struct pt_regs * regs, long error_code)
580 cpu = smp_processor_id();
583 if (!nmi_callback(regs, cpu))
584 default_do_nmi(regs);
589 void set_nmi_callback(nmi_callback_t callback)
591 nmi_callback = callback;
594 void unset_nmi_callback(void)
596 nmi_callback = dummy_nmi_callback;
600 * Our handling of the processor debug registers is non-trivial.
601 * We do not clear them on entry and exit from the kernel. Therefore
602 * it is possible to get a watchpoint trap here from inside the kernel.
603 * However, the code in ./ptrace.c has ensured that the user can
604 * only set watchpoints on userspace addresses. Therefore the in-kernel
605 * watchpoint trap can only occur in code which is reading/writing
606 * from user space. Such code must not hold kernel locks (since it
607 * can equally take a page fault), therefore it is safe to call
608 * force_sig_info even though that claims and releases locks.
610 * Code in ./signal.c ensures that the debug control register
611 * is restored before we deliver any signal, and therefore that
612 * user code runs with the correct debug control register even though
615 * Being careful here means that we don't have to be as careful in a
616 * lot of more complicated places (task switching can be a bit lazy
617 * about restoring all the debug state, and ptrace doesn't have to
618 * find every occurrence of the TF bit that could be saved away even
621 asmlinkage void do_debug(struct pt_regs * regs, long error_code)
623 unsigned int condition;
624 struct task_struct *tsk = current;
627 __asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
629 /* It's safe to allow irq's after DR6 has been saved */
630 if (regs->eflags & X86_EFLAGS_IF)
634 * Mask out spurious debug traps due to lazy DR7 setting or
635 * due to 4G/4G kernel mode:
637 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
638 if (!tsk->thread.debugreg[7])
640 if (!user_mode(regs)) {
641 // restore upon return-to-userspace:
642 set_thread_flag(TIF_DB7);
647 if (regs->eflags & VM_MASK)
650 /* Save debug status register where ptrace can see it */
651 tsk->thread.debugreg[6] = condition;
653 /* Mask out spurious TF errors due to lazy TF clearing */
654 if (condition & DR_STEP) {
656 * The TF error should be masked out only if the current
657 * process is not traced and if the TRAP flag has been set
658 * previously by a tracing process (condition detected by
659 * the PT_DTRACE flag); remember that the i386 TRAP flag
660 * can be modified by the process itself in user mode,
661 * allowing programs to debug themselves without the ptrace()
664 if ((regs->xcs & 3) == 0)
665 goto clear_TF_reenable;
666 if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE)
670 /* Ok, finally something we can handle */
671 tsk->thread.trap_no = 1;
672 tsk->thread.error_code = error_code;
673 info.si_signo = SIGTRAP;
675 info.si_code = TRAP_BRKPT;
677 /* If this is a kernel mode trap, save the user PC on entry to
678 * the kernel, that's what the debugger can make sense of.
680 info.si_addr = ((regs->xcs & 3) == 0) ? (void *)tsk->thread.eip :
682 force_sig_info(SIGTRAP, &info, tsk);
684 /* Disable additional traps. They'll be re-enabled when
685 * the signal is delivered.
688 __asm__("movl %0,%%db7"
694 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
698 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
700 regs->eflags &= ~TF_MASK;
705 * Note that we play around with the 'TS' bit in an attempt to get
706 * the correct behaviour even in the presence of the asynchronous
709 void math_error(void *eip)
711 struct task_struct * task;
713 unsigned short cwd, swd;
716 * Save the info for the exception handler and clear the error.
720 task->thread.trap_no = 16;
721 task->thread.error_code = 0;
722 info.si_signo = SIGFPE;
724 info.si_code = __SI_FAULT;
727 * (~cwd & swd) will mask out exceptions that are not set to unmasked
728 * status. 0x3f is the exception bits in these regs, 0x200 is the
729 * C1 reg you need in case of a stack fault, 0x040 is the stack
730 * fault bit. We should only be taking one exception at a time,
731 * so if this combination doesn't produce any single exception,
732 * then we have a bad program that isn't syncronizing its FPU usage
733 * and it will suffer the consequences since we won't be able to
734 * fully reproduce the context of the exception
736 cwd = get_fpu_cwd(task);
737 swd = get_fpu_swd(task);
738 switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
742 case 0x001: /* Invalid Op */
743 case 0x041: /* Stack Fault */
744 case 0x241: /* Stack Fault | Direction */
745 info.si_code = FPE_FLTINV;
746 /* Should we clear the SF or let user space do it ???? */
748 case 0x002: /* Denormalize */
749 case 0x010: /* Underflow */
750 info.si_code = FPE_FLTUND;
752 case 0x004: /* Zero Divide */
753 info.si_code = FPE_FLTDIV;
755 case 0x008: /* Overflow */
756 info.si_code = FPE_FLTOVF;
758 case 0x020: /* Precision */
759 info.si_code = FPE_FLTRES;
762 force_sig_info(SIGFPE, &info, task);
765 asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code)
768 math_error((void *)regs->eip);
771 void simd_math_error(void *eip)
773 struct task_struct * task;
775 unsigned short mxcsr;
778 * Save the info for the exception handler and clear the error.
782 task->thread.trap_no = 19;
783 task->thread.error_code = 0;
784 info.si_signo = SIGFPE;
786 info.si_code = __SI_FAULT;
789 * The SIMD FPU exceptions are handled a little differently, as there
790 * is only a single status/control register. Thus, to determine which
791 * unmasked exception was caught we must mask the exception mask bits
792 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
794 mxcsr = get_fpu_mxcsr(task);
795 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
799 case 0x001: /* Invalid Op */
800 info.si_code = FPE_FLTINV;
802 case 0x002: /* Denormalize */
803 case 0x010: /* Underflow */
804 info.si_code = FPE_FLTUND;
806 case 0x004: /* Zero Divide */
807 info.si_code = FPE_FLTDIV;
809 case 0x008: /* Overflow */
810 info.si_code = FPE_FLTOVF;
812 case 0x020: /* Precision */
813 info.si_code = FPE_FLTRES;
816 force_sig_info(SIGFPE, &info, task);
819 asmlinkage void do_simd_coprocessor_error(struct pt_regs * regs,
823 /* Handle SIMD FPU exceptions on PIII+ processors. */
825 simd_math_error((void *)regs->eip);
828 * Handle strange cache flush from user space exception
829 * in all other cases. This is undocumented behaviour.
831 if (regs->eflags & VM_MASK) {
832 handle_vm86_fault((struct kernel_vm86_regs *)regs,
836 die_if_kernel("cache flush denied", regs, error_code);
837 current->thread.trap_no = 19;
838 current->thread.error_code = error_code;
839 force_sig(SIGSEGV, current);
843 asmlinkage void do_spurious_interrupt_bug(struct pt_regs * regs,
847 /* No need to warn about this any longer. */
848 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
853 * 'math_state_restore()' saves the current math information in the
854 * old math state array, and gets the new ones from the current task
856 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
857 * Don't touch unless you *really* know how it works.
859 * Must be called with kernel preemption disabled (in this case,
860 * local interrupts are disabled at the call-site in entry.S).
862 asmlinkage void math_state_restore(struct pt_regs regs)
864 struct thread_info *thread = current_thread_info();
865 struct task_struct *tsk = thread->task;
867 clts(); /* Allow maths ops (or we recurse) */
871 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
874 #ifndef CONFIG_MATH_EMULATION
876 asmlinkage void math_emulate(long arg)
878 printk("math-emulation not enabled and no coprocessor found.\n");
879 printk("killing %s.\n",current->comm);
880 force_sig(SIGFPE,current);
884 #endif /* CONFIG_MATH_EMULATION */
886 void __init trap_init_virtual_IDT(void)
889 * "idt" is magic - it overlaps the idt_descr
890 * variable so that updating idt will automatically
891 * update the idt descriptor..
893 __set_fixmap(FIX_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
894 idt_descr.address = __fix_to_virt(FIX_IDT);
896 __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
899 void __init trap_init_virtual_GDT(void)
901 int cpu = smp_processor_id();
902 struct Xgt_desc_struct *gdt_desc = cpu_gdt_descr + cpu;
903 struct Xgt_desc_struct tmp_desc = {0, 0};
904 struct tss_struct * t;
906 __asm__ __volatile__("sgdt %0": "=m" (tmp_desc): :"memory");
908 #ifdef CONFIG_X86_HIGH_ENTRY
910 __set_fixmap(FIX_GDT_0, __pa(cpu_gdt_table), PAGE_KERNEL);
911 __set_fixmap(FIX_GDT_1, __pa(cpu_gdt_table) + PAGE_SIZE, PAGE_KERNEL);
912 __set_fixmap(FIX_TSS_0, __pa(init_tss), PAGE_KERNEL);
913 __set_fixmap(FIX_TSS_1, __pa(init_tss) + 1*PAGE_SIZE, PAGE_KERNEL);
914 __set_fixmap(FIX_TSS_2, __pa(init_tss) + 2*PAGE_SIZE, PAGE_KERNEL);
915 __set_fixmap(FIX_TSS_3, __pa(init_tss) + 3*PAGE_SIZE, PAGE_KERNEL);
918 gdt_desc->address = __fix_to_virt(FIX_GDT_0) + sizeof(cpu_gdt_table[0]) * cpu;
920 gdt_desc->address = (unsigned long)cpu_gdt_table[cpu];
922 __asm__ __volatile__("lgdt %0": "=m" (*gdt_desc));
924 #ifdef CONFIG_X86_HIGH_ENTRY
925 t = (struct tss_struct *) __fix_to_virt(FIX_TSS_0) + cpu;
929 set_tss_desc(cpu, t);
930 cpu_gdt_table[cpu][GDT_ENTRY_TSS].b &= 0xfffffdff;
934 #define _set_gate(gate_addr,type,dpl,addr,seg) \
937 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
939 "movl %%eax,%0\n\t" \
941 :"=m" (*((long *) (gate_addr))), \
942 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
943 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
944 "3" ((char *) (addr)),"2" ((seg) << 16)); \
949 * This needs to use 'idt_table' rather than 'idt', and
950 * thus use the _nonmapped_ version of the IDT, as the
951 * Pentium F0 0F bugfix can have resulted in the mapped
952 * IDT being write-protected.
954 void set_intr_gate(unsigned int n, void *addr)
956 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
959 void __init set_trap_gate(unsigned int n, void *addr)
961 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
964 void __init set_system_gate(unsigned int n, void *addr)
966 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
969 void __init set_call_gate(void *a, void *addr)
971 _set_gate(a,12,3,addr,__KERNEL_CS);
974 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
976 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
980 void __init trap_init(void)
983 if (isa_readl(0x0FFFD9) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
988 #ifdef CONFIG_X86_LOCAL_APIC
989 init_apic_mappings();
991 init_entry_mappings();
993 set_trap_gate(0,÷_error);
994 set_intr_gate(1,&debug);
995 set_intr_gate(2,&nmi);
996 set_system_gate(3,&int3); /* int3-5 can be called from all */
997 set_system_gate(4,&overflow);
998 set_system_gate(5,&bounds);
999 set_trap_gate(6,&invalid_op);
1000 set_trap_gate(7,&device_not_available);
1001 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
1002 set_trap_gate(9,&coprocessor_segment_overrun);
1003 set_trap_gate(10,&invalid_TSS);
1004 set_trap_gate(11,&segment_not_present);
1005 set_trap_gate(12,&stack_segment);
1006 set_trap_gate(13,&general_protection);
1007 set_intr_gate(14,&page_fault);
1008 set_trap_gate(15,&spurious_interrupt_bug);
1009 set_trap_gate(16,&coprocessor_error);
1010 set_trap_gate(17,&alignment_check);
1011 #ifdef CONFIG_X86_MCE
1012 set_trap_gate(18,&machine_check);
1014 set_trap_gate(19,&simd_coprocessor_error);
1016 set_system_gate(SYSCALL_VECTOR,&system_call);
1019 * default LDT is a single-entry callgate to lcall7 for iBCS
1020 * and a callgate to lcall27 for Solaris/x86 binaries
1023 set_call_gate(&default_ldt[0],lcall7);
1024 set_call_gate(&default_ldt[4],lcall27);
1027 * Should be a barrier for any external CPU state.