2 * Copyright 2002 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/config.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/ioport.h>
31 #include <linux/console.h>
32 #include <linux/delay.h>
35 #include <asm/bootinfo.h>
37 #include <asm/mipsregs.h>
38 #include <asm/reboot.h>
39 #include <asm/pgtable.h>
40 #include <asm/mach-au1x00/au1000.h>
41 #include <asm/mach-pb1x00/pb1100.h>
43 #ifdef CONFIG_USB_OHCI
44 // Enable the workaround for the OHCI DoneHead
45 // register corruption problem.
46 #define CONFIG_AU1000_OHCI_FIX
47 ^^^^^^^^^^^^^^^^^^^^^^
48 !!! I shall not define symbols starting with CONFIG_ !!!
51 void board_reset (void)
53 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
54 au_writel(0x00000000, 0xAE00001C);
57 void __init board_setup(void)
60 u32 sys_freqctrl, sys_clksrc;
62 // set AUX clock to 12MHz * 8 = 96 MHz
63 au_writel(8, SYS_AUXPLL);
64 au_writel(0, SYS_PININPUTEN);
67 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
68 // configure pins GPIO[14:9] as GPIO
69 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
71 /* zero and disable FREQ2 */
72 sys_freqctrl = au_readl(SYS_FREQCTRL0);
73 sys_freqctrl &= ~0xFFF00000;
74 au_writel(sys_freqctrl, SYS_FREQCTRL0);
76 /* zero and disable USBH/USBD/IrDA clock */
77 sys_clksrc = au_readl(SYS_CLKSRC);
78 sys_clksrc &= ~0x0000001F;
79 au_writel(sys_clksrc, SYS_CLKSRC);
81 sys_freqctrl = au_readl(SYS_FREQCTRL0);
82 sys_freqctrl &= ~0xFFF00000;
84 sys_clksrc = au_readl(SYS_CLKSRC);
85 sys_clksrc &= ~0x0000001F;
87 // FREQ2 = aux/2 = 48 MHz
88 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
89 au_writel(sys_freqctrl, SYS_FREQCTRL0);
92 * Route 48MHz FREQ2 into USBH/USBD/IrDA
94 sys_clksrc |= ((4<<2) | (0<<1) | 0 );
95 au_writel(sys_clksrc, SYS_CLKSRC);
97 /* setup the static bus controller */
98 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
99 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
100 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
102 // get USB Functionality pin state (device vs host drive pins)
103 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
104 #ifndef CONFIG_AU1X00_USB_DEVICE
105 // 2nd USB port is USB host
108 au_writel(pin_func, SYS_PINFUNC);
109 #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
111 /* Enable sys bus clock divider when IDLE state or no bus activity. */
112 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
114 // Enable the RTC if not already enabled
115 if (!(readb(0xac000028) & 0x20)) {
116 writeb(readb(0xac000028) | 0x20, 0xac000028);
119 // Put the clock in BCD mode
120 if (readb(0xac00002C) & 0x4) { /* reg B */
121 writeb(readb(0xac00002c) & ~0x4, 0xac00002c);