1 #include <linux/linkage.h>
2 #include <linux/sched.h>
5 #include <asm/titan_dep.h>
7 #define LAUNCHSTACK_SIZE 256
9 static spinlock_t launch_lock __initdata;
11 static unsigned long secondary_sp __initdata;
12 static unsigned long secondary_gp __initdata;
14 static unsigned char launchstack[LAUNCHSTACK_SIZE] __initdata
15 __attribute__((aligned(2 * sizeof(long))));
17 static void __init prom_smp_bootstrap(void)
21 while (spin_is_locked(&launch_lock));
28 : "r" (secondary_sp), "r" (secondary_gp));
32 * PMON is a fragile beast. It'll blow up once the mappings it's littering
33 * right into the middle of KSEG3 are blown away so we have to grab the slave
34 * core early and keep it in a waiting loop.
36 void __init prom_grab_secondary(void)
38 spin_lock(&launch_lock);
40 debug_vectors->cpustart(1, &prom_smp_bootstrap,
41 launchstack + LAUNCHSTACK_SIZE, 0);
45 * Detect available CPUs, populate phys_cpu_present_map before smp_init
47 * We don't want to start the secondary CPU yet nor do we have a nice probing
48 * feature in PMON so we just assume presence of the secondary core.
50 void prom_prepare_cpus(unsigned int max_cpus)
52 cpus_clear(phys_cpu_present_map);
57 cpu_set(0, phys_cpu_present_map);
58 __cpu_number_map[0] = 0;
59 __cpu_logical_map[0] = 0;
64 cpu_set(1, phys_cpu_present_map);
65 __cpu_number_map[1] = 1;
66 __cpu_logical_map[1] = 1;
70 * Firmware CPU startup hook
71 * Complicated by PMON's weird interface which tries to minimic the UNIX fork.
72 * It launches the next * available CPU and copies some information on the
73 * stack so the first thing we do is throw away that stuff and load useful
74 * values into the registers ...
76 void prom_boot_secondary(int cpu, struct task_struct *idle)
78 unsigned long gp = (unsigned long) idle->thread_info;
79 unsigned long sp = gp + THREAD_SIZE - 32;
84 spin_unlock(&launch_lock);
87 /* Hook for after all CPUs are online */
88 void prom_cpus_done(void)
93 * After we've done initial boot, this function is called to allow the
94 * board code to clean up state, if needed
96 void prom_init_secondary(void)
98 set_c0_status(ST0_CO | ST0_IE | ST0_IM);
101 void prom_smp_finish(void)
105 asmlinkage void titan_mailbox_irq(struct pt_regs *regs)
107 int cpu = smp_processor_id();
108 unsigned long status;
111 status = OCD_READ(RM9000x2_OCD_INTP0STATUS3);
112 OCD_WRITE(RM9000x2_OCD_INTP0CLEAR3, status);
116 status = OCD_READ(RM9000x2_OCD_INTP1STATUS3);
117 OCD_WRITE(RM9000x2_OCD_INTP1CLEAR3, status);
121 smp_call_function_interrupt();
125 * Send inter-processor interrupt
127 void core_send_ipi(int cpu, unsigned int action)
130 * Generate an INTMSG so that it can be sent over to the
131 * destination CPU. The INTMSG will put the STATUS bits
132 * based on the action desired. An alternative strategy
133 * is to write to the Interrupt Set register, read the
134 * Interrupt Status register and clear the Interrupt
135 * Clear register. The latter is preffered.
138 case SMP_RESCHEDULE_YOURSELF:
140 OCD_WRITE(RM9000x2_OCD_INTP1SET3, 4);
142 OCD_WRITE(RM9000x2_OCD_INTP0SET3, 4);
145 case SMP_CALL_FUNCTION:
147 OCD_WRITE(RM9000x2_OCD_INTP1SET3, 2);
149 OCD_WRITE(RM9000x2_OCD_INTP0SET3, 2);