2 * Copyright (C) 2000, 2001 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 * These are routines to set up and handle interrupts from the
21 * sb1250 general purpose timer 0. We're using the timer as a
22 * system clock, so we set it up to run at 100 Hz. On every
23 * interrupt, we update our idea of what the time of day is,
24 * then call do_timer() in the architecture-independent kernel
25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.)
28 #include <linux/config.h>
29 #include <linux/interrupt.h>
30 #include <linux/sched.h>
31 #include <linux/spinlock.h>
32 #include <linux/kernel_stat.h>
35 #include <asm/ptrace.h>
36 #include <asm/addrspace.h>
40 #include <asm/sibyte/sb1250.h>
41 #include <asm/sibyte/sb1250_regs.h>
42 #include <asm/sibyte/sb1250_int.h>
43 #include <asm/sibyte/sb1250_scd.h>
46 #define IMR_IP2_VAL K_INT_MAP_I0
47 #define IMR_IP3_VAL K_INT_MAP_I1
48 #define IMR_IP4_VAL K_INT_MAP_I2
50 extern int sb1250_steal_irq(int irq);
52 void sb1250_time_init(void)
54 int cpu = smp_processor_id();
55 int irq = K_INT_TIMER_0+cpu;
57 /* Only have 4 general purpose timers */
63 /* Use our own gettimeoffset() routine */
64 do_gettimeoffset = sb1250_gettimeoffset;
67 sb1250_mask_irq(cpu, irq);
69 /* Map the timer interrupt to ip[4] of this cpu */
70 __raw_writeq(IMR_IP4_VAL, IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
73 /* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
74 /* Disable the timer and set up the count */
75 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
76 #ifdef CONFIG_SIMULATION
77 __raw_writeq(50000 / HZ, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
79 __raw_writeq(1000000/HZ, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
82 /* Set the timer running */
83 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
84 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
86 sb1250_unmask_irq(cpu, irq);
87 sb1250_steal_irq(irq);
89 * This interrupt is "special" in that it doesn't use the request_irq
90 * way to hook the irq line. The timer interrupt is initialized early
91 * enough to make this a major pain, and it's also firing enough to
92 * warrant a bit of special case code. sb1250_timer_interrupt is
93 * called directly from irq_handler.S when IP[4] is set during an
98 void sb1250_timer_interrupt(struct pt_regs *regs)
100 extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
101 int cpu = smp_processor_id();
102 int irq = K_INT_TIMER_0 + cpu;
104 /* Reset the timer */
105 ____raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
106 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
109 * CPU 0 handles the global timer interrupt job
112 ll_timer_interrupt(irq, regs);
116 * every CPU should do profiling and process accouting
118 ll_local_timer_interrupt(irq, regs);
122 * We use our own do_gettimeoffset() instead of the generic one,
123 * because the generic one does not work for SMP case.
124 * In addition, since we use general timer 0 for system time,
125 * we can get accurate intra-jiffy offset without calibration.
127 unsigned long sb1250_gettimeoffset(void)
129 unsigned long count =
130 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
132 return 1000000/HZ - count;