1 /* Board specific functions for those embedded 8xx boards that do
2 * not have boot monitor support for board information.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
10 #include <linux/types.h>
11 #include <linux/config.h>
12 #include <linux/string.h>
14 #include <asm/mpc8xx.h>
17 #include <asm/mpc8260.h>
18 #include <asm/immap_8260.h>
23 extern unsigned long timebase_period_ns;
25 /* For those boards that don't provide one.
27 #if !defined(CONFIG_MBX)
32 * These are just the basic master read/write operations so we can
33 * examine serial EEPROM.
35 extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
37 /* Supply a default Ethernet address for those eval boards that don't
38 * ship with one. This is an address from the MBX board I have, so
39 * it is unlikely you will find it on your network.
41 static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
43 #if defined(CONFIG_MBX)
45 /* The MBX hands us a pretty much ready to go board descriptor. This
46 * is where the idea started in the first place.
49 embed_config(bd_t **bdp)
58 /* Read the first 128 bytes of the EEPROM. There is more,
59 * but this is all we need.
61 iic_read(0xa4, eebuf, 0, 128);
63 /* All we are looking for is the Ethernet MAC address. The
64 * first 8 bytes are 'MOTOROLA', so check for part of that.
65 * Next, the VPD describes a MAC 'packet' as being of type 08
66 * and size 06. So we look for that and the MAC must follow.
67 * If there are more than one, we still only care about the first.
68 * If it's there, assume we have a valid MAC address. If not,
69 * grab our default one.
71 if ((*(uint *)eebuf) == 0x4d4f544f) {
72 while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06))
73 i += eebuf[i + 1] + 2; /* skip this packet */
75 if (i == 127) /* Couldn't find. */
76 mp = (u_char *)def_enet_addr;
81 mp = (u_char *)def_enet_addr;
84 bd->bi_enetaddr[i] = *mp++;
86 /* The boot rom passes these to us in MHz. Linux now expects
89 bd->bi_intfreq *= 1000000;
90 bd->bi_busfreq *= 1000000;
92 /* Stuff a baud rate here as well.
94 bd->bi_baudrate = 9600;
96 #endif /* CONFIG_MBX */
98 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \
99 defined(CONFIG_RPX6) || defined(CONFIG_EP405)
100 /* Helper functions for Embedded Planet boards.
102 /* Because I didn't find anything that would do this.......
105 aschex_to_byte(u_char *cp)
111 if ((c >= 'A') && (c <= 'F')) {
114 } else if ((c >= 'a') && (c <= 'f')) {
124 if ((c >= 'A') && (c <= 'F')) {
127 } else if ((c >= 'a') && (c <= 'f')) {
139 rpx_eth(bd_t *bd, u_char *cp)
143 for (i=0; i<6; i++) {
144 bd->bi_enetaddr[i] = aschex_to_byte(cp);
151 rpx_baseten(u_char *cp)
157 while (*cp != '\n') {
159 retval += (*cp) - '0';
166 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
168 rpx_brate(bd_t *bd, u_char *cp)
174 while (*cp != '\n') {
180 bd->bi_baudrate = rate * 100;
184 rpx_cpuspeed(bd_t *bd, u_char *cp)
190 while (*cp != '\n') {
201 /* I don't know why the RPX just can't state the actual
208 bd->bi_intfreq = bd->bi_busfreq = num * 1000000;
210 /* The 8xx can only run a maximum 50 MHz bus speed (until
211 * Motorola changes this :-). Greater than 50 MHz parts
212 * run internal/2 for bus speed.
219 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405)
221 rpx_memsize(bd_t *bd, u_char *cp)
227 while (*cp != '\n') {
233 bd->bi_memsize = size * 1024 * 1024;
235 #endif /* LITE || CLASSIC || EP405 */
236 #if defined(CONFIG_EP405)
238 rpx_nvramsize(bd_t *bd, u_char *cp)
244 while (*cp != '\n') {
250 bd->bi_nvramsize = size * 1024;
252 #endif /* CONFIG_EP405 */
254 #endif /* Embedded Planet boards */
256 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
258 /* Read the EEPROM on the RPX-Lite board.
261 embed_config(bd_t **bdp)
263 u_char eebuf[256], *cp;
266 /* Read the first 256 bytes of the EEPROM. I think this
267 * is really all there is, and I hope if it gets bigger the
268 * info we want is still up front.
274 iic_read(0xa8, eebuf, 0, 128);
275 iic_read(0xa8, &eebuf[128], 128, 128);
277 /* We look for two things, the Ethernet address and the
278 * serial baud rate. The records are separated by
308 rpx_cpuspeed(bd, cp);
312 /* Scan to the end of the record.
314 while ((*cp != '\n') && (*cp != 0xff))
317 /* If the next character is a 0 or ff, we are done.
320 if ((*cp == 0) || (*cp == 0xff))
325 /* For boards without initialized EEPROM.
328 bd->bi_memsize = (8 * 1024 * 1024);
329 bd->bi_intfreq = 48000000;
330 bd->bi_busfreq = 48000000;
331 bd->bi_baudrate = 9600;
334 #endif /* RPXLITE || RPXCLASSIC */
337 /* Build a board information structure for the BSE ip-Engine.
338 * There is more to come since we will add some environment
339 * variables and a function to read them.
342 embed_config(bd_t **bdp)
351 /* Baud rate and processor speed will eventually come
352 * from the environment variables.
354 bd->bi_baudrate = 9600;
356 /* Get the Ethernet station address from the Flash ROM.
358 cp = (u_char *)0xfe003ffa;
359 for (i=0; i<6; i++) {
360 bd->bi_enetaddr[i] = *cp++;
363 /* The rest of this should come from the environment as well.
366 bd->bi_memsize = (16 * 1024 * 1024);
367 bd->bi_intfreq = 48000000;
368 bd->bi_busfreq = 48000000;
373 /* Build a board information structure for the FADS.
376 embed_config(bd_t **bdp)
385 /* Just fill in some known values.
387 bd->bi_baudrate = 9600;
391 cp = (u_char *)def_enet_addr;
392 for (i=0; i<6; i++) {
393 bd->bi_enetaddr[i] = *cp++;
397 bd->bi_memsize = (8 * 1024 * 1024);
398 bd->bi_intfreq = 40000000;
399 bd->bi_busfreq = 40000000;
404 /* Compute 8260 clock values if the rom doesn't provide them.
405 * We can't compute the internal core frequency (I don't know how to
411 uint scmr, vco_out, clkin;
412 uint plldf, pllmf, busdf, brgdf, cpmdf;
413 volatile immap_t *ip;
415 ip = (immap_t *)IMAP_ADDR;
416 scmr = ip->im_clkrst.car_scmr;
418 /* The clkin is always bus frequency.
420 clkin = bd->bi_busfreq;
422 /* Collect the bits from the scmr.
424 plldf = (scmr >> 12) & 1;
425 pllmf = scmr & 0xfff;
426 cpmdf = (scmr >> 16) & 0x0f;
427 busdf = (scmr >> 20) & 0x0f;
429 /* This is arithmetic from the 8260 manual.
431 vco_out = clkin / (plldf + 1);
432 vco_out *= 2 * (pllmf + 1);
433 bd->bi_vco = vco_out; /* Save for later */
435 bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */
437 /* Set Baud rate divisor. The power up default is divide by 16,
438 * but we set it again here in case it was changed.
440 ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */
441 bd->bi_brgfreq = vco_out / 16;
445 #if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
447 embed_config(bd_t **bdp)
455 /* This is actually provided by my boot rom. I have it
456 * here for those people that may load the kernel with
457 * a JTAG/COP tool and not the rom monitor.
459 bd->bi_baudrate = 115200;
460 bd->bi_intfreq = 200000000;
461 bd->bi_busfreq = 66666666;
462 bd->bi_cpmfreq = 66666666;
463 bd->bi_brgfreq = 33333333;
464 bd->bi_memsize = 16 * 1024 * 1024;
466 /* The boot rom passes these to us in MHz. Linux now expects
469 bd->bi_intfreq *= 1000000;
470 bd->bi_busfreq *= 1000000;
471 bd->bi_cpmfreq *= 1000000;
472 bd->bi_brgfreq *= 1000000;
475 cp = (u_char *)def_enet_addr;
476 for (i=0; i<6; i++) {
477 bd->bi_enetaddr[i] = *cp++;
482 #ifdef CONFIG_SBS8260
484 embed_config(bd_t **bdp)
490 /* This should provided by the boot rom.
494 bd->bi_baudrate = 9600;
495 bd->bi_memsize = 64 * 1024 * 1024;
497 /* Set all of the clocks. We have to know the speed of the
498 * external clock. The development board had 66 MHz.
500 bd->bi_busfreq = 66666666;
503 /* I don't know how to compute this yet.
505 bd->bi_intfreq = 133000000;
508 cp = (u_char *)def_enet_addr;
509 for (i=0; i<6; i++) {
510 bd->bi_enetaddr[i] = *cp++;
517 embed_config(bd_t **bdp)
519 u_char *cp, *keyvals;
523 keyvals = (u_char *)*bdp;
528 /* This is almost identical to the RPX-Lite/Classic functions
529 * on the 8xx boards. It would be nice to have a key lookup
530 * function in a string, but the format of all of the fields
531 * is slightly different.
546 bd->bi_baudrate = rpx_baseten(cp);
553 bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024;
560 bd->bi_busfreq = rpx_baseten(cp);
567 bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024;
571 /* Scan to the end of the record.
573 while ((*cp != '\n') && (*cp != 0xff))
576 /* If the next character is a 0 or ff, we are done.
579 if ((*cp == 0) || (*cp == 0xff))
584 /* The memory size includes both the 60x and local bus DRAM.
585 * I don't want to use the local bus DRAM for real memory,
586 * so subtract it out. It would be nice if they were separate
589 bd->bi_memsize -= 32 * 1024 * 1024;
591 /* Set all of the clocks. We have to know the speed of the
596 /* I don't know how to compute this yet.
598 bd->bi_intfreq = 200000000;
600 #endif /* RPX6 for testing */
602 #ifdef CONFIG_ADS8260
604 embed_config(bd_t **bdp)
610 /* This should provided by the boot rom.
614 bd->bi_baudrate = 9600;
615 bd->bi_memsize = 16 * 1024 * 1024;
617 /* Set all of the clocks. We have to know the speed of the
618 * external clock. The development board had 66 MHz.
620 bd->bi_busfreq = 66666666;
623 /* I don't know how to compute this yet.
625 bd->bi_intfreq = 200000000;
628 cp = (u_char *)def_enet_addr;
629 for (i=0; i<6; i++) {
630 bd->bi_enetaddr[i] = *cp++;
637 embed_config(bd_t **bdp)
643 /* Willow has Open Firmware....I should learn how to get this
644 * information from it.
648 bd->bi_baudrate = 9600;
649 bd->bi_memsize = 32 * 1024 * 1024;
651 /* Set all of the clocks. We have to know the speed of the
652 * external clock. The development board had 66 MHz.
654 bd->bi_busfreq = 66666666;
657 /* I don't know how to compute this yet.
659 bd->bi_intfreq = 200000000;
662 cp = (u_char *)def_enet_addr;
663 for (i=0; i<6; i++) {
664 bd->bi_enetaddr[i] = *cp++;
669 #ifdef CONFIG_XILINX_ML300
671 embed_config(bd_t ** bdp)
673 static const unsigned long line_size = 32;
674 static const unsigned long congruence_classes = 256;
681 * At one point, we were getting machine checks. Linux was not
682 * invalidating the data cache before it was enabled. The
683 * following code was added to do that. Soon after we had done
684 * that, we found the real reasons for the machine checks. I've
685 * run the kernel a few times with the following code
686 * temporarily removed without any apparent problems. However,
687 * I objdump'ed the kernel and boot code and found out that
688 * there were no other dccci's anywhere, so I put the code back
689 * in and have been reluctant to remove it. It seems safer to
690 * just leave it here.
693 addr < (congruence_classes * line_size); addr += line_size) {
694 __asm__("dccci 0,%0": :"b"(addr));
699 bd->bi_memsize = XPAR_DDR_0_SIZE;
700 bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
701 bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
703 #endif /* CONFIG_XILINX_ML300 */
705 #ifdef CONFIG_IBM_OPENBIOS
706 /* This could possibly work for all treeboot roms.
708 #if defined(CONFIG_ASH) || defined(CONFIG_BEECH)
709 #define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
711 #define BOARD_INFO_VECTOR 0xFFFE0B50
716 get_board_info(bd_t **bdp)
718 typedef void (*PFV)(bd_t *bd);
719 ((PFV)(*(unsigned long *)BOARD_INFO_VECTOR))(*bdp);
724 embed_config(bd_t **bdp)
729 #else /* !CONFIG_BEECH */
731 embed_config(bd_t **bdp)
735 bd_t *bd, *treeboot_bd;
736 bd_t *(*get_board_info)(void) =
737 (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
738 #if !defined(CONFIG_STB03xxx)
740 /* shut down the Ethernet controller that the boot rom
741 * sometimes leaves running.
743 mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
744 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
745 out_be32(EMAC0_BASE,0x20000000); /* then reset EMAC */
750 if ((treeboot_bd = get_board_info()) != NULL) {
751 memcpy(bd, treeboot_bd, sizeof(bd_t));
754 /* Hmmm...better try to stuff some defaults.
756 bd->bi_memsize = 16 * 1024 * 1024;
757 cp = (u_char *)def_enet_addr;
758 for (i=0; i<6; i++) {
759 /* I should probably put different ones here,
760 * hopefully only one is used.
762 bd->BD_EMAC_ADDR(0,i) = *cp;
765 bd->bi_pci_enetaddr[i] = *cp++;
768 bd->bi_tbfreq = 200 * 1000 * 1000;
769 bd->bi_intfreq = 200000000;
770 bd->bi_busfreq = 100000000;
772 bd->bi_pci_busfreq = 66666666;
775 /* Yeah, this look weird, but on Redwood 4 they are
776 * different object in the structure. Sincr Redwwood 5
777 * and Redwood 6 use OpenBIOS, it requires a special value.
779 #if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6)
780 bd->bi_tbfreq = 27 * 1000 * 1000;
782 timebase_period_ns = 1000000000 / bd->bi_tbfreq;
784 #endif /* CONFIG_BEECH */
785 #endif /* CONFIG_IBM_OPENBIOS */
788 #include <linux/serial_reg.h>
791 embed_config(bd_t **bdp)
797 /* Different versions of the PlanetCore firmware vary in how
798 they set up the serial port - in particular whether they
799 use the internal or external serial clock for UART0. Make
800 sure the UART is in a known state. */
801 /* FIXME: We should use the board's 11.0592MHz external serial
802 clock - it will be more accurate for serial rates. For
803 now, however the baud rates in ep405.h are for the internal
805 chcr0 = mfdcr(DCRN_CHCR0);
806 if ( (chcr0 & 0x1fff) != 0x103e ) {
807 mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e);
808 /* The following tricks serial_init() into resetting the baud rate */
809 writeb(0, UART0_IO_BASE + UART_LCR);
812 /* We haven't seen actual problems with the EP405 leaving the
813 * EMAC running (as we have on Walnut). But the registers
814 * suggest it may not be left completely quiescent. Reset it
815 * just to be sure. */
816 mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
817 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
818 out_be32((unsigned *)EMAC0_BASE,0x20000000); /* then reset EMAC */
823 cp = (u_char *)0xF0000EE0;
845 rpx_nvramsize(bd, cp);
848 while ((*cp != '\n') && (*cp != 0xff))
852 if ((*cp == 0) || (*cp == 0xff))
855 bd->bi_intfreq = 200000000;
856 bd->bi_busfreq = 100000000;
857 bd->bi_pci_busfreq= 33000000 ;
860 bd->bi_memsize = 64000000;
861 bd->bi_intfreq = 200000000;
862 bd->bi_busfreq = 100000000;
863 bd->bi_pci_busfreq= 33000000 ;
868 #ifdef CONFIG_RAINIER
869 /* Rainier uses vxworks bootrom */
871 embed_config(bd_t **bdp)
880 for(i=0;i<8192;i+=32) {
881 __asm__("dccci 0,%0" :: "r" (i));
883 __asm__("iccci 0,0");
884 __asm__("sync;isync");
886 /* init ram for parity */
887 memset(0, 0,0x400000); /* Lo memory */
890 bd->bi_memsize = (32 * 1024 * 1024) ;
891 bd->bi_intfreq = 133000000; //the internal clock is 133 MHz
892 bd->bi_busfreq = 100000000;
893 bd->bi_pci_busfreq= 33000000;
895 cp = (u_char *)def_enet_addr;
896 for (i=0; i<6; i++) {
897 bd->bi_enetaddr[i] = *cp++;