2 * arch/ppc/kernel/traps.c
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Modified by Cort Dougan (cort@cs.nmt.edu)
12 * and Paul Mackerras (paulus@cs.anu.edu.au)
16 * This file handles the architecture-dependent parts of hardware exceptions
19 #include <linux/errno.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/user.h>
28 #include <linux/a.out.h>
29 #include <linux/interrupt.h>
30 #include <linux/config.h>
31 #include <linux/init.h>
32 #include <linux/module.h>
33 #include <linux/prctl.h>
35 #include <asm/pgtable.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
44 extern int xmon_bpt(struct pt_regs *regs);
45 extern int xmon_sstep(struct pt_regs *regs);
46 extern int xmon_iabr_match(struct pt_regs *regs);
47 extern int xmon_dabr_match(struct pt_regs *regs);
49 int (*debugger)(struct pt_regs *regs) = xmon;
50 int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
51 int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
52 int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
53 int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
54 void (*debugger_fault_handler)(struct pt_regs *regs);
57 int (*debugger)(struct pt_regs *regs);
58 int (*debugger_bpt)(struct pt_regs *regs);
59 int (*debugger_sstep)(struct pt_regs *regs);
60 int (*debugger_iabr_match)(struct pt_regs *regs);
61 int (*debugger_dabr_match)(struct pt_regs *regs);
62 void (*debugger_fault_handler)(struct pt_regs *regs);
64 #define debugger(regs) do { } while (0)
65 #define debugger_bpt(regs) 0
66 #define debugger_sstep(regs) 0
67 #define debugger_iabr_match(regs) 0
68 #define debugger_dabr_match(regs) 0
69 #define debugger_fault_handler ((void (*)(struct pt_regs *))0)
74 * Trap & Exception support
77 DEFINE_SPINLOCK(die_lock);
79 int die(const char * str, struct pt_regs * fp, long err)
81 static int die_counter;
84 spin_lock_irq(&die_lock);
85 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
91 printk("SMP NR_CPUS=%d ", NR_CPUS);
97 spin_unlock_irq(&die_lock);
98 /* do_exit() should take care of panic'ing from an interrupt
99 * context so we don't handle it here
104 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
108 if (!user_mode(regs)) {
110 die("Exception in kernel mode", regs, signr);
112 info.si_signo = signr;
115 info.si_addr = (void __user *) addr;
116 force_sig_info(signr, &info, current);
119 * Init gets no signals that it doesn't have a handler for.
120 * That's all very well, but if it has caused a synchronous
121 * exception and we ignore the resulting signal, it will just
122 * generate the same exception over and over again and we get
123 * nowhere. Better to kill it and let the kernel panic.
125 if (current->pid == 1) {
126 __sighandler_t handler;
128 spin_lock_irq(¤t->sighand->siglock);
129 handler = current->sighand->action[signr-1].sa.sa_handler;
130 spin_unlock_irq(¤t->sighand->siglock);
131 if (handler == SIG_DFL) {
132 /* init has generated a synchronous exception
133 and it doesn't have a handler for the signal */
134 printk(KERN_CRIT "init has generated signal %d "
135 "but has no handler for it\n", signr);
142 * I/O accesses can cause machine checks on powermacs.
143 * Check if the NIP corresponds to the address of a sync
144 * instruction for which there is an entry in the exception
146 * Note that the 601 only takes a machine check on TEA
147 * (transfer error ack) signal assertion, and does not
148 * set any of the top 16 bits of SRR1.
151 static inline int check_io_access(struct pt_regs *regs)
153 #if defined CONFIG_8xx
154 unsigned long msr = regs->msr;
155 const struct exception_table_entry *entry;
156 unsigned int *nip = (unsigned int *)regs->nip;
158 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
159 && (entry = search_exception_tables(regs->nip)) != NULL) {
161 * Check that it's a sync instruction, or somewhere
162 * in the twi; isync; nop sequence that inb/inw/inl uses.
163 * As the address is in the exception table
164 * we should be able to read the instr there.
165 * For the debug message, we look at the preceding
168 if (*nip == 0x60000000) /* nop */
170 else if (*nip == 0x4c00012c) /* isync */
172 /* eieio from I/O string functions */
173 else if ((*nip) == 0x7c0006ac || *(nip+1) == 0x7c0006ac)
175 if (*nip == 0x7c0004ac || (*nip >> 26) == 3 ||
176 (*(nip+1) >> 26) == 3) {
181 rb = (*nip >> 11) & 0x1f;
182 printk(KERN_DEBUG "%s bad port %lx at %p\n",
183 (*nip & 0x100)? "OUT to": "IN from",
184 regs->gpr[rb] - _IO_BASE, nip);
186 regs->nip = entry->fixup;
190 #endif /* CONFIG_8xx */
194 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
195 /* On 4xx, the reason for the machine check or program exception
197 #define get_reason(regs) ((regs)->dsisr)
198 #ifndef CONFIG_FSL_BOOKE
199 #define get_mc_reason(regs) ((regs)->dsisr)
201 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
203 #define REASON_FP ESR_FP
204 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
205 #define REASON_PRIVILEGED ESR_PPR
206 #define REASON_TRAP ESR_PTR
208 /* single-step stuff */
209 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
210 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
213 /* On non-4xx, the reason for the machine check or program
214 exception is in the MSR. */
215 #define get_reason(regs) ((regs)->msr)
216 #define get_mc_reason(regs) ((regs)->msr)
217 #define REASON_FP 0x100000
218 #define REASON_ILLEGAL 0x80000
219 #define REASON_PRIVILEGED 0x40000
220 #define REASON_TRAP 0x20000
222 #define single_stepping(regs) ((regs)->msr & MSR_SE)
223 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
227 * This is "fall-back" implementation for configurations
228 * which don't provide platform-specific machine check info
230 void __attribute__ ((weak))
231 platform_machine_check(struct pt_regs *regs)
235 void machine_check_exception(struct pt_regs *regs)
237 unsigned long reason = get_mc_reason(regs);
239 if (user_mode(regs)) {
241 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
245 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
246 /* the qspan pci read routines can cause machine checks -- Cort */
247 bad_page_fault(regs, regs->dar, SIGBUS);
251 if (debugger_fault_handler) {
252 debugger_fault_handler(regs);
257 if (check_io_access(regs))
260 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
261 if (reason & ESR_IMCP) {
262 printk("Instruction");
263 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
266 printk(" machine check in kernel mode.\n");
267 #elif defined(CONFIG_440A)
268 printk("Machine check in kernel mode.\n");
269 if (reason & ESR_IMCP){
270 printk("Instruction Synchronous Machine Check exception\n");
271 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
274 u32 mcsr = mfspr(SPRN_MCSR);
276 printk("Instruction Read PLB Error\n");
278 printk("Data Read PLB Error\n");
280 printk("Data Write PLB Error\n");
281 if (mcsr & MCSR_TLBP)
282 printk("TLB Parity Error\n");
283 if (mcsr & MCSR_ICP){
284 flush_instruction_cache();
285 printk("I-Cache Parity Error\n");
287 if (mcsr & MCSR_DCSP)
288 printk("D-Cache Search Parity Error\n");
289 if (mcsr & MCSR_DCFP)
290 printk("D-Cache Flush Parity Error\n");
291 if (mcsr & MCSR_IMPE)
292 printk("Machine Check exception is imprecise\n");
295 mtspr(SPRN_MCSR, mcsr);
297 #elif defined (CONFIG_E500)
298 printk("Machine check in kernel mode.\n");
299 printk("Caused by (from MCSR=%lx): ", reason);
301 if (reason & MCSR_MCP)
302 printk("Machine Check Signal\n");
303 if (reason & MCSR_ICPERR)
304 printk("Instruction Cache Parity Error\n");
305 if (reason & MCSR_DCP_PERR)
306 printk("Data Cache Push Parity Error\n");
307 if (reason & MCSR_DCPERR)
308 printk("Data Cache Parity Error\n");
309 if (reason & MCSR_GL_CI)
310 printk("Guarded Load or Cache-Inhibited stwcx.\n");
311 if (reason & MCSR_BUS_IAERR)
312 printk("Bus - Instruction Address Error\n");
313 if (reason & MCSR_BUS_RAERR)
314 printk("Bus - Read Address Error\n");
315 if (reason & MCSR_BUS_WAERR)
316 printk("Bus - Write Address Error\n");
317 if (reason & MCSR_BUS_IBERR)
318 printk("Bus - Instruction Data Error\n");
319 if (reason & MCSR_BUS_RBERR)
320 printk("Bus - Read Data Bus Error\n");
321 if (reason & MCSR_BUS_WBERR)
322 printk("Bus - Read Data Bus Error\n");
323 if (reason & MCSR_BUS_IPERR)
324 printk("Bus - Instruction Parity Error\n");
325 if (reason & MCSR_BUS_RPERR)
326 printk("Bus - Read Parity Error\n");
327 #elif defined (CONFIG_E200)
328 printk("Machine check in kernel mode.\n");
329 printk("Caused by (from MCSR=%lx): ", reason);
331 if (reason & MCSR_MCP)
332 printk("Machine Check Signal\n");
333 if (reason & MCSR_CP_PERR)
334 printk("Cache Push Parity Error\n");
335 if (reason & MCSR_CPERR)
336 printk("Cache Parity Error\n");
337 if (reason & MCSR_EXCP_ERR)
338 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
339 if (reason & MCSR_BUS_IRERR)
340 printk("Bus - Read Bus Error on instruction fetch\n");
341 if (reason & MCSR_BUS_DRERR)
342 printk("Bus - Read Bus Error on data load\n");
343 if (reason & MCSR_BUS_WRERR)
344 printk("Bus - Write Bus Error on buffered store or cache line push\n");
345 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
346 printk("Machine check in kernel mode.\n");
347 printk("Caused by (from SRR1=%lx): ", reason);
348 switch (reason & 0x601F0000) {
350 printk("Machine check signal\n");
352 case 0: /* for 601 */
354 case 0x140000: /* 7450 MSS error and TEA */
355 printk("Transfer error ack signal\n");
358 printk("Data parity error signal\n");
361 printk("Address parity error signal\n");
364 printk("L1 Data Cache error\n");
367 printk("L1 Instruction Cache error\n");
370 printk("L2 data cache parity error\n");
373 printk("Unknown values in msr\n");
375 #endif /* CONFIG_4xx */
378 * Optional platform-provided routine to print out
379 * additional info, e.g. bus error registers.
381 platform_machine_check(regs);
384 die("machine check", regs, SIGBUS);
387 void SMIException(struct pt_regs *regs)
390 #if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB))
392 panic("System Management Interrupt");
396 void unknown_exception(struct pt_regs *regs)
398 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
399 regs->nip, regs->msr, regs->trap, print_tainted());
400 _exception(SIGTRAP, regs, 0, 0);
403 void instruction_breakpoint_exception(struct pt_regs *regs)
405 if (debugger_iabr_match(regs))
407 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
410 void RunModeException(struct pt_regs *regs)
412 _exception(SIGTRAP, regs, 0, 0);
415 /* Illegal instruction emulation support. Originally written to
416 * provide the PVR to user applications using the mfspr rd, PVR.
417 * Return non-zero if we can't emulate, or -EFAULT if the associated
418 * memory access caused an access fault. Return zero on success.
420 * There are a couple of ways to do this, either "decode" the instruction
421 * or directly match lots of bits. In this case, matching lots of
422 * bits is faster and easier.
425 #define INST_MFSPR_PVR 0x7c1f42a6
426 #define INST_MFSPR_PVR_MASK 0xfc1fffff
428 #define INST_DCBA 0x7c0005ec
429 #define INST_DCBA_MASK 0x7c0007fe
431 #define INST_MCRXR 0x7c000400
432 #define INST_MCRXR_MASK 0x7c0007fe
434 #define INST_STRING 0x7c00042a
435 #define INST_STRING_MASK 0x7c0007fe
436 #define INST_STRING_GEN_MASK 0x7c00067e
437 #define INST_LSWI 0x7c0004aa
438 #define INST_LSWX 0x7c00042a
439 #define INST_STSWI 0x7c0005aa
440 #define INST_STSWX 0x7c00052a
442 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
444 u8 rT = (instword >> 21) & 0x1f;
445 u8 rA = (instword >> 16) & 0x1f;
446 u8 NB_RB = (instword >> 11) & 0x1f;
451 /* Early out if we are an invalid form of lswx */
452 if ((instword & INST_STRING_MASK) == INST_LSWX)
453 if ((rT == rA) || (rT == NB_RB))
456 EA = (rA == 0) ? 0 : regs->gpr[rA];
458 switch (instword & INST_STRING_MASK) {
462 num_bytes = regs->xer & 0x7f;
466 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
472 while (num_bytes != 0)
475 u32 shift = 8 * (3 - (pos & 0x3));
477 switch ((instword & INST_STRING_MASK)) {
480 if (get_user(val, (u8 __user *)EA))
482 /* first time updating this reg,
486 regs->gpr[rT] |= val << shift;
490 val = regs->gpr[rT] >> shift;
491 if (put_user(val, (u8 __user *)EA))
495 /* move EA to next address */
499 /* manage our position within the register */
510 static int emulate_instruction(struct pt_regs *regs)
515 if (!user_mode(regs))
517 CHECK_FULL_REGS(regs);
519 if (get_user(instword, (u32 __user *)(regs->nip)))
522 /* Emulate the mfspr rD, PVR.
524 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
525 rd = (instword >> 21) & 0x1f;
526 regs->gpr[rd] = mfspr(SPRN_PVR);
530 /* Emulating the dcba insn is just a no-op. */
531 if ((instword & INST_DCBA_MASK) == INST_DCBA)
534 /* Emulate the mcrxr insn. */
535 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
536 int shift = (instword >> 21) & 0x1c;
537 unsigned long msk = 0xf0000000UL >> shift;
539 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
540 regs->xer &= ~0xf0000000UL;
544 /* Emulate load/store string insn. */
545 if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
546 return emulate_string_inst(regs, instword);
552 * After we have successfully emulated an instruction, we have to
553 * check if the instruction was being single-stepped, and if so,
554 * pretend we got a single-step exception. This was pointed out
555 * by Kumar Gala. -- paulus
557 static void emulate_single_step(struct pt_regs *regs)
559 if (single_stepping(regs)) {
560 clear_single_step(regs);
561 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
566 * Look through the list of trap instructions that are used for BUG(),
567 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
568 * that the exception was caused by a trap instruction of some kind.
569 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
572 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
574 #ifndef CONFIG_MODULES
575 #define module_find_bug(x) NULL
578 struct bug_entry *find_bug(unsigned long bugaddr)
580 struct bug_entry *bug;
582 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
583 if (bugaddr == bug->bug_addr)
585 return module_find_bug(bugaddr);
588 int check_bug_trap(struct pt_regs *regs)
590 struct bug_entry *bug;
593 if (regs->msr & MSR_PR)
594 return 0; /* not in kernel */
595 addr = regs->nip; /* address of trap instruction */
596 if (addr < PAGE_OFFSET)
598 bug = find_bug(regs->nip);
601 if (bug->line & BUG_WARNING_TRAP) {
602 /* this is a WARN_ON rather than BUG/BUG_ON */
604 xmon_printf(KERN_ERR "Badness in %s at %s:%ld\n",
605 bug->function, bug->file,
606 bug->line & ~BUG_WARNING_TRAP);
607 #endif /* CONFIG_XMON */
608 printk(KERN_ERR "Badness in %s at %s:%ld\n",
609 bug->function, bug->file,
610 bug->line & ~BUG_WARNING_TRAP);
615 xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
616 bug->function, bug->file, bug->line);
618 #endif /* CONFIG_XMON */
619 printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
620 bug->function, bug->file, bug->line);
625 void program_check_exception(struct pt_regs *regs)
627 unsigned int reason = get_reason(regs);
628 extern int do_mathemu(struct pt_regs *regs);
630 #ifdef CONFIG_MATH_EMULATION
631 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
632 * but there seems to be a hardware bug on the 405GP (RevD)
633 * that means ESR is sometimes set incorrectly - either to
634 * ESR_DST (!?) or 0. In the process of chasing this with the
635 * hardware people - not sure if it can happen on any illegal
636 * instruction or only on FP instructions, whether there is a
637 * pattern to occurences etc. -dgibson 31/Mar/2003 */
638 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
639 emulate_single_step(regs);
642 #endif /* CONFIG_MATH_EMULATION */
644 if (reason & REASON_FP) {
645 /* IEEE FP exception */
649 /* We must make sure the FP state is consistent with
653 if (regs->msr & MSR_FP)
657 fpscr = current->thread.fpscr.val;
658 fpscr &= fpscr << 22; /* mask summary bits with enables */
659 if (fpscr & FPSCR_VX)
661 else if (fpscr & FPSCR_OX)
663 else if (fpscr & FPSCR_UX)
665 else if (fpscr & FPSCR_ZX)
667 else if (fpscr & FPSCR_XX)
669 _exception(SIGFPE, regs, code, regs->nip);
673 if (reason & REASON_TRAP) {
675 if (debugger_bpt(regs))
677 if (check_bug_trap(regs)) {
681 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
685 /* Try to emulate it if we should. */
686 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
687 switch (emulate_instruction(regs)) {
690 emulate_single_step(regs);
693 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
698 if (reason & REASON_PRIVILEGED)
699 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
701 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
704 void single_step_exception(struct pt_regs *regs)
706 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
707 if (debugger_sstep(regs))
709 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
712 void alignment_exception(struct pt_regs *regs)
714 int sig, code, fixed = 0;
716 fixed = fix_alignment(regs);
718 regs->nip += 4; /* skip over emulated instruction */
719 emulate_single_step(regs);
722 if (fixed == -EFAULT) {
730 _exception(sig, regs, code, regs->dar);
732 bad_page_fault(regs, regs->dar, sig);
735 void StackOverflow(struct pt_regs *regs)
737 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
738 current, regs->gpr[1]);
741 panic("kernel stack overflow");
744 void nonrecoverable_exception(struct pt_regs *regs)
746 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
747 regs->nip, regs->msr);
749 die("nonrecoverable exception", regs, SIGKILL);
752 void trace_syscall(struct pt_regs *regs)
754 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
755 current, current->pid, regs->nip, regs->link, regs->gpr[0],
756 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
760 void SoftwareEmulation(struct pt_regs *regs)
762 extern int do_mathemu(struct pt_regs *);
763 extern int Soft_emulate_8xx(struct pt_regs *);
766 CHECK_FULL_REGS(regs);
768 if (!user_mode(regs)) {
770 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
773 #ifdef CONFIG_MATH_EMULATION
774 errcode = do_mathemu(regs);
776 errcode = Soft_emulate_8xx(regs);
780 _exception(SIGFPE, regs, 0, 0);
781 else if (errcode == -EFAULT)
782 _exception(SIGSEGV, regs, 0, 0);
784 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
786 emulate_single_step(regs);
788 #endif /* CONFIG_8xx */
790 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
792 void DebugException(struct pt_regs *regs, unsigned long debug_status)
794 if (debug_status & DBSR_IC) { /* instruction completion */
795 regs->msr &= ~MSR_DE;
796 if (user_mode(regs)) {
797 current->thread.dbcr0 &= ~DBCR0_IC;
799 /* Disable instruction completion */
800 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
801 /* Clear the instruction completion event */
802 mtspr(SPRN_DBSR, DBSR_IC);
803 if (debugger_sstep(regs))
806 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
809 #endif /* CONFIG_4xx || CONFIG_BOOKE */
811 #if !defined(CONFIG_TAU_INT)
812 void TAUException(struct pt_regs *regs)
814 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
815 regs->nip, regs->msr, regs->trap, print_tainted());
817 #endif /* CONFIG_INT_TAU */
820 * FP unavailable trap from kernel - print a message, but let
821 * the task use FP in the kernel until it returns to user mode.
823 void kernel_fp_unavailable_exception(struct pt_regs *regs)
826 printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n",
830 void altivec_unavailable_exception(struct pt_regs *regs)
832 static int kernel_altivec_count;
834 #ifndef CONFIG_ALTIVEC
835 if (user_mode(regs)) {
836 /* A user program has executed an altivec instruction,
837 but this kernel doesn't support altivec. */
838 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
842 /* The kernel has executed an altivec instruction without
843 first enabling altivec. Whinge but let it do it. */
844 if (++kernel_altivec_count < 10)
845 printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
847 regs->msr |= MSR_VEC;
850 #ifdef CONFIG_ALTIVEC
851 void altivec_assist_exception(struct pt_regs *regs)
856 if (regs->msr & MSR_VEC)
857 giveup_altivec(current);
859 if (!user_mode(regs)) {
860 printk(KERN_ERR "altivec assist exception in kernel mode"
861 " at %lx\n", regs->nip);
863 die("altivec assist exception", regs, SIGFPE);
867 err = emulate_altivec(regs);
869 regs->nip += 4; /* skip emulated instruction */
870 emulate_single_step(regs);
874 if (err == -EFAULT) {
875 /* got an error reading the instruction */
876 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
878 /* didn't recognize the instruction */
879 /* XXX quick hack for now: set the non-Java bit in the VSCR */
880 printk(KERN_ERR "unrecognized altivec instruction "
881 "in %s at %lx\n", current->comm, regs->nip);
882 current->thread.vscr.u[3] |= 0x10000;
885 #endif /* CONFIG_ALTIVEC */
888 void performance_monitor_exception(struct pt_regs *regs)
894 #ifdef CONFIG_FSL_BOOKE
895 void CacheLockingException(struct pt_regs *regs, unsigned long address,
896 unsigned long error_code)
898 /* We treat cache locking instructions from the user
899 * as priv ops, in the future we could try to do
902 if (error_code & (ESR_DLK|ESR_ILK))
903 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
906 #endif /* CONFIG_FSL_BOOKE */
909 void SPEFloatingPointException(struct pt_regs *regs)
911 unsigned long spefscr;
915 spefscr = current->thread.spefscr;
916 fpexc_mode = current->thread.fpexc_mode;
918 /* Hardware does not neccessarily set sticky
919 * underflow/overflow/invalid flags */
920 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
922 spefscr |= SPEFSCR_FOVFS;
924 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
926 spefscr |= SPEFSCR_FUNFS;
928 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
930 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
932 spefscr |= SPEFSCR_FINVS;
934 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
937 current->thread.spefscr = spefscr;
939 _exception(SIGFPE, regs, code, regs->nip);
944 #ifdef CONFIG_BOOKE_WDT
946 * Default handler for a Watchdog exception,
947 * spins until a reboot occurs
949 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
951 /* Generic WatchdogHandler, implement your own */
952 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
956 void WatchdogException(struct pt_regs *regs)
958 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
959 WatchdogHandler(regs);
963 void __init trap_init(void)