2 * arch/ppc64/kernel/cputable.c
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
6 * Modifications for ppc64:
7 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #include <linux/config.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/threads.h>
19 #include <linux/init.h>
20 #include <asm/cputable.h>
22 struct cpu_spec* cur_cpu_spec = NULL;
25 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
26 * the responsibility of the appropriate CPU save/restore functions to
27 * eventually copy these settings over. Those save/restore aren't yet
28 * part of the cputable though. That has to be fixed for both ppc32
31 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
32 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
33 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
36 /* We only set the altivec features if the kernel was compiled with altivec
40 #define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC
41 #define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
43 #define CPU_FTR_ALTIVEC_COMP 0
44 #define PPC_FEATURE_HAS_ALTIVEC_COMP 0
47 struct cpu_spec cpu_specs[] = {
49 0xffff0000, 0x00400000, "POWER3 (630)",
50 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
51 CPU_FTR_IABR | CPU_FTR_PMC8,
58 0xffff0000, 0x00410000, "POWER3 (630+)",
59 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
60 CPU_FTR_IABR | CPU_FTR_PMC8,
67 0xffff0000, 0x00330000, "RS64-II (northstar)",
68 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
69 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
76 0xffff0000, 0x00340000, "RS64-III (pulsar)",
77 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
78 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
85 0xffff0000, 0x00360000, "RS64-III (icestar)",
86 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
87 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
94 0xffff0000, 0x00370000, "RS64-IV (sstar)",
95 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
96 CPU_FTR_IABR | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
103 0xffff0000, 0x00350000, "POWER4 (gp)",
104 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
105 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
112 0xffff0000, 0x00380000, "POWER4+ (gq)",
113 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
114 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
121 0xffff0000, 0x00390000, "PPC970",
122 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
123 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
124 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
125 COMMON_USER_PPC64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
131 0xffff0000, 0x003c0000, "PPC970FX",
132 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
133 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
134 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
135 COMMON_USER_PPC64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
141 0xffff0000, 0x003a0000, "POWER5 (gr)",
142 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
143 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
144 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
152 0xffff0000, 0x003b0000, "POWER5 (gs)",
153 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
154 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
155 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
162 { /* default match */
163 0x00000000, 0x00000000, "POWER4 (compatible)",
164 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
165 CPU_FTR_PPCAS_ARCH_V2,
173 firmware_feature_t firmware_features_table[FIRMWARE_MAX_FEATURES] = {
174 {FW_FEATURE_PFT, "hcall-pft"},
175 {FW_FEATURE_TCE, "hcall-tce"},
176 {FW_FEATURE_SPRG0, "hcall-sprg0"},
177 {FW_FEATURE_DABR, "hcall-dabr"},
178 {FW_FEATURE_COPY, "hcall-copy"},
179 {FW_FEATURE_ASR, "hcall-asr"},
180 {FW_FEATURE_DEBUG, "hcall-debug"},
181 {FW_FEATURE_PERF, "hcall-perf"},
182 {FW_FEATURE_DUMP, "hcall-dump"},
183 {FW_FEATURE_INTERRUPT, "hcall-interrupt"},
184 {FW_FEATURE_MIGRATE, "hcall-migrate"},
185 {FW_FEATURE_PERFMON, "hcall-perfmon"},
186 {FW_FEATURE_CRQ, "hcall-crq"},
187 {FW_FEATURE_VIO, "hcall-vio"},
188 {FW_FEATURE_RDMA, "hcall-rdma"},
189 {FW_FEATURE_LLAN, "hcall-lLAN"},
190 {FW_FEATURE_BULK, "hcall-bulk"},
191 {FW_FEATURE_XDABR, "hcall-xdabr"},
192 {FW_FEATURE_MULTITCE, "hcall-multi-tce"},
193 {FW_FEATURE_SPLPAR, "hcall-splpar"},