4 * SH-3 specific TLB operations
6 * Copyright (C) 1999 Niibe Yutaka
7 * Copyright (C) 2002 Paul Mundt
9 * Released under the terms of the GNU GPL v2.0.
11 #include <linux/signal.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/errno.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/ptrace.h>
18 #include <linux/mman.h>
20 #include <linux/smp.h>
21 #include <linux/smp_lock.h>
22 #include <linux/interrupt.h>
24 #include <asm/system.h>
26 #include <asm/uaccess.h>
27 #include <asm/pgalloc.h>
28 #include <asm/hardirq.h>
29 #include <asm/mmu_context.h>
30 #include <asm/cacheflush.h>
32 void update_mmu_cache(struct vm_area_struct * vma,
33 unsigned long address, pte_t pte)
39 /* Ptrace may call this routine. */
40 if (vma && current->active_mm != vma->vm_mm)
43 local_irq_save(flags);
45 /* Set PTEH register */
46 vpn = (address & MMU_VPN_MASK) | get_asid();
47 ctrl_outl(vpn, MMU_PTEH);
49 pteval = pte_val(pte);
51 /* Set PTEL register */
52 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
53 /* conveniently, we want all the software flags to be 0 anyway */
54 ctrl_outl(pteval, MMU_PTEL);
57 asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
58 local_irq_restore(flags);
61 void __flush_tlb_page(unsigned long asid, unsigned long page)
63 unsigned long addr, data;
64 int i, ways = MMU_NTLB_WAYS;
67 * NOTE: PTEH.ASID should be set to this MM
68 * _AND_ we need to write ASID to the array.
70 * It would be simple if we didn't need to set PTEH.ASID...
72 addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
73 data = (page & 0xfffe0000) | asid; /* VALID bit is off */
75 if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
76 addr |= MMU_PAGE_ASSOC_BIT;
77 ways = 1; /* we already know the way .. */
80 for (i = 0; i < ways; i++)
81 ctrl_outl(data, addr + (i << 8));