2 * Machine check handler.
3 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
4 * Rest from unknown author(s).
5 * 2004 Andi Kleen. Rewrote most of it.
8 #include <linux/init.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/rcupdate.h>
14 #include <linux/kallsyms.h>
15 #include <linux/sysdev.h>
16 #include <linux/miscdevice.h>
18 #include <asm/processor.h>
21 #include <asm/kdebug.h>
22 #include <asm/uaccess.h>
24 #define MISC_MCELOG_MINOR 227
27 static int mce_disabled __initdata;
28 /* 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic */
29 static int tolerant = 1;
31 static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL };
34 * Lockless MCE logging infrastructure.
35 * This avoids deadlocks on printk locks without having to break locks. Also
36 * separate MCEs from kernel messages to avoid bogus bug reports.
39 struct mce_log mcelog = {
44 static void mce_log(struct mce *mce)
51 read_barrier_depends();
52 /* When the buffer fills up discard new entries. Assume
53 that the earlier errors are the more interesting. */
54 if (entry >= MCE_LOG_LEN) {
55 set_bit(MCE_OVERFLOW, &mcelog.flags);
58 /* Old left over entry. Skip. */
59 if (mcelog.entry[entry].finished)
63 if (cmpxchg(&mcelog.next, entry, next) == entry)
66 memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
68 mcelog.entry[entry].finished = 1;
72 static void print_mce(struct mce *m)
75 "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
76 m->cpu, m->mcgstatus, m->bank, m->status);
79 "RIP%s %02x:<%016Lx> ",
80 !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
82 if (m->cs == __KERNEL_CS)
83 print_symbol("{%s}", m->rip);
86 printk(KERN_EMERG "TSC %Lx ", m->tsc);
88 printk("ADDR %Lx ", m->addr);
90 printk("MISC %Lx ", m->misc);
94 static void mce_panic(char *msg, struct mce *backup, unsigned long start)
98 for (i = 0; i < MCE_LOG_LEN; i++) {
99 unsigned long tsc = mcelog.entry[i].tsc;
100 if (time_before(tsc, start))
102 print_mce(&mcelog.entry[i]);
103 if (mcelog.entry[i].tsc == backup->tsc)
111 static int mce_available(struct cpuinfo_x86 *c)
113 return !mce_disabled &&
114 test_bit(X86_FEATURE_MCE, &c->x86_capability) &&
115 test_bit(X86_FEATURE_MCA, &c->x86_capability);
119 * The actual machine check handler
122 void do_machine_check(struct pt_regs * regs, long error_code)
124 struct mce m, panicm;
125 int nowayout = (tolerant < 1);
131 notify_die(DIE_NMI, "machine check", regs, error_code, 255, SIGKILL);
135 memset(&m, 0, sizeof(struct mce));
136 m.cpu = hard_smp_processor_id();
137 rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
138 if (!regs && (m.mcgstatus & MCG_STATUS_MCIP))
140 if (!(m.mcgstatus & MCG_STATUS_RIPV))
150 for (i = 0; i < banks; i++) {
154 /* Did this bank cause the exception? */
155 /* XXX: check more flags */
156 if ((m.status & MCI_STATUS_PCC)) {
166 rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
167 if ((m.status & MCI_STATUS_VAL) == 0)
170 nowayout |= !!(m.status & (MCI_STATUS_OVER|MCI_STATUS_PCC));
171 kill_it |= !!(m.status & MCI_STATUS_UC);
174 if (m.status & MCI_STATUS_MISCV)
175 rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
176 if (m.status & MCI_STATUS_ADDRV)
177 rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
180 wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
183 wrmsrl(MSR_IA32_MCG_STATUS, 0);
185 /* Never do anything final in the polling timer */
189 mce_panic("Machine check", &m, mcestart);
193 if (m.mcgstatus & MCG_STATUS_RIPV)
194 user_space = m.rip && (m.cs & 3);
196 /* When the machine was in user space and the CPU didn't get
197 confused it's normally not necessary to panic, unless you
198 are paranoid (tolerant == 0)
200 RED-PEN could be more tolerant for MCEs in idle,
201 but most likely they occur at boot anyways, where
202 it is best to just halt the machine. */
203 if ((!user_space && (panic_on_oops || tolerant < 2)) ||
204 (unsigned)current->pid <= 1)
205 mce_panic("Uncorrected machine check", &panicm, mcestart);
207 /* do_exit takes an awful lot of locks and has as slight risk
208 of deadlocking. If you don't want that don't set tolerant >= 2 */
213 static void mce_clear_all(void)
216 for (i = 0; i < banks; i++)
217 wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
218 wrmsrl(MSR_IA32_MCG_STATUS, 0);
222 * Periodic polling timer for "silent" machine check errors.
225 static int check_interval = 5 * 60; /* 5 minutes */
226 static void mcheck_timer(void *data);
227 static DECLARE_WORK(mcheck_work, mcheck_timer, NULL);
229 static void mcheck_check_cpu(void *info)
231 if (mce_available(¤t_cpu_data))
232 do_machine_check(NULL, 0);
235 static void mcheck_timer(void *data)
237 on_each_cpu(mcheck_check_cpu, NULL, 1, 1);
238 schedule_delayed_work(&mcheck_work, check_interval * HZ);
242 static __init int periodic_mcheck_init(void)
245 schedule_delayed_work(&mcheck_work, check_interval*HZ);
248 __initcall(periodic_mcheck_init);
252 * Initialize Machine Checks for a CPU.
254 static void mce_init(void *dummy)
259 rdmsrl(MSR_IA32_MCG_CAP, cap);
261 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
264 if (banks > NR_BANKS) {
265 printk(KERN_INFO "MCE: warning: using only %d banks\n", banks);
270 for (i = 0; i < banks; i++) {
271 wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
272 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
275 set_in_cr4(X86_CR4_MCE);
278 /* Add per CPU specific workarounds here */
279 static void __init mce_cpu_quirks(struct cpuinfo_x86 *c)
281 /* This should be disabled by the BIOS, but isn't always */
282 if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 15) {
283 /* disable GART TBL walk error reporting, which trips off
284 incorrectly with the IOMMU & 3ware & Cerberus. */
285 clear_bit(10, &bank[4]);
290 * Called for each booted CPU to set up machine checks.
291 * Must be called with preempt off.
293 void __init mcheck_init(struct cpuinfo_x86 *c)
295 static unsigned long mce_cpus __initdata = 0;
299 if (test_and_set_bit(smp_processor_id(), &mce_cpus) || !mce_available(c))
306 * Character device to read and clear the MCE log.
309 static void collect_tscs(void *data)
311 unsigned long *cpu_tsc = (unsigned long *)data;
312 rdtscll(cpu_tsc[smp_processor_id()]);
315 static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, loff_t *off)
317 unsigned long cpu_tsc[NR_CPUS];
318 static DECLARE_MUTEX(mce_read_sem);
320 char __user *buf = ubuf;
325 read_barrier_depends();
327 /* Only supports full reads right now */
328 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
334 for (i = 0; i < next; i++) {
335 if (!mcelog.entry[i].finished)
338 err |= copy_to_user(buf, mcelog.entry + i, sizeof(struct mce));
339 buf += sizeof(struct mce);
342 memset(mcelog.entry, 0, next * sizeof(struct mce));
346 synchronize_kernel();
348 /* Collect entries that were still getting written before the synchronize. */
350 on_each_cpu(collect_tscs, cpu_tsc, 1, 1);
351 for (i = next; i < MCE_LOG_LEN; i++) {
352 if (mcelog.entry[i].finished &&
353 mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
354 err |= copy_to_user(buf, mcelog.entry+i, sizeof(struct mce));
356 buf += sizeof(struct mce);
357 memset(&mcelog.entry[i], 0, sizeof(struct mce));
361 return err ? -EFAULT : buf - ubuf;
364 static int mce_ioctl(struct inode *i, struct file *f,unsigned int cmd, unsigned long arg)
366 int __user *p = (int __user *)arg;
367 if (!capable(CAP_SYS_ADMIN))
370 case MCE_GET_RECORD_LEN:
371 return put_user(sizeof(struct mce), p);
372 case MCE_GET_LOG_LEN:
373 return put_user(MCE_LOG_LEN, p);
374 case MCE_GETCLEAR_FLAGS: {
377 flags = mcelog.flags;
378 } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
379 return put_user(flags, p);
386 static struct file_operations mce_chrdev_ops = {
391 static struct miscdevice mce_log_device = {
398 * Old style boot options parsing. Only for compatibility.
401 static int __init mcheck_disable(char *str)
407 /* mce=off disable machine check */
408 static int __init mcheck_enable(char *str)
410 if (!strcmp(str, "off"))
413 printk("mce= argument %s ignored. Please use /sys", str);
417 __setup("nomce", mcheck_disable);
418 __setup("mce", mcheck_enable);
424 /* On resume clear all MCE state. Don't want to see leftovers from the BIOS. */
425 static int mce_resume(struct sys_device *dev)
428 on_each_cpu(mce_init, NULL, 1, 1);
432 /* Reinit MCEs after user configuration changes */
433 static void mce_restart(void)
436 cancel_delayed_work(&mcheck_work);
437 /* Timer race is harmless here */
438 on_each_cpu(mce_init, NULL, 1, 1);
440 schedule_delayed_work(&mcheck_work, check_interval*HZ);
443 static struct sysdev_class mce_sysclass = {
444 .resume = mce_resume,
445 set_kset_name("machinecheck"),
448 static struct sys_device device_mce = {
450 .cls = &mce_sysclass,
453 /* Why are there no generic functions for this? */
454 #define ACCESSOR(name, var, start) \
455 static ssize_t show_ ## name(struct sys_device *s, char *buf) { \
456 return sprintf(buf, "%lu\n", (unsigned long)var); \
458 static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \
460 unsigned long new = simple_strtoul(buf, &end, 0); \
461 if (end == buf) return -EINVAL; \
466 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
468 ACCESSOR(bank0ctl,bank[0],mce_restart())
469 ACCESSOR(bank1ctl,bank[1],mce_restart())
470 ACCESSOR(bank2ctl,bank[2],mce_restart())
471 ACCESSOR(bank3ctl,bank[3],mce_restart())
472 ACCESSOR(bank4ctl,bank[4],mce_restart())
473 ACCESSOR(tolerant,tolerant,)
474 ACCESSOR(check_interval,check_interval,mce_restart())
476 static __init int mce_init_device(void)
479 if (!mce_available(&boot_cpu_data))
481 err = sysdev_class_register(&mce_sysclass);
483 err = sysdev_register(&device_mce);
485 /* could create per CPU objects, but is not worth it. */
486 sysdev_create_file(&device_mce, &attr_bank0ctl);
487 sysdev_create_file(&device_mce, &attr_bank1ctl);
488 sysdev_create_file(&device_mce, &attr_bank2ctl);
489 sysdev_create_file(&device_mce, &attr_bank3ctl);
490 sysdev_create_file(&device_mce, &attr_bank4ctl);
491 sysdev_create_file(&device_mce, &attr_tolerant);
492 sysdev_create_file(&device_mce, &attr_check_interval);
495 misc_register(&mce_log_device);
499 device_initcall(mce_init_device);