2 $Id: fore200e.c,v 1.5 2000/04/14 10:10:34 davem Exp $
4 A FORE Systems 200E-series driver for ATM on Linux.
5 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
7 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
9 This driver simultaneously supports PCA-200E and SBA-200E adapters
10 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/config.h>
29 #include <linux/kernel.h>
30 #include <linux/slab.h>
31 #include <linux/init.h>
32 #include <linux/capability.h>
33 #include <linux/sched.h>
34 #include <linux/interrupt.h>
35 #include <linux/bitops.h>
36 #include <linux/pci.h>
37 #include <linux/module.h>
38 #include <linux/atmdev.h>
39 #include <linux/sonet.h>
40 #include <linux/atm_suni.h>
42 #include <asm/string.h>
46 #include <asm/byteorder.h>
47 #include <asm/uaccess.h>
48 #include <asm/atomic.h>
50 #ifdef CONFIG_ATM_FORE200E_SBA
51 #include <asm/idprom.h>
53 #include <asm/openprom.h>
54 #include <asm/oplib.h>
55 #include <asm/pgtable.h>
58 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
59 #define FORE200E_USE_TASKLET
62 #if 0 /* enable the debugging code of the buffer supply queues */
63 #define FORE200E_BSQ_DEBUG
66 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
67 #define FORE200E_52BYTE_AAL0_SDU
73 #define FORE200E_VERSION "0.3e"
75 #define FORE200E "fore200e: "
77 #if 0 /* override .config */
78 #define CONFIG_ATM_FORE200E_DEBUG 1
80 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
84 #define DPRINTK(level, format, args...) do {} while (0)
88 #define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
91 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
93 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
95 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
98 #define MSECS(ms) (((ms)*HZ/1000)+1)
102 #define ASSERT(expr) if (!(expr)) { \
103 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
104 __FUNCTION__, __LINE__, #expr); \
105 panic(FORE200E "%s", __FUNCTION__); \
108 #define ASSERT(expr) do {} while (0)
112 extern const struct atmdev_ops fore200e_ops;
113 extern const struct fore200e_bus fore200e_bus[];
115 static struct fore200e* fore200e_boards = NULL;
118 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
119 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
120 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
123 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
124 { BUFFER_S1_NBR, BUFFER_L1_NBR },
125 { BUFFER_S2_NBR, BUFFER_L2_NBR }
128 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
129 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
130 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
134 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
135 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
139 #if 0 /* currently unused */
141 fore200e_fore2atm_aal(enum fore200e_aal aal)
144 case FORE200E_AAL0: return ATM_AAL0;
145 case FORE200E_AAL34: return ATM_AAL34;
146 case FORE200E_AAL5: return ATM_AAL5;
154 static enum fore200e_aal
155 fore200e_atm2fore_aal(int aal)
158 case ATM_AAL0: return FORE200E_AAL0;
159 case ATM_AAL34: return FORE200E_AAL34;
162 case ATM_AAL5: return FORE200E_AAL5;
170 fore200e_irq_itoa(int irq)
172 #if defined(__sparc_v9__)
173 return __irq_itoa(irq);
176 sprintf(str, "%d", irq);
183 fore200e_kmalloc(int size, int flags)
185 void* chunk = kmalloc(size, flags);
188 memset(chunk, 0x00, size);
190 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
197 fore200e_kfree(void* chunk)
203 /* allocate and align a chunk of memory intended to hold the data behing exchanged
204 between the driver and the adapter (using streaming DVMA) */
207 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
209 unsigned long offset = 0;
211 if (alignment <= sizeof(int))
214 chunk->alloc_size = size + alignment;
215 chunk->align_size = size;
216 chunk->direction = direction;
218 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
219 if (chunk->alloc_addr == NULL)
223 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
225 chunk->align_addr = chunk->alloc_addr + offset;
227 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
233 /* free a chunk of memory */
236 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
238 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
240 fore200e_kfree(chunk->alloc_addr);
245 fore200e_spin(int msecs)
247 unsigned long timeout = jiffies + MSECS(msecs);
248 while (time_before(jiffies, timeout));
253 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
255 unsigned long timeout = jiffies + MSECS(msecs);
260 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
263 } while (time_before(jiffies, timeout));
267 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
277 fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
279 unsigned long timeout = jiffies + MSECS(msecs);
283 if ((ok = (fore200e->bus->read(addr) == val)))
286 } while (time_before(jiffies, timeout));
290 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
291 fore200e->bus->read(addr), val);
300 fore200e_free_rx_buf(struct fore200e* fore200e)
302 int scheme, magn, nbr;
303 struct buffer* buffer;
305 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
306 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
308 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
310 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
312 struct chunk* data = &buffer[ nbr ].data;
314 if (data->alloc_addr != NULL)
315 fore200e_chunk_free(fore200e, data);
324 fore200e_uninit_bs_queue(struct fore200e* fore200e)
328 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
329 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
331 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
332 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
334 if (status->alloc_addr)
335 fore200e->bus->dma_chunk_free(fore200e, status);
337 if (rbd_block->alloc_addr)
338 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
345 fore200e_reset(struct fore200e* fore200e, int diag)
349 fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
351 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
353 fore200e->bus->reset(fore200e);
356 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
359 printk(FORE200E "device %s self-test failed\n", fore200e->name);
363 printk(FORE200E "device %s self-test passed\n", fore200e->name);
365 fore200e->state = FORE200E_STATE_RESET;
373 fore200e_shutdown(struct fore200e* fore200e)
375 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
376 fore200e->name, fore200e->phys_base,
377 fore200e_irq_itoa(fore200e->irq));
379 if (fore200e->state > FORE200E_STATE_RESET) {
380 /* first, reset the board to prevent further interrupts or data transfers */
381 fore200e_reset(fore200e, 0);
384 /* then, release all allocated resources */
385 switch(fore200e->state) {
387 case FORE200E_STATE_COMPLETE:
389 kfree(fore200e->stats);
391 case FORE200E_STATE_IRQ:
392 free_irq(fore200e->irq, fore200e->atm_dev);
394 case FORE200E_STATE_ALLOC_BUF:
395 fore200e_free_rx_buf(fore200e);
397 case FORE200E_STATE_INIT_BSQ:
398 fore200e_uninit_bs_queue(fore200e);
400 case FORE200E_STATE_INIT_RXQ:
401 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
402 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
404 case FORE200E_STATE_INIT_TXQ:
405 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
406 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
408 case FORE200E_STATE_INIT_CMDQ:
409 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
411 case FORE200E_STATE_INITIALIZE:
412 /* nothing to do for that state */
414 case FORE200E_STATE_START_FW:
415 /* nothing to do for that state */
417 case FORE200E_STATE_LOAD_FW:
418 /* nothing to do for that state */
420 case FORE200E_STATE_RESET:
421 /* nothing to do for that state */
423 case FORE200E_STATE_MAP:
424 fore200e->bus->unmap(fore200e);
426 case FORE200E_STATE_CONFIGURE:
427 /* nothing to do for that state */
429 case FORE200E_STATE_REGISTER:
430 /* XXX shouldn't we *start* by deregistering the device? */
431 atm_dev_deregister(fore200e->atm_dev);
433 case FORE200E_STATE_BLANK:
434 /* nothing to do for that state */
440 #ifdef CONFIG_ATM_FORE200E_PCA
442 static u32 fore200e_pca_read(volatile u32* addr)
444 /* on big-endian hosts, the board is configured to convert
445 the endianess of slave RAM accesses */
446 return le32_to_cpu(readl(addr));
450 static void fore200e_pca_write(u32 val, volatile u32* addr)
452 /* on big-endian hosts, the board is configured to convert
453 the endianess of slave RAM accesses */
454 writel(cpu_to_le32(val), addr);
459 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
461 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
463 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
464 virt_addr, size, direction, dma_addr);
471 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
473 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
474 dma_addr, size, direction);
476 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
481 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
483 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
485 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
489 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
491 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
493 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
497 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
498 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
501 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
502 int size, int nbr, int alignment)
504 /* returned chunks are page-aligned */
505 chunk->alloc_size = size * nbr;
506 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
510 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
513 chunk->align_addr = chunk->alloc_addr;
519 /* free a DMA consistent chunk of memory */
522 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
524 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
532 fore200e_pca_irq_check(struct fore200e* fore200e)
534 /* this is a 1 bit register */
535 int irq_posted = readl(fore200e->regs.pca.psr);
537 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
538 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
539 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
548 fore200e_pca_irq_ack(struct fore200e* fore200e)
550 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
555 fore200e_pca_reset(struct fore200e* fore200e)
557 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
559 writel(0, fore200e->regs.pca.hcr);
564 fore200e_pca_map(struct fore200e* fore200e)
566 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
568 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
570 if (fore200e->virt_base == NULL) {
571 printk(FORE200E "can't map device %s\n", fore200e->name);
575 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
577 /* gain access to the PCA specific registers */
578 fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
579 fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
580 fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
582 fore200e->state = FORE200E_STATE_MAP;
588 fore200e_pca_unmap(struct fore200e* fore200e)
590 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
592 if (fore200e->virt_base != NULL)
593 iounmap(fore200e->virt_base);
598 fore200e_pca_configure(struct fore200e* fore200e)
600 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
601 u8 master_ctrl, latency;
603 DPRINTK(2, "device %s being configured\n", fore200e->name);
605 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
606 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
610 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
612 master_ctrl = master_ctrl
613 #if defined(__BIG_ENDIAN)
614 /* request the PCA board to convert the endianess of slave RAM accesses */
615 | PCA200E_CTRL_CONVERT_ENDIAN
618 | PCA200E_CTRL_DIS_CACHE_RD
619 | PCA200E_CTRL_DIS_WRT_INVAL
620 | PCA200E_CTRL_ENA_CONT_REQ_MODE
621 | PCA200E_CTRL_2_CACHE_WRT_INVAL
623 | PCA200E_CTRL_LARGE_PCI_BURSTS;
625 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
627 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
628 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
629 this may impact the performances of other PCI devices on the same bus, though */
631 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
633 fore200e->state = FORE200E_STATE_CONFIGURE;
638 static struct fore200e* __init
639 fore200e_pca_detect(const struct fore200e_bus* bus, int index)
641 struct fore200e* fore200e;
642 struct pci_dev* pci_dev = NULL;
646 pci_dev = pci_find_device(PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, pci_dev);
651 if (pci_enable_device(pci_dev))
654 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
655 if (fore200e == NULL)
659 fore200e->bus_dev = pci_dev;
660 fore200e->irq = pci_dev->irq;
661 fore200e->phys_base = pci_resource_start(pci_dev, 0);
663 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
665 pci_set_master(pci_dev);
672 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
674 struct host_cmdq* cmdq = &fore200e->host_cmdq;
675 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
676 struct prom_opcode opcode;
680 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
682 opcode.opcode = OPCODE_GET_PROM;
685 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
687 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
689 *entry->status = STATUS_PENDING;
691 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
693 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
695 *entry->status = STATUS_FREE;
697 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
700 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
704 #if defined(__BIG_ENDIAN)
706 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
708 /* MAC address is stored as little-endian */
709 swap_here(&prom->mac_addr[0]);
710 swap_here(&prom->mac_addr[4]);
718 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
720 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
722 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
723 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
726 #endif /* CONFIG_ATM_FORE200E_PCA */
729 #ifdef CONFIG_ATM_FORE200E_SBA
732 fore200e_sba_read(volatile u32* addr)
734 return sbus_readl(addr);
739 fore200e_sba_write(u32 val, volatile u32* addr)
741 sbus_writel(val, addr);
746 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
748 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
750 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
751 virt_addr, size, direction, dma_addr);
758 fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
760 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
761 dma_addr, size, direction);
763 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
768 fore200e_sba_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
770 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
772 sbus_dma_sync_single_for_cpu((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
776 fore200e_sba_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
778 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
780 sbus_dma_sync_single_for_device((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
784 /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
785 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
788 fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
789 int size, int nbr, int alignment)
791 chunk->alloc_size = chunk->align_size = size * nbr;
793 /* returned chunks are page-aligned */
794 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
798 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
801 chunk->align_addr = chunk->alloc_addr;
807 /* free a DVMA consistent chunk of memory */
810 fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
812 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
820 fore200e_sba_irq_enable(struct fore200e* fore200e)
822 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
823 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
828 fore200e_sba_irq_check(struct fore200e* fore200e)
830 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
835 fore200e_sba_irq_ack(struct fore200e* fore200e)
837 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
838 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
843 fore200e_sba_reset(struct fore200e* fore200e)
845 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
847 fore200e->bus->write(0, fore200e->regs.sba.hcr);
852 fore200e_sba_map(struct fore200e* fore200e)
854 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
857 /* gain access to the SBA specific registers */
858 fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
859 fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
860 fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
861 fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
863 if (fore200e->virt_base == NULL) {
864 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
868 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
870 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
872 /* get the supported DVMA burst sizes */
873 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
875 if (sbus_can_dma_64bit(sbus_dev))
876 sbus_set_sbus64(sbus_dev, bursts);
878 fore200e->state = FORE200E_STATE_MAP;
884 fore200e_sba_unmap(struct fore200e* fore200e)
886 sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
887 sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
888 sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
889 sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
894 fore200e_sba_configure(struct fore200e* fore200e)
896 fore200e->state = FORE200E_STATE_CONFIGURE;
901 static struct fore200e* __init
902 fore200e_sba_detect(const struct fore200e_bus* bus, int index)
904 struct fore200e* fore200e;
905 struct sbus_bus* sbus_bus;
906 struct sbus_dev* sbus_dev = NULL;
908 unsigned int count = 0;
910 for_each_sbus (sbus_bus) {
911 for_each_sbusdev (sbus_dev, sbus_bus) {
912 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
922 if (sbus_dev->num_registers != 4) {
923 printk(FORE200E "this %s device has %d instead of 4 registers\n",
924 bus->model_name, sbus_dev->num_registers);
928 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
929 if (fore200e == NULL)
933 fore200e->bus_dev = sbus_dev;
934 fore200e->irq = sbus_dev->irqs[ 0 ];
936 fore200e->phys_base = (unsigned long)sbus_dev;
938 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
945 fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
947 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
950 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
954 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
958 prom_getproperty(sbus_dev->prom_node, "serialnumber",
959 (char*)&prom->serial_number, sizeof(prom->serial_number));
961 prom_getproperty(sbus_dev->prom_node, "promversion",
962 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
969 fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
971 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
973 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
975 #endif /* CONFIG_ATM_FORE200E_SBA */
979 fore200e_tx_irq(struct fore200e* fore200e)
981 struct host_txq* txq = &fore200e->host_txq;
982 struct host_txq_entry* entry;
984 struct fore200e_vc_map* vc_map;
986 if (fore200e->host_txq.txing == 0)
991 entry = &txq->host_entry[ txq->tail ];
993 if ((*entry->status & STATUS_COMPLETE) == 0) {
997 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
998 entry, txq->tail, entry->vc_map, entry->skb);
1000 /* free copy of misaligned data */
1004 /* remove DMA mapping */
1005 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1006 FORE200E_DMA_TODEVICE);
1008 vc_map = entry->vc_map;
1010 /* vcc closed since the time the entry was submitted for tx? */
1011 if ((vc_map->vcc == NULL) ||
1012 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1014 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
1015 fore200e->atm_dev->number);
1017 dev_kfree_skb_any(entry->skb);
1020 ASSERT(vc_map->vcc);
1022 /* vcc closed then immediately re-opened? */
1023 if (vc_map->incarn != entry->incarn) {
1025 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
1026 if the same vcc is immediately re-opened, those pending PDUs must
1027 not be popped after the completion of their emission, as they refer
1028 to the prior incarnation of that vcc. otherwise, vcc->sk->sk_wmem_alloc
1029 would be decremented by the size of the (unrelated) skb, possibly
1030 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
1031 we thus bind the tx entry to the current incarnation of the vcc
1032 when the entry is submitted for tx. When the tx later completes,
1033 if the incarnation number of the tx entry does not match the one
1034 of the vcc, then this implies that the vcc has been closed then re-opened.
1035 we thus just drop the skb here. */
1037 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
1038 fore200e->atm_dev->number);
1040 dev_kfree_skb_any(entry->skb);
1046 /* notify tx completion */
1048 vcc->pop(vcc, entry->skb);
1051 dev_kfree_skb_any(entry->skb);
1054 /* race fixed by the above incarnation mechanism, but... */
1055 if (atomic_read(&vcc->sk->sk_wmem_alloc) < 0) {
1056 atomic_set(&vcc->sk->sk_wmem_alloc, 0);
1059 /* check error condition */
1060 if (*entry->status & STATUS_ERROR)
1061 atomic_inc(&vcc->stats->tx_err);
1063 atomic_inc(&vcc->stats->tx);
1067 *entry->status = STATUS_FREE;
1069 fore200e->host_txq.txing--;
1071 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
1076 #ifdef FORE200E_BSQ_DEBUG
1077 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
1079 struct buffer* buffer;
1082 buffer = bsq->freebuf;
1085 if (buffer->supplied) {
1086 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
1087 where, scheme, magn, buffer->index);
1090 if (buffer->magn != magn) {
1091 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
1092 where, scheme, magn, buffer->index, buffer->magn);
1095 if (buffer->scheme != scheme) {
1096 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
1097 where, scheme, magn, buffer->index, buffer->scheme);
1100 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
1101 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
1102 where, scheme, magn, buffer->index);
1106 buffer = buffer->next;
1109 if (count != bsq->freebuf_count) {
1110 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
1111 where, scheme, magn, count, bsq->freebuf_count);
1119 fore200e_supply(struct fore200e* fore200e)
1121 int scheme, magn, i;
1123 struct host_bsq* bsq;
1124 struct host_bsq_entry* entry;
1125 struct buffer* buffer;
1127 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1128 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1130 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1132 #ifdef FORE200E_BSQ_DEBUG
1133 bsq_audit(1, bsq, scheme, magn);
1135 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1137 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1138 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1140 entry = &bsq->host_entry[ bsq->head ];
1142 for (i = 0; i < RBD_BLK_SIZE; i++) {
1144 /* take the first buffer in the free buffer list */
1145 buffer = bsq->freebuf;
1147 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1148 scheme, magn, bsq->freebuf_count);
1151 bsq->freebuf = buffer->next;
1153 #ifdef FORE200E_BSQ_DEBUG
1154 if (buffer->supplied)
1155 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1156 scheme, magn, buffer->index);
1157 buffer->supplied = 1;
1159 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1160 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1163 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1165 /* decrease accordingly the number of free rx buffers */
1166 bsq->freebuf_count -= RBD_BLK_SIZE;
1168 *entry->status = STATUS_PENDING;
1169 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1177 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1179 struct sk_buff* skb;
1180 struct buffer* buffer;
1181 struct fore200e_vcc* fore200e_vcc;
1183 #ifdef FORE200E_52BYTE_AAL0_SDU
1184 u32 cell_header = 0;
1189 fore200e_vcc = FORE200E_VCC(vcc);
1190 ASSERT(fore200e_vcc);
1192 #ifdef FORE200E_52BYTE_AAL0_SDU
1193 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1195 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1196 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1197 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1198 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1199 rpd->atm_header.clp;
1204 /* compute total PDU length */
1205 for (i = 0; i < rpd->nseg; i++)
1206 pdu_len += rpd->rsd[ i ].length;
1208 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1210 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1212 atomic_inc(&vcc->stats->rx_drop);
1216 do_gettimeofday(&skb->stamp);
1218 #ifdef FORE200E_52BYTE_AAL0_SDU
1220 *((u32*)skb_put(skb, 4)) = cell_header;
1224 /* reassemble segments */
1225 for (i = 0; i < rpd->nseg; i++) {
1227 /* rebuild rx buffer address from rsd handle */
1228 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1230 /* Make device DMA transfer visible to CPU. */
1231 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1233 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1235 /* Now let the device get at it again. */
1236 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1239 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1241 if (pdu_len < fore200e_vcc->rx_min_pdu)
1242 fore200e_vcc->rx_min_pdu = pdu_len;
1243 if (pdu_len > fore200e_vcc->rx_max_pdu)
1244 fore200e_vcc->rx_max_pdu = pdu_len;
1245 fore200e_vcc->rx_pdu++;
1248 if (atm_charge(vcc, skb->truesize) == 0) {
1250 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1251 vcc->itf, vcc->vpi, vcc->vci);
1253 dev_kfree_skb_any(skb);
1255 atomic_inc(&vcc->stats->rx_drop);
1259 ASSERT(atomic_read(&vcc->sk->sk_wmem_alloc) >= 0);
1261 vcc->push(vcc, skb);
1262 atomic_inc(&vcc->stats->rx);
1264 ASSERT(atomic_read(&vcc->sk->sk_wmem_alloc) >= 0);
1271 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1273 struct host_bsq* bsq;
1274 struct buffer* buffer;
1277 for (i = 0; i < rpd->nseg; i++) {
1279 /* rebuild rx buffer address from rsd handle */
1280 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1282 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1284 #ifdef FORE200E_BSQ_DEBUG
1285 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1287 if (buffer->supplied == 0)
1288 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1289 buffer->scheme, buffer->magn, buffer->index);
1290 buffer->supplied = 0;
1293 /* re-insert the buffer into the free buffer list */
1294 buffer->next = bsq->freebuf;
1295 bsq->freebuf = buffer;
1297 /* then increment the number of free rx buffers */
1298 bsq->freebuf_count++;
1304 fore200e_rx_irq(struct fore200e* fore200e)
1306 struct host_rxq* rxq = &fore200e->host_rxq;
1307 struct host_rxq_entry* entry;
1308 struct atm_vcc* vcc;
1309 struct fore200e_vc_map* vc_map;
1313 entry = &rxq->host_entry[ rxq->head ];
1315 /* no more received PDUs */
1316 if ((*entry->status & STATUS_COMPLETE) == 0)
1319 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1321 if ((vc_map->vcc == NULL) ||
1322 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1324 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1325 fore200e->atm_dev->number,
1326 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1332 if ((*entry->status & STATUS_ERROR) == 0) {
1334 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1337 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1338 fore200e->atm_dev->number,
1339 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1340 atomic_inc(&vcc->stats->rx_err);
1344 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1346 fore200e_collect_rpd(fore200e, entry->rpd);
1348 /* rewrite the rpd address to ack the received PDU */
1349 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1350 *entry->status = STATUS_FREE;
1352 fore200e_supply(fore200e);
1357 #ifndef FORE200E_USE_TASKLET
1359 fore200e_irq(struct fore200e* fore200e)
1361 unsigned long flags;
1363 spin_lock_irqsave(&fore200e->q_lock, flags);
1364 fore200e_rx_irq(fore200e);
1365 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1367 spin_lock_irqsave(&fore200e->q_lock, flags);
1368 fore200e_tx_irq(fore200e);
1369 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1375 fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1377 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1379 if (fore200e->bus->irq_check(fore200e) == 0) {
1381 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1384 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1386 #ifdef FORE200E_USE_TASKLET
1387 tasklet_schedule(&fore200e->tx_tasklet);
1388 tasklet_schedule(&fore200e->rx_tasklet);
1390 fore200e_irq(fore200e);
1393 fore200e->bus->irq_ack(fore200e);
1398 #ifdef FORE200E_USE_TASKLET
1400 fore200e_tx_tasklet(unsigned long data)
1402 struct fore200e* fore200e = (struct fore200e*) data;
1403 unsigned long flags;
1405 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1407 spin_lock_irqsave(&fore200e->q_lock, flags);
1408 fore200e_tx_irq(fore200e);
1409 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1414 fore200e_rx_tasklet(unsigned long data)
1416 struct fore200e* fore200e = (struct fore200e*) data;
1417 unsigned long flags;
1419 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1421 spin_lock_irqsave(&fore200e->q_lock, flags);
1422 fore200e_rx_irq((struct fore200e*) data);
1423 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1429 fore200e_select_scheme(struct atm_vcc* vcc)
1431 /* fairly balance the VCs over (identical) buffer schemes */
1432 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1434 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1435 vcc->itf, vcc->vpi, vcc->vci, scheme);
1442 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1444 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1445 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1446 struct activate_opcode activ_opcode;
1447 struct deactivate_opcode deactiv_opcode;
1450 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1452 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1455 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1457 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1458 activ_opcode.aal = aal;
1459 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1460 activ_opcode.pad = 0;
1463 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1464 deactiv_opcode.pad = 0;
1467 vpvc.vci = vcc->vci;
1468 vpvc.vpi = vcc->vpi;
1470 *entry->status = STATUS_PENDING;
1474 #ifdef FORE200E_52BYTE_AAL0_SDU
1477 /* the MTU is not used by the cp, except in the case of AAL0 */
1478 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1479 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
1480 fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
1483 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
1484 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
1487 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1489 *entry->status = STATUS_FREE;
1492 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1493 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1497 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1498 activate ? "open" : "clos");
1504 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1507 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1509 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1511 /* compute the data cells to idle cells ratio from the tx PCR */
1512 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1513 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1516 /* disable rate control */
1517 rate->data_cells = rate->idle_cells = 0;
1523 fore200e_open(struct atm_vcc *vcc)
1525 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1526 struct fore200e_vcc* fore200e_vcc;
1527 struct fore200e_vc_map* vc_map;
1528 unsigned long flags;
1530 short vpi = vcc->vpi;
1532 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1533 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1535 spin_lock_irqsave(&fore200e->q_lock, flags);
1537 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1540 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1542 printk(FORE200E "VC %d.%d.%d already in use\n",
1543 fore200e->atm_dev->number, vpi, vci);
1550 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1552 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1553 if (fore200e_vcc == NULL) {
1558 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1559 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1560 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1561 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1562 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1563 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1564 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1566 /* pseudo-CBR bandwidth requested? */
1567 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1569 down(&fore200e->rate_sf);
1570 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1571 up(&fore200e->rate_sf);
1573 fore200e_kfree(fore200e_vcc);
1578 /* reserve bandwidth */
1579 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1580 up(&fore200e->rate_sf);
1583 vcc->itf = vcc->dev->number;
1585 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1586 set_bit(ATM_VF_ADDR, &vcc->flags);
1588 vcc->dev_data = fore200e_vcc;
1590 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1594 clear_bit(ATM_VF_ADDR, &vcc->flags);
1595 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1597 vcc->dev_data = NULL;
1599 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1601 fore200e_kfree(fore200e_vcc);
1605 /* compute rate control parameters */
1606 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1608 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1609 set_bit(ATM_VF_HASQOS, &vcc->flags);
1611 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1612 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1613 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1614 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1617 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1618 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1619 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1621 /* new incarnation of the vcc */
1622 vc_map->incarn = ++fore200e->incarn_count;
1624 /* VC unusable before this flag is set */
1625 set_bit(ATM_VF_READY, &vcc->flags);
1632 fore200e_close(struct atm_vcc* vcc)
1634 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1635 struct fore200e_vcc* fore200e_vcc;
1636 struct fore200e_vc_map* vc_map;
1637 unsigned long flags;
1640 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1641 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1643 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1645 clear_bit(ATM_VF_READY, &vcc->flags);
1647 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1649 spin_lock_irqsave(&fore200e->q_lock, flags);
1651 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1653 /* the vc is no longer considered as "in use" by fore200e_open() */
1656 vcc->itf = vcc->vci = vcc->vpi = 0;
1658 fore200e_vcc = FORE200E_VCC(vcc);
1659 FORE200E_VCC(vcc) = NULL;
1661 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1663 /* release reserved bandwidth, if any */
1664 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1666 down(&fore200e->rate_sf);
1667 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1668 up(&fore200e->rate_sf);
1670 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1673 clear_bit(ATM_VF_ADDR, &vcc->flags);
1674 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1676 ASSERT(fore200e_vcc);
1677 fore200e_kfree(fore200e_vcc);
1682 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1684 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1685 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1686 struct fore200e_vc_map* vc_map;
1687 struct host_txq* txq = &fore200e->host_txq;
1688 struct host_txq_entry* entry;
1690 struct tpd_haddr tpd_haddr;
1691 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1693 int tx_len = skb->len;
1694 u32* cell_header = NULL;
1695 unsigned char* skb_data;
1697 unsigned char* data;
1698 unsigned long flags;
1701 ASSERT(atomic_read(&vcc->sk->sk_wmem_alloc) >= 0);
1703 ASSERT(fore200e_vcc);
1705 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1706 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1707 dev_kfree_skb_any(skb);
1711 #ifdef FORE200E_52BYTE_AAL0_SDU
1712 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1713 cell_header = (u32*) skb->data;
1714 skb_data = skb->data + 4; /* skip 4-byte cell header */
1715 skb_len = tx_len = skb->len - 4;
1717 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1722 skb_data = skb->data;
1726 if (((unsigned long)skb_data) & 0x3) {
1728 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1733 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1735 /* this simply NUKES the PCA board */
1736 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1738 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1742 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1748 dev_kfree_skb_any(skb);
1753 memcpy(data, skb_data, skb_len);
1754 if (skb_len < tx_len)
1755 memset(data + skb_len, 0x00, tx_len - skb_len);
1761 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1762 ASSERT(vc_map->vcc == vcc);
1766 spin_lock_irqsave(&fore200e->q_lock, flags);
1768 entry = &txq->host_entry[ txq->head ];
1770 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1772 /* try to free completed tx queue entries */
1773 fore200e_tx_irq(fore200e);
1775 if (*entry->status != STATUS_FREE) {
1777 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1779 /* retry once again? */
1785 atomic_inc(&vcc->stats->tx_err);
1788 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1789 fore200e->name, fore200e->cp_queues->heartbeat);
1794 dev_kfree_skb_any(skb);
1804 entry->incarn = vc_map->incarn;
1805 entry->vc_map = vc_map;
1807 entry->data = tx_copy ? data : NULL;
1810 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, FORE200E_DMA_TODEVICE);
1811 tpd->tsd[ 0 ].length = tx_len;
1813 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1816 /* The dma_map call above implies a dma_sync so the device can use it,
1817 * thus no explicit dma_sync call is necessary here.
1820 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1821 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1822 tpd->tsd[0].length, skb_len);
1824 if (skb_len < fore200e_vcc->tx_min_pdu)
1825 fore200e_vcc->tx_min_pdu = skb_len;
1826 if (skb_len > fore200e_vcc->tx_max_pdu)
1827 fore200e_vcc->tx_max_pdu = skb_len;
1828 fore200e_vcc->tx_pdu++;
1830 /* set tx rate control information */
1831 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1832 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1835 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1836 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1837 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1838 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1839 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1842 /* set the ATM header, common to all cells conveying the PDU */
1843 tpd->atm_header.clp = 0;
1844 tpd->atm_header.plt = 0;
1845 tpd->atm_header.vci = vcc->vci;
1846 tpd->atm_header.vpi = vcc->vpi;
1847 tpd->atm_header.gfc = 0;
1850 tpd->spec.length = tx_len;
1852 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1855 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1857 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1859 *entry->status = STATUS_PENDING;
1860 fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
1862 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1869 fore200e_getstats(struct fore200e* fore200e)
1871 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1872 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1873 struct stats_opcode opcode;
1877 if (fore200e->stats == NULL) {
1878 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1879 if (fore200e->stats == NULL)
1883 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1884 sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1886 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1888 opcode.opcode = OPCODE_GET_STATS;
1891 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1893 *entry->status = STATUS_PENDING;
1895 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
1897 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1899 *entry->status = STATUS_FREE;
1901 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1904 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1913 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1915 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1917 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1918 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1925 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1927 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1929 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1930 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1936 #if 0 /* currently unused */
1938 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1940 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1941 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1942 struct oc3_opcode opcode;
1944 u32 oc3_regs_dma_addr;
1946 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1948 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1950 opcode.opcode = OPCODE_GET_OC3;
1955 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1957 *entry->status = STATUS_PENDING;
1959 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1961 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1963 *entry->status = STATUS_FREE;
1965 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1968 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1978 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1980 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1981 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1982 struct oc3_opcode opcode;
1985 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1987 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1989 opcode.opcode = OPCODE_SET_OC3;
1991 opcode.value = value;
1994 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1996 *entry->status = STATUS_PENDING;
1998 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
2000 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
2002 *entry->status = STATUS_FREE;
2005 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
2014 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
2016 u32 mct_value, mct_mask;
2019 if (!capable(CAP_NET_ADMIN))
2022 switch (loop_mode) {
2026 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
2029 case ATM_LM_LOC_PHY:
2030 mct_value = mct_mask = SUNI_MCT_DLE;
2033 case ATM_LM_RMT_PHY:
2034 mct_value = mct_mask = SUNI_MCT_LLE;
2041 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
2043 fore200e->loop_mode = loop_mode;
2049 static inline unsigned int
2050 fore200e_swap(unsigned int in)
2052 #if defined(__LITTLE_ENDIAN)
2061 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
2063 struct sonet_stats tmp;
2065 if (fore200e_getstats(fore200e) < 0)
2068 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
2069 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
2070 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
2071 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
2072 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
2073 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
2074 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
2075 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
2076 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
2077 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
2078 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
2079 fore200e_swap(fore200e->stats->aal34.cells_received) +
2080 fore200e_swap(fore200e->stats->aal5.cells_received);
2083 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
2090 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
2092 struct fore200e* fore200e = FORE200E_DEV(dev);
2094 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
2099 return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
2102 return put_user(0, (int*)arg) ? -EFAULT : 0;
2105 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
2108 return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
2111 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
2114 return -ENOSYS; /* not implemented */
2119 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
2121 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
2122 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
2124 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
2125 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
2129 DPRINTK(2, "change_qos %d.%d.%d, "
2130 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
2131 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
2132 "available_cell_rate = %u",
2133 vcc->itf, vcc->vpi, vcc->vci,
2134 fore200e_traffic_class[ qos->txtp.traffic_class ],
2135 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
2136 fore200e_traffic_class[ qos->rxtp.traffic_class ],
2137 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2138 flags, fore200e->available_cell_rate);
2140 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2142 down(&fore200e->rate_sf);
2143 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2144 up(&fore200e->rate_sf);
2148 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2149 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2151 up(&fore200e->rate_sf);
2153 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2155 /* update rate control parameters */
2156 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2158 set_bit(ATM_VF_HASQOS, &vcc->flags);
2168 fore200e_irq_request(struct fore200e* fore200e)
2170 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2172 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2173 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2177 printk(FORE200E "IRQ %s reserved for device %s\n",
2178 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2180 #ifdef FORE200E_USE_TASKLET
2181 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2182 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2185 fore200e->state = FORE200E_STATE_IRQ;
2191 fore200e_get_esi(struct fore200e* fore200e)
2193 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2199 ok = fore200e->bus->prom_read(fore200e, prom);
2201 fore200e_kfree(prom);
2205 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2207 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2208 prom->serial_number & 0xFFFF,
2209 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2210 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2212 for (i = 0; i < ESI_LEN; i++) {
2213 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2216 fore200e_kfree(prom);
2223 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2225 int scheme, magn, nbr, size, i;
2227 struct host_bsq* bsq;
2228 struct buffer* buffer;
2230 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2231 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2233 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2235 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2236 size = fore200e_rx_buf_size[ scheme ][ magn ];
2238 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2240 /* allocate the array of receive buffers */
2241 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2246 bsq->freebuf = NULL;
2248 for (i = 0; i < nbr; i++) {
2250 buffer[ i ].scheme = scheme;
2251 buffer[ i ].magn = magn;
2252 #ifdef FORE200E_BSQ_DEBUG
2253 buffer[ i ].index = i;
2254 buffer[ i ].supplied = 0;
2257 /* allocate the receive buffer body */
2258 if (fore200e_chunk_alloc(fore200e,
2259 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2260 FORE200E_DMA_FROMDEVICE) < 0) {
2263 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2264 fore200e_kfree(buffer);
2269 /* insert the buffer into the free buffer list */
2270 buffer[ i ].next = bsq->freebuf;
2271 bsq->freebuf = &buffer[ i ];
2273 /* all the buffers are free, initially */
2274 bsq->freebuf_count = nbr;
2276 #ifdef FORE200E_BSQ_DEBUG
2277 bsq_audit(3, bsq, scheme, magn);
2282 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2288 fore200e_init_bs_queue(struct fore200e* fore200e)
2290 int scheme, magn, i;
2292 struct host_bsq* bsq;
2293 struct cp_bsq_entry* cp_entry;
2295 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2296 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2298 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2300 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2302 /* allocate and align the array of status words */
2303 if (fore200e->bus->dma_chunk_alloc(fore200e,
2305 sizeof(enum status),
2307 fore200e->bus->status_alignment) < 0) {
2311 /* allocate and align the array of receive buffer descriptors */
2312 if (fore200e->bus->dma_chunk_alloc(fore200e,
2314 sizeof(struct rbd_block),
2316 fore200e->bus->descr_alignment) < 0) {
2318 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2322 /* get the base address of the cp resident buffer supply queue entries */
2323 cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
2324 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
2326 /* fill the host resident and cp resident buffer supply queue entries */
2327 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2329 bsq->host_entry[ i ].status =
2330 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2331 bsq->host_entry[ i ].rbd_block =
2332 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2333 bsq->host_entry[ i ].rbd_block_dma =
2334 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2335 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2337 *bsq->host_entry[ i ].status = STATUS_FREE;
2339 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2340 &cp_entry[ i ].status_haddr);
2345 fore200e->state = FORE200E_STATE_INIT_BSQ;
2351 fore200e_init_rx_queue(struct fore200e* fore200e)
2353 struct host_rxq* rxq = &fore200e->host_rxq;
2354 struct cp_rxq_entry* cp_entry;
2357 DPRINTK(2, "receive queue is being initialized\n");
2359 /* allocate and align the array of status words */
2360 if (fore200e->bus->dma_chunk_alloc(fore200e,
2362 sizeof(enum status),
2364 fore200e->bus->status_alignment) < 0) {
2368 /* allocate and align the array of receive PDU descriptors */
2369 if (fore200e->bus->dma_chunk_alloc(fore200e,
2373 fore200e->bus->descr_alignment) < 0) {
2375 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2379 /* get the base address of the cp resident rx queue entries */
2380 cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
2381 fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
2383 /* fill the host resident and cp resident rx entries */
2384 for (i=0; i < QUEUE_SIZE_RX; i++) {
2386 rxq->host_entry[ i ].status =
2387 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2388 rxq->host_entry[ i ].rpd =
2389 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2390 rxq->host_entry[ i ].rpd_dma =
2391 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2392 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2394 *rxq->host_entry[ i ].status = STATUS_FREE;
2396 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2397 &cp_entry[ i ].status_haddr);
2399 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2400 &cp_entry[ i ].rpd_haddr);
2403 /* set the head entry of the queue */
2406 fore200e->state = FORE200E_STATE_INIT_RXQ;
2412 fore200e_init_tx_queue(struct fore200e* fore200e)
2414 struct host_txq* txq = &fore200e->host_txq;
2415 struct cp_txq_entry* cp_entry;
2418 DPRINTK(2, "transmit queue is being initialized\n");
2420 /* allocate and align the array of status words */
2421 if (fore200e->bus->dma_chunk_alloc(fore200e,
2423 sizeof(enum status),
2425 fore200e->bus->status_alignment) < 0) {
2429 /* allocate and align the array of transmit PDU descriptors */
2430 if (fore200e->bus->dma_chunk_alloc(fore200e,
2434 fore200e->bus->descr_alignment) < 0) {
2436 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2440 /* get the base address of the cp resident tx queue entries */
2441 cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
2442 fore200e->bus->read(&fore200e->cp_queues->cp_txq));
2444 /* fill the host resident and cp resident tx entries */
2445 for (i=0; i < QUEUE_SIZE_TX; i++) {
2447 txq->host_entry[ i ].status =
2448 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2449 txq->host_entry[ i ].tpd =
2450 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2451 txq->host_entry[ i ].tpd_dma =
2452 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2453 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2455 *txq->host_entry[ i ].status = STATUS_FREE;
2457 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2458 &cp_entry[ i ].status_haddr);
2460 /* although there is a one-to-one mapping of tx queue entries and tpds,
2461 we do not write here the DMA (physical) base address of each tpd into
2462 the related cp resident entry, because the cp relies on this write
2463 operation to detect that a new pdu has been submitted for tx */
2466 /* set the head and tail entries of the queue */
2470 fore200e->state = FORE200E_STATE_INIT_TXQ;
2476 fore200e_init_cmd_queue(struct fore200e* fore200e)
2478 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2479 struct cp_cmdq_entry* cp_entry;
2482 DPRINTK(2, "command queue is being initialized\n");
2484 /* allocate and align the array of status words */
2485 if (fore200e->bus->dma_chunk_alloc(fore200e,
2487 sizeof(enum status),
2489 fore200e->bus->status_alignment) < 0) {
2493 /* get the base address of the cp resident cmd queue entries */
2494 cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
2495 fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
2497 /* fill the host resident and cp resident cmd entries */
2498 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2500 cmdq->host_entry[ i ].status =
2501 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2502 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2504 *cmdq->host_entry[ i ].status = STATUS_FREE;
2506 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2507 &cp_entry[ i ].status_haddr);
2510 /* set the head entry of the queue */
2513 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2519 fore200e_param_bs_queue(struct fore200e* fore200e,
2520 enum buffer_scheme scheme, enum buffer_magn magn,
2521 int queue_length, int pool_size, int supply_blksize)
2523 struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2525 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2526 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2527 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2528 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2533 fore200e_initialize(struct fore200e* fore200e)
2535 struct cp_queues* cpq;
2536 int ok, scheme, magn;
2538 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2540 init_MUTEX(&fore200e->rate_sf);
2541 spin_lock_init(&fore200e->q_lock);
2543 cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
2545 /* enable cp to host interrupts */
2546 fore200e->bus->write(1, &cpq->imask);
2548 if (fore200e->bus->irq_enable)
2549 fore200e->bus->irq_enable(fore200e);
2551 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2553 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2554 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2555 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2557 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2558 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2560 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2561 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2562 fore200e_param_bs_queue(fore200e, scheme, magn,
2564 fore200e_rx_buf_nbr[ scheme ][ magn ],
2567 /* issue the initialize command */
2568 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2569 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2571 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2573 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2577 printk(FORE200E "device %s initialized\n", fore200e->name);
2579 fore200e->state = FORE200E_STATE_INITIALIZE;
2585 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2587 struct cp_monitor* monitor = fore200e->cp_monitor;
2592 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2597 fore200e_monitor_getc(struct fore200e* fore200e)
2599 struct cp_monitor* monitor = fore200e->cp_monitor;
2600 unsigned long timeout = jiffies + MSECS(50);
2603 while (time_before(jiffies, timeout)) {
2605 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2607 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2609 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2611 printk("%c", c & 0xFF);
2622 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2626 /* the i960 monitor doesn't accept any new character if it has something to say */
2627 while (fore200e_monitor_getc(fore200e) >= 0);
2629 fore200e_monitor_putc(fore200e, *str++);
2632 while (fore200e_monitor_getc(fore200e) >= 0);
2637 fore200e_start_fw(struct fore200e* fore200e)
2641 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2643 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2645 #if defined(__sparc_v9__)
2646 /* reported to be required by SBA cards on some sparc64 hosts */
2650 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2652 fore200e_monitor_puts(fore200e, cmd);
2654 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2656 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2660 printk(FORE200E "device %s firmware started\n", fore200e->name);
2662 fore200e->state = FORE200E_STATE_START_FW;
2668 fore200e_load_fw(struct fore200e* fore200e)
2670 u32* fw_data = (u32*) fore200e->bus->fw_data;
2671 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2673 struct fw_header* fw_header = (struct fw_header*) fw_data;
2675 u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2677 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2678 fore200e->name, load_addr, fw_size);
2680 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2681 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2685 for (; fw_size--; fw_data++, load_addr++)
2686 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2688 fore200e->state = FORE200E_STATE_LOAD_FW;
2694 fore200e_register(struct fore200e* fore200e)
2696 struct atm_dev* atm_dev;
2698 DPRINTK(2, "device %s being registered\n", fore200e->name);
2700 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2702 if (atm_dev == NULL) {
2703 printk(FORE200E "unable to register device %s\n", fore200e->name);
2707 atm_dev->dev_data = fore200e;
2708 fore200e->atm_dev = atm_dev;
2710 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2711 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2713 fore200e->available_cell_rate = ATM_OC3_PCR;
2715 fore200e->state = FORE200E_STATE_REGISTER;
2721 fore200e_init(struct fore200e* fore200e)
2723 if (fore200e_register(fore200e) < 0)
2726 if (fore200e->bus->configure(fore200e) < 0)
2729 if (fore200e->bus->map(fore200e) < 0)
2732 if (fore200e_reset(fore200e, 1) < 0)
2735 if (fore200e_load_fw(fore200e) < 0)
2738 if (fore200e_start_fw(fore200e) < 0)
2741 if (fore200e_initialize(fore200e) < 0)
2744 if (fore200e_init_cmd_queue(fore200e) < 0)
2747 if (fore200e_init_tx_queue(fore200e) < 0)
2750 if (fore200e_init_rx_queue(fore200e) < 0)
2753 if (fore200e_init_bs_queue(fore200e) < 0)
2756 if (fore200e_alloc_rx_buf(fore200e) < 0)
2759 if (fore200e_get_esi(fore200e) < 0)
2762 if (fore200e_irq_request(fore200e) < 0)
2765 fore200e_supply(fore200e);
2767 /* all done, board initialization is now complete */
2768 fore200e->state = FORE200E_STATE_COMPLETE;
2773 fore200e_module_init(void)
2775 const struct fore200e_bus* bus;
2776 struct fore200e* fore200e;
2779 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2781 /* for each configured bus interface */
2782 for (link = 0, bus = fore200e_bus; bus->model_name; bus++) {
2784 /* detect all boards present on that bus */
2785 for (index = 0; (fore200e = bus->detect(bus, index)); index++) {
2787 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2788 fore200e->bus->model_name,
2789 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2791 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2793 if (fore200e_init(fore200e) < 0) {
2795 fore200e_shutdown(fore200e);
2801 fore200e->next = fore200e_boards;
2802 fore200e_boards = fore200e;
2813 fore200e_module_cleanup(void)
2815 while (fore200e_boards) {
2816 struct fore200e* fore200e = fore200e_boards;
2818 fore200e_shutdown(fore200e);
2819 fore200e_boards = fore200e->next;
2822 DPRINTK(1, "module being removed\n");
2827 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2829 struct fore200e* fore200e = FORE200E_DEV(dev);
2830 struct fore200e_vcc* fore200e_vcc;
2831 struct atm_vcc* vcc;
2832 int i, len, left = *pos;
2833 unsigned long flags;
2837 if (fore200e_getstats(fore200e) < 0)
2840 len = sprintf(page,"\n"
2842 " internal name:\t\t%s\n", fore200e->name);
2844 /* print bus-specific information */
2845 if (fore200e->bus->proc_read)
2846 len += fore200e->bus->proc_read(fore200e, page + len);
2848 len += sprintf(page + len,
2849 " interrupt line:\t\t%s\n"
2850 " physical base address:\t0x%p\n"
2851 " virtual base address:\t0x%p\n"
2852 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2853 " board serial number:\t\t%d\n\n",
2854 fore200e_irq_itoa(fore200e->irq),
2855 (void*)fore200e->phys_base,
2856 (void*)fore200e->virt_base,
2857 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2858 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2859 fore200e->esi[4] * 256 + fore200e->esi[5]);
2865 return sprintf(page,
2866 " free small bufs, scheme 1:\t%d\n"
2867 " free large bufs, scheme 1:\t%d\n"
2868 " free small bufs, scheme 2:\t%d\n"
2869 " free large bufs, scheme 2:\t%d\n",
2870 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2871 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2872 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2873 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2876 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2878 len = sprintf(page,"\n\n"
2879 " cell processor:\n"
2880 " heartbeat state:\t\t");
2882 if (hb >> 16 != 0xDEAD)
2883 len += sprintf(page + len, "0x%08x\n", hb);
2885 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2891 static const char* media_name[] = {
2892 "unshielded twisted pair",
2893 "multimode optical fiber ST",
2894 "multimode optical fiber SC",
2895 "single-mode optical fiber ST",
2896 "single-mode optical fiber SC",
2900 static const char* oc3_mode[] = {
2902 "diagnostic loopback",
2907 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2908 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2909 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2910 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2913 if ((media_index < 0) || (media_index > 4))
2916 switch (fore200e->loop_mode) {
2917 case ATM_LM_NONE: oc3_index = 0;
2919 case ATM_LM_LOC_PHY: oc3_index = 1;
2921 case ATM_LM_RMT_PHY: oc3_index = 2;
2923 default: oc3_index = 3;
2926 return sprintf(page,
2927 " firmware release:\t\t%d.%d.%d\n"
2928 " monitor release:\t\t%d.%d\n"
2929 " media type:\t\t\t%s\n"
2930 " OC-3 revision:\t\t0x%x\n"
2931 " OC-3 mode:\t\t\t%s",
2932 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2933 mon960_release >> 16, mon960_release << 16 >> 16,
2934 media_name[ media_index ],
2936 oc3_mode[ oc3_index ]);
2940 struct cp_monitor* cp_monitor = fore200e->cp_monitor;
2942 return sprintf(page,
2945 " version number:\t\t%d\n"
2946 " boot status word:\t\t0x%08x\n",
2947 fore200e->bus->read(&cp_monitor->mon_version),
2948 fore200e->bus->read(&cp_monitor->bstat));
2952 return sprintf(page,
2954 " device statistics:\n"
2956 " crc_header_errors:\t\t%10u\n"
2957 " framing_errors:\t\t%10u\n",
2958 fore200e_swap(fore200e->stats->phy.crc_header_errors),
2959 fore200e_swap(fore200e->stats->phy.framing_errors));
2962 return sprintf(page, "\n"
2964 " section_bip8_errors:\t%10u\n"
2965 " path_bip8_errors:\t\t%10u\n"
2966 " line_bip24_errors:\t\t%10u\n"
2967 " line_febe_errors:\t\t%10u\n"
2968 " path_febe_errors:\t\t%10u\n"
2969 " corr_hcs_errors:\t\t%10u\n"
2970 " ucorr_hcs_errors:\t\t%10u\n",
2971 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
2972 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
2973 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
2974 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
2975 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
2976 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
2977 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
2980 return sprintf(page,"\n"
2981 " ATM:\t\t\t\t cells\n"
2984 " vpi out of range:\t\t%10u\n"
2985 " vpi no conn:\t\t%10u\n"
2986 " vci out of range:\t\t%10u\n"
2987 " vci no conn:\t\t%10u\n",
2988 fore200e_swap(fore200e->stats->atm.cells_transmitted),
2989 fore200e_swap(fore200e->stats->atm.cells_received),
2990 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
2991 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
2992 fore200e_swap(fore200e->stats->atm.vci_bad_range),
2993 fore200e_swap(fore200e->stats->atm.vci_no_conn));
2996 return sprintf(page,"\n"
2997 " AAL0:\t\t\t cells\n"
3000 " dropped:\t\t\t%10u\n",
3001 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
3002 fore200e_swap(fore200e->stats->aal0.cells_received),
3003 fore200e_swap(fore200e->stats->aal0.cells_dropped));
3006 return sprintf(page,"\n"
3008 " SAR sublayer:\t\t cells\n"
3011 " dropped:\t\t\t%10u\n"
3012 " CRC errors:\t\t%10u\n"
3013 " protocol errors:\t\t%10u\n\n"
3014 " CS sublayer:\t\t PDUs\n"
3017 " dropped:\t\t\t%10u\n"
3018 " protocol errors:\t\t%10u\n",
3019 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
3020 fore200e_swap(fore200e->stats->aal34.cells_received),
3021 fore200e_swap(fore200e->stats->aal34.cells_dropped),
3022 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
3023 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
3024 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
3025 fore200e_swap(fore200e->stats->aal34.cspdus_received),
3026 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
3027 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
3030 return sprintf(page,"\n"
3032 " SAR sublayer:\t\t cells\n"
3035 " dropped:\t\t\t%10u\n"
3036 " congestions:\t\t%10u\n\n"
3037 " CS sublayer:\t\t PDUs\n"
3040 " dropped:\t\t\t%10u\n"
3041 " CRC errors:\t\t%10u\n"
3042 " protocol errors:\t\t%10u\n",
3043 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
3044 fore200e_swap(fore200e->stats->aal5.cells_received),
3045 fore200e_swap(fore200e->stats->aal5.cells_dropped),
3046 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
3047 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
3048 fore200e_swap(fore200e->stats->aal5.cspdus_received),
3049 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
3050 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
3051 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
3054 return sprintf(page,"\n"
3055 " AUX:\t\t allocation failures\n"
3056 " small b1:\t\t\t%10u\n"
3057 " large b1:\t\t\t%10u\n"
3058 " small b2:\t\t\t%10u\n"
3059 " large b2:\t\t\t%10u\n"
3060 " RX PDUs:\t\t\t%10u\n"
3061 " TX PDUs:\t\t\t%10lu\n",
3062 fore200e_swap(fore200e->stats->aux.small_b1_failed),
3063 fore200e_swap(fore200e->stats->aux.large_b1_failed),
3064 fore200e_swap(fore200e->stats->aux.small_b2_failed),
3065 fore200e_swap(fore200e->stats->aux.large_b2_failed),
3066 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed),
3070 return sprintf(page,"\n"
3071 " receive carrier:\t\t\t%s\n",
3072 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3075 return sprintf(page,"\n"
3076 " VCCs:\n address VPI VCI AAL "
3077 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3080 for (i = 0; i < NBR_CONNECT; i++) {
3082 vcc = fore200e->vc_map[i].vcc;
3087 spin_lock_irqsave(&fore200e->q_lock, flags);
3089 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3091 fore200e_vcc = FORE200E_VCC(vcc);
3092 ASSERT(fore200e_vcc);
3095 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3096 (u32)(unsigned long)vcc,
3097 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3098 fore200e_vcc->tx_pdu,
3099 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3100 fore200e_vcc->tx_max_pdu,
3101 fore200e_vcc->rx_pdu,
3102 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3103 fore200e_vcc->rx_max_pdu);
3105 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3109 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3115 module_init(fore200e_module_init);
3116 module_exit(fore200e_module_cleanup);
3119 static const struct atmdev_ops fore200e_ops =
3121 .open = fore200e_open,
3122 .close = fore200e_close,
3123 .ioctl = fore200e_ioctl,
3124 .getsockopt = fore200e_getsockopt,
3125 .setsockopt = fore200e_setsockopt,
3126 .send = fore200e_send,
3127 .change_qos = fore200e_change_qos,
3128 .proc_read = fore200e_proc_read,
3129 .owner = THIS_MODULE
3133 #ifdef CONFIG_ATM_FORE200E_PCA
3134 extern const unsigned char _fore200e_pca_fw_data[];
3135 extern const unsigned int _fore200e_pca_fw_size;
3137 #ifdef CONFIG_ATM_FORE200E_SBA
3138 extern const unsigned char _fore200e_sba_fw_data[];
3139 extern const unsigned int _fore200e_sba_fw_size;
3142 static const struct fore200e_bus fore200e_bus[] = {
3143 #ifdef CONFIG_ATM_FORE200E_PCA
3144 { "PCA-200E", "pca200e", 32, 4, 32,
3145 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
3148 fore200e_pca_dma_map,
3149 fore200e_pca_dma_unmap,
3150 fore200e_pca_dma_sync_for_cpu,
3151 fore200e_pca_dma_sync_for_device,
3152 fore200e_pca_dma_chunk_alloc,
3153 fore200e_pca_dma_chunk_free,
3154 fore200e_pca_detect,
3155 fore200e_pca_configure,
3158 fore200e_pca_prom_read,
3161 fore200e_pca_irq_check,
3162 fore200e_pca_irq_ack,
3163 fore200e_pca_proc_read,
3166 #ifdef CONFIG_ATM_FORE200E_SBA
3167 { "SBA-200E", "sba200e", 32, 64, 32,
3168 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
3171 fore200e_sba_dma_map,
3172 fore200e_sba_dma_unmap,
3173 fore200e_sba_dma_sync_for_cpu,
3174 fore200e_sba_dma_sync_for_device,
3175 fore200e_sba_dma_chunk_alloc,
3176 fore200e_sba_dma_chunk_free,
3177 fore200e_sba_detect,
3178 fore200e_sba_configure,
3181 fore200e_sba_prom_read,
3183 fore200e_sba_irq_enable,
3184 fore200e_sba_irq_check,
3185 fore200e_sba_irq_ack,
3186 fore200e_sba_proc_read,
3192 #ifdef MODULE_LICENSE
3193 MODULE_LICENSE("GPL");