1 /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
3 /**************************************************************************
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 **************************************************************************/
16 static inline void i915_print_status_page(drm_device_t * dev)
18 drm_i915_private_t *dev_priv = dev->dev_private;
19 u32 *temp = dev_priv->hw_status_page;
22 DRM_DEBUG("no status page\n");
26 DRM_DEBUG("hw_status: Interrupt Status : %x\n", temp[0]);
27 DRM_DEBUG("hw_status: LpRing Head ptr : %x\n", temp[1]);
28 DRM_DEBUG("hw_status: IRing Head ptr : %x\n", temp[2]);
29 DRM_DEBUG("hw_status: Reserved : %x\n", temp[3]);
30 DRM_DEBUG("hw_status: Driver Counter : %d\n", temp[5]);
34 /* Really want an OS-independent resettable timer. Would like to have
35 * this loop run for (eg) 3 sec, but have the timer reset every time
36 * the head pointer changes, so that EBUSY only happens if the ring
37 * actually stalls for (eg) 3 seconds.
39 int i915_wait_ring(drm_device_t * dev, int n, const char *caller)
41 drm_i915_private_t *dev_priv = dev->dev_private;
42 drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
43 u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
46 for (i = 0; i < 10000; i++) {
47 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
48 ring->space = ring->head - (ring->tail + 8);
50 ring->space += ring->Size;
54 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
56 if (ring->head != last_head)
59 last_head = ring->head;
62 return DRM_ERR(EBUSY);
65 void i915_kernel_lost_context(drm_device_t * dev)
67 drm_i915_private_t *dev_priv = dev->dev_private;
68 drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
70 ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
71 ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
72 ring->space = ring->head - (ring->tail + 8);
74 ring->space += ring->Size;
76 if (ring->head == ring->tail)
77 dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
80 int i915_dma_cleanup(drm_device_t * dev)
82 /* Make sure interrupts are disabled here because the uninstall ioctl
83 * may not have been called from userspace and after dev_private
84 * is freed, it's too late.
87 DRM(irq_uninstall) (dev);
89 if (dev->dev_private) {
90 drm_i915_private_t *dev_priv =
91 (drm_i915_private_t *) dev->dev_private;
93 if (dev_priv->ring.virtual_start) {
94 drm_core_ioremapfree( &dev_priv->ring.map, dev);
97 if (dev_priv->hw_status_page) {
98 pci_free_consistent(dev->pdev, PAGE_SIZE,
99 dev_priv->hw_status_page,
100 dev_priv->dma_status_page);
101 /* Need to rewrite hardware status page */
102 I915_WRITE(0x02080, 0x1ffff000);
105 DRM(free) (dev->dev_private, sizeof(drm_i915_private_t),
108 dev->dev_private = NULL;
114 static int i915_initialize(drm_device_t * dev,
115 drm_i915_private_t * dev_priv,
116 drm_i915_init_t * init)
118 memset(dev_priv, 0, sizeof(drm_i915_private_t));
121 if (!dev_priv->sarea) {
122 DRM_ERROR("can not find sarea!\n");
123 dev->dev_private = (void *)dev_priv;
124 i915_dma_cleanup(dev);
125 return DRM_ERR(EINVAL);
128 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
129 if (!dev_priv->mmio_map) {
130 dev->dev_private = (void *)dev_priv;
131 i915_dma_cleanup(dev);
132 DRM_ERROR("can not find mmio map!\n");
133 return DRM_ERR(EINVAL);
136 dev_priv->sarea_priv = (drm_i915_sarea_t *)
137 ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
139 dev_priv->ring.Start = init->ring_start;
140 dev_priv->ring.End = init->ring_end;
141 dev_priv->ring.Size = init->ring_size;
142 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
144 dev_priv->ring.map.offset = init->ring_start;
145 dev_priv->ring.map.size = init->ring_size;
146 dev_priv->ring.map.type = 0;
147 dev_priv->ring.map.flags = 0;
148 dev_priv->ring.map.mtrr = 0;
150 drm_core_ioremap( &dev_priv->ring.map, dev );
152 if (dev_priv->ring.map.handle == NULL) {
153 dev->dev_private = (void *)dev_priv;
154 i915_dma_cleanup(dev);
155 DRM_ERROR("can not ioremap virtual address for"
157 return DRM_ERR(ENOMEM);
160 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
162 dev_priv->back_offset = init->back_offset;
163 dev_priv->front_offset = init->front_offset;
164 dev_priv->current_page = 0;
165 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
167 /* We are using separate values as placeholders for mechanisms for
168 * private backbuffer/depthbuffer usage.
170 dev_priv->use_mi_batchbuffer_start = 0;
172 /* Allow hardware batchbuffers unless told otherwise.
174 dev_priv->allow_batchbuffer = 1;
176 /* Program Hardware Status Page */
177 dev_priv->hw_status_page =
178 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
179 &dev_priv->dma_status_page);
181 if (!dev_priv->hw_status_page) {
182 dev->dev_private = (void *)dev_priv;
183 i915_dma_cleanup(dev);
184 DRM_ERROR("Can not allocate hardware status page\n");
185 return DRM_ERR(ENOMEM);
187 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
188 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
190 I915_WRITE(0x02080, dev_priv->dma_status_page);
191 DRM_DEBUG("Enabled hardware status page\n");
193 dev->dev_private = (void *)dev_priv;
198 static int i915_resume(drm_device_t * dev)
200 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
202 DRM_DEBUG("%s\n", __FUNCTION__);
204 if (!dev_priv->sarea) {
205 DRM_ERROR("can not find sarea!\n");
206 return DRM_ERR(EINVAL);
209 if (!dev_priv->mmio_map) {
210 DRM_ERROR("can not find mmio map!\n");
211 return DRM_ERR(EINVAL);
214 if (dev_priv->ring.map.handle == NULL) {
215 DRM_ERROR("can not ioremap virtual address for"
217 return DRM_ERR(ENOMEM);
220 /* Program Hardware Status Page */
221 if (!dev_priv->hw_status_page) {
222 DRM_ERROR("Can not find hardware status page\n");
223 return DRM_ERR(EINVAL);
225 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
227 I915_WRITE(0x02080, dev_priv->dma_status_page);
228 DRM_DEBUG("Enabled hardware status page\n");
233 int i915_dma_init(DRM_IOCTL_ARGS)
236 drm_i915_private_t *dev_priv;
237 drm_i915_init_t init;
240 DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data,
245 dev_priv = DRM(alloc) (sizeof(drm_i915_private_t),
247 if (dev_priv == NULL)
248 return DRM_ERR(ENOMEM);
249 retcode = i915_initialize(dev, dev_priv, &init);
251 case I915_CLEANUP_DMA:
252 retcode = i915_dma_cleanup(dev);
254 case I915_RESUME_DMA:
255 retcode = i915_resume(dev);
265 /* Implement basically the same security restrictions as hardware does
266 * for MI_BATCH_NON_SECURE. These can be made stricter at any time.
268 * Most of the calculations below involve calculating the size of a
269 * particular instruction. It's important to get the size right as
270 * that tells us where the next instruction to check is. Any illegal
271 * instruction detected will be given a size of zero, which is a
272 * signal to abort the rest of the buffer.
274 static int do_validate_cmd(int cmd)
276 switch (((cmd >> 29) & 0x7)) {
278 switch ((cmd >> 23) & 0x3f) {
280 return 1; /* MI_NOOP */
282 return 1; /* MI_FLUSH */
284 return 0; /* disallow everything else */
288 return 0; /* reserved */
290 return (cmd & 0xff) + 2; /* 2d commands */
292 if (((cmd >> 24) & 0x1f) <= 0x18)
295 switch ((cmd >> 24) & 0x1f) {
299 switch ((cmd>>16)&0xff) {
301 return (cmd & 0x1f) + 2;
303 return (cmd & 0xf) + 2;
305 return (cmd & 0xffff) + 2;
309 return (cmd & 0xffff) + 1;
313 if ((cmd & (1 << 23)) == 0) /* inline vertices */
314 return (cmd & 0x1ffff) + 2;
315 else if (cmd & (1 << 17)) /* indirect random */
316 if ((cmd & 0xffff) == 0)
317 return 0; /* unknown length, too hard */
319 return (((cmd & 0xffff) + 1) / 2) + 1;
321 return 2; /* indirect sequential */
332 static int validate_cmd(int cmd)
334 int ret = do_validate_cmd(cmd);
336 /* printk("validate_cmd( %x ): %d\n", cmd, ret); */
341 static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
343 drm_i915_private_t *dev_priv = dev->dev_private;
347 for (i = 0; i < dwords;) {
350 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
351 return DRM_ERR(EINVAL);
353 /* printk("%d/%d ", i, dwords); */
355 if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
356 return DRM_ERR(EINVAL);
362 if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
364 return DRM_ERR(EINVAL);
374 static int i915_emit_box(drm_device_t * dev,
375 drm_clip_rect_t __user * boxes,
376 int i, int DR1, int DR4)
378 drm_i915_private_t *dev_priv = dev->dev_private;
382 if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
386 if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
387 DRM_ERROR("Bad box %d,%d..%d,%d\n",
388 box.x1, box.y1, box.x2, box.y2);
389 return DRM_ERR(EINVAL);
393 OUT_RING(GFX_OP_DRAWRECT_INFO);
395 OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
396 OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
404 static int i915_dispatch_cmdbuffer(drm_device_t * dev,
405 drm_i915_cmdbuffer_t * cmd)
407 int nbox = cmd->num_cliprects;
408 int i = 0, count, ret;
411 DRM_ERROR("alignment");
412 return DRM_ERR(EINVAL);
415 i915_kernel_lost_context(dev);
417 count = nbox ? nbox : 1;
419 for (i = 0; i < count; i++) {
421 ret = i915_emit_box(dev, cmd->cliprects, i,
427 ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
435 static int i915_dispatch_batchbuffer(drm_device_t * dev,
436 drm_i915_batchbuffer_t * batch)
438 drm_i915_private_t *dev_priv = dev->dev_private;
439 drm_clip_rect_t __user *boxes = batch->cliprects;
440 int nbox = batch->num_cliprects;
444 if ((batch->start | batch->used) & 0x7) {
445 DRM_ERROR("alignment");
446 return DRM_ERR(EINVAL);
449 i915_kernel_lost_context(dev);
451 count = nbox ? nbox : 1;
453 for (i = 0; i < count; i++) {
455 int ret = i915_emit_box(dev, boxes, i,
456 batch->DR1, batch->DR4);
461 if (dev_priv->use_mi_batchbuffer_start) {
463 OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
464 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
468 OUT_RING(MI_BATCH_BUFFER);
469 OUT_RING(batch->start | MI_BATCH_NON_SECURE);
470 OUT_RING(batch->start + batch->used - 4);
476 dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
479 OUT_RING(CMD_STORE_DWORD_IDX);
481 OUT_RING(dev_priv->counter);
488 static int i915_dispatch_flip(drm_device_t * dev)
490 drm_i915_private_t *dev_priv = dev->dev_private;
493 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
495 dev_priv->current_page,
496 dev_priv->sarea_priv->pf_current_page);
498 i915_kernel_lost_context(dev);
501 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
506 OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
508 if (dev_priv->current_page == 0) {
509 OUT_RING(dev_priv->back_offset);
510 dev_priv->current_page = 1;
512 OUT_RING(dev_priv->front_offset);
513 dev_priv->current_page = 0;
519 OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
523 dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
526 OUT_RING(CMD_STORE_DWORD_IDX);
528 OUT_RING(dev_priv->counter);
532 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
536 static int i915_quiescent(drm_device_t * dev)
538 drm_i915_private_t *dev_priv = dev->dev_private;
540 i915_kernel_lost_context(dev);
541 return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
544 int i915_flush_ioctl(DRM_IOCTL_ARGS)
548 if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
549 DRM_ERROR("i915_flush_ioctl called without lock held\n");
550 return DRM_ERR(EINVAL);
553 return i915_quiescent(dev);
556 int i915_batchbuffer(DRM_IOCTL_ARGS)
559 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
560 u32 *hw_status = dev_priv->hw_status_page;
561 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
562 dev_priv->sarea_priv;
563 drm_i915_batchbuffer_t batch;
566 if (!dev_priv->allow_batchbuffer) {
567 DRM_ERROR("Batchbuffer ioctl disabled\n");
568 return DRM_ERR(EINVAL);
571 DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data,
574 DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
575 batch.start, batch.used, batch.num_cliprects);
577 if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
578 DRM_ERROR("i915_batchbuffer called without lock held\n");
579 return DRM_ERR(EINVAL);
582 if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects,
583 batch.num_cliprects *
584 sizeof(drm_clip_rect_t)))
585 return DRM_ERR(EFAULT);
587 ret = i915_dispatch_batchbuffer(dev, &batch);
589 sarea_priv->last_dispatch = (int)hw_status[5];
593 int i915_cmdbuffer(DRM_IOCTL_ARGS)
596 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
597 u32 *hw_status = dev_priv->hw_status_page;
598 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
599 dev_priv->sarea_priv;
600 drm_i915_cmdbuffer_t cmdbuf;
603 DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data,
606 DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
607 cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects);
609 if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
610 DRM_ERROR("i915_cmdbuffer called without lock held\n");
611 return DRM_ERR(EINVAL);
614 if (cmdbuf.num_cliprects &&
615 DRM_VERIFYAREA_READ(cmdbuf.cliprects,
616 cmdbuf.num_cliprects *
617 sizeof(drm_clip_rect_t))) {
618 DRM_ERROR("Fault accessing cliprects\n");
619 return DRM_ERR(EFAULT);
622 ret = i915_dispatch_cmdbuffer(dev, &cmdbuf);
624 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
628 sarea_priv->last_dispatch = (int)hw_status[5];
632 int i915_do_cleanup_pageflip(drm_device_t * dev)
634 drm_i915_private_t *dev_priv = dev->dev_private;
636 DRM_DEBUG("%s\n", __FUNCTION__);
637 if (dev_priv->current_page != 0)
638 i915_dispatch_flip(dev);
643 int i915_flip_bufs(DRM_IOCTL_ARGS)
647 DRM_DEBUG("%s\n", __FUNCTION__);
648 if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
649 DRM_ERROR("i915_flip_buf called without lock held\n");
650 return DRM_ERR(EINVAL);
653 return i915_dispatch_flip(dev);
656 int i915_getparam(DRM_IOCTL_ARGS)
659 drm_i915_private_t *dev_priv = dev->dev_private;
660 drm_i915_getparam_t param;
664 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
665 return DRM_ERR(EINVAL);
668 DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data,
671 switch (param.param) {
672 case I915_PARAM_IRQ_ACTIVE:
673 value = dev->irq ? 1 : 0;
675 case I915_PARAM_ALLOW_BATCHBUFFER:
676 value = dev_priv->allow_batchbuffer ? 1 : 0;
679 DRM_ERROR("Unkown parameter %d\n", param.param);
680 return DRM_ERR(EINVAL);
683 if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
684 DRM_ERROR("DRM_COPY_TO_USER failed\n");
685 return DRM_ERR(EFAULT);
691 int i915_setparam(DRM_IOCTL_ARGS)
694 drm_i915_private_t *dev_priv = dev->dev_private;
695 drm_i915_setparam_t param;
698 DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
699 return DRM_ERR(EINVAL);
702 DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data,
705 switch (param.param) {
706 case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
707 dev_priv->use_mi_batchbuffer_start = param.value;
709 case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
710 dev_priv->tex_lru_log_granularity = param.value;
712 case I915_SETPARAM_ALLOW_BATCHBUFFER:
713 dev_priv->allow_batchbuffer = param.value;
716 DRM_ERROR("unknown parameter %d\n", param.param);
717 return DRM_ERR(EINVAL);
723 static void i915_driver_pretakedown(drm_device_t *dev)
725 if ( dev->dev_private ) {
726 drm_i915_private_t *dev_priv = dev->dev_private;
727 i915_mem_takedown( &(dev_priv->agp_heap) );
729 i915_dma_cleanup( dev );
732 static void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp)
734 if ( dev->dev_private ) {
735 drm_i915_private_t *dev_priv = dev->dev_private;
736 i915_mem_release( dev, filp, dev_priv->agp_heap );
740 void i915_driver_register_fns(drm_device_t *dev)
742 dev->driver_features = DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED;
743 dev->fn_tbl.pretakedown = i915_driver_pretakedown;
744 dev->fn_tbl.prerelease = i915_driver_prerelease;
745 dev->fn_tbl.irq_preinstall = i915_driver_irq_preinstall;
746 dev->fn_tbl.irq_postinstall = i915_driver_irq_postinstall;
747 dev->fn_tbl.irq_uninstall = i915_driver_irq_uninstall;
748 dev->fn_tbl.irq_handler = i915_driver_irq_handler;
751 dev->types[6] = _DRM_STAT_IRQ;
752 dev->types[7] = _DRM_STAT_PRIMARY;
753 dev->types[8] = _DRM_STAT_SECONDARY;
754 dev->types[9] = _DRM_STAT_DMA;