1ee780e1b35369b40e208a33799c38da10355b5c
[linux-2.6.git] / drivers / ide / ide-iops.c
1 /*
2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
3  *
4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
6  *
7  */
8
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/string.h>
13 #include <linux/kernel.h>
14 #include <linux/timer.h>
15 #include <linux/mm.h>
16 #include <linux/interrupt.h>
17 #include <linux/major.h>
18 #include <linux/errno.h>
19 #include <linux/genhd.h>
20 #include <linux/blkpg.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/delay.h>
24 #include <linux/hdreg.h>
25 #include <linux/ide.h>
26
27 #include <asm/byteorder.h>
28 #include <asm/irq.h>
29 #include <asm/uaccess.h>
30 #include <asm/io.h>
31 #include <asm/bitops.h>
32
33 /*
34  *      Conventional PIO operations for ATA devices
35  */
36
37 static u8 ide_inb (unsigned long port)
38 {
39         return (u8) inb(port);
40 }
41
42 static u16 ide_inw (unsigned long port)
43 {
44         return (u16) inw(port);
45 }
46
47 static void ide_insw (unsigned long port, void *addr, u32 count)
48 {
49         insw(port, addr, count);
50 }
51
52 static u32 ide_inl (unsigned long port)
53 {
54         return (u32) inl(port);
55 }
56
57 static void ide_insl (unsigned long port, void *addr, u32 count)
58 {
59         insl(port, addr, count);
60 }
61
62 static void ide_outb (u8 val, unsigned long port)
63 {
64         outb(val, port);
65 }
66
67 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
68 {
69         outb(addr, port);
70 }
71
72 static void ide_outw (u16 val, unsigned long port)
73 {
74         outw(val, port);
75 }
76
77 static void ide_outsw (unsigned long port, void *addr, u32 count)
78 {
79         outsw(port, addr, count);
80 }
81
82 static void ide_outl (u32 val, unsigned long port)
83 {
84         outl(val, port);
85 }
86
87 static void ide_outsl (unsigned long port, void *addr, u32 count)
88 {
89         outsl(port, addr, count);
90 }
91
92 void default_hwif_iops (ide_hwif_t *hwif)
93 {
94         hwif->OUTB      = ide_outb;
95         hwif->OUTBSYNC  = ide_outbsync;
96         hwif->OUTW      = ide_outw;
97         hwif->OUTL      = ide_outl;
98         hwif->OUTSW     = ide_outsw;
99         hwif->OUTSL     = ide_outsl;
100         hwif->INB       = ide_inb;
101         hwif->INW       = ide_inw;
102         hwif->INL       = ide_inl;
103         hwif->INSW      = ide_insw;
104         hwif->INSL      = ide_insl;
105 }
106
107 EXPORT_SYMBOL(default_hwif_iops);
108
109 /*
110  *      Interface removed
111  */
112
113 static u8 ide_no_inb(unsigned long port)
114 {
115         return 0xFF;
116 }
117
118 static u16 ide_no_inw (unsigned long port)
119 {
120         return 0xFFFF;
121 }
122
123 static void ide_no_insw (unsigned long port, void *addr, u32 count)
124 {
125 }
126
127 static u32 ide_no_inl (unsigned long port)
128 {
129         return 0xFFFFFFFF;
130 }
131
132 static void ide_no_insl (unsigned long port, void *addr, u32 count)
133 {
134 }
135
136 static void ide_no_outb (u8 val, unsigned long port)
137 {
138 }
139
140 static void ide_no_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
141 {
142 }
143
144 static void ide_no_outw (u16 val, unsigned long port)
145 {
146 }
147
148 static void ide_no_outsw (unsigned long port, void *addr, u32 count)
149 {
150 }
151
152 static void ide_no_outl (u32 val, unsigned long port)
153 {
154 }
155
156 static void ide_no_outsl (unsigned long port, void *addr, u32 count)
157 {
158 }
159
160 void removed_hwif_iops (ide_hwif_t *hwif)
161 {
162         hwif->OUTB      = ide_no_outb;
163         hwif->OUTBSYNC  = ide_no_outbsync;
164         hwif->OUTW      = ide_no_outw;
165         hwif->OUTL      = ide_no_outl;
166         hwif->OUTSW     = ide_no_outsw;
167         hwif->OUTSL     = ide_no_outsl;
168         hwif->INB       = ide_no_inb;
169         hwif->INW       = ide_no_inw;
170         hwif->INL       = ide_no_inl;
171         hwif->INSW      = ide_no_insw;
172         hwif->INSL      = ide_no_insl;
173 }
174
175 EXPORT_SYMBOL(removed_hwif_iops);
176
177 /*
178  *      MMIO operations, typically used for SATA controllers
179  */
180
181 static u8 ide_mm_inb (unsigned long port)
182 {
183         return (u8) readb((void __iomem *) port);
184 }
185
186 static u16 ide_mm_inw (unsigned long port)
187 {
188         return (u16) readw((void __iomem *) port);
189 }
190
191 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
192 {
193         __ide_mm_insw((void __iomem *) port, addr, count);
194 }
195
196 static u32 ide_mm_inl (unsigned long port)
197 {
198         return (u32) readl((void __iomem *) port);
199 }
200
201 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
202 {
203         __ide_mm_insl((void __iomem *) port, addr, count);
204 }
205
206 static void ide_mm_outb (u8 value, unsigned long port)
207 {
208         writeb(value, (void __iomem *) port);
209 }
210
211 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
212 {
213         writeb(value, (void __iomem *) port);
214 }
215
216 static void ide_mm_outw (u16 value, unsigned long port)
217 {
218         writew(value, (void __iomem *) port);
219 }
220
221 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
222 {
223         __ide_mm_outsw((void __iomem *) port, addr, count);
224 }
225
226 static void ide_mm_outl (u32 value, unsigned long port)
227 {
228         writel(value, (void __iomem *) port);
229 }
230
231 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
232 {
233         __ide_mm_outsl((void __iomem *) port, addr, count);
234 }
235
236 void default_hwif_mmiops (ide_hwif_t *hwif)
237 {
238         hwif->OUTB      = ide_mm_outb;
239         /* Most systems will need to override OUTBSYNC, alas however
240            this one is controller specific! */
241         hwif->OUTBSYNC  = ide_mm_outbsync;
242         hwif->OUTW      = ide_mm_outw;
243         hwif->OUTL      = ide_mm_outl;
244         hwif->OUTSW     = ide_mm_outsw;
245         hwif->OUTSL     = ide_mm_outsl;
246         hwif->INB       = ide_mm_inb;
247         hwif->INW       = ide_mm_inw;
248         hwif->INL       = ide_mm_inl;
249         hwif->INSW      = ide_mm_insw;
250         hwif->INSL      = ide_mm_insl;
251 }
252
253 EXPORT_SYMBOL(default_hwif_mmiops);
254
255 void default_hwif_transport (ide_hwif_t *hwif)
256 {
257         hwif->ata_input_data            = ata_input_data;
258         hwif->ata_output_data           = ata_output_data;
259         hwif->atapi_input_bytes         = atapi_input_bytes;
260         hwif->atapi_output_bytes        = atapi_output_bytes;
261 }
262
263 EXPORT_SYMBOL(default_hwif_transport);
264
265 u32 ide_read_24 (ide_drive_t *drive)
266 {
267         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
268         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
269         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
270         return (hcyl<<16)|(lcyl<<8)|sect;
271 }
272
273 EXPORT_SYMBOL(ide_read_24);
274
275 void SELECT_DRIVE (ide_drive_t *drive)
276 {
277         if (HWIF(drive)->selectproc)
278                 HWIF(drive)->selectproc(drive);
279         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
280 }
281
282 EXPORT_SYMBOL(SELECT_DRIVE);
283
284 void SELECT_INTERRUPT (ide_drive_t *drive)
285 {
286         if (HWIF(drive)->intrproc)
287                 HWIF(drive)->intrproc(drive);
288         else
289                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
290 }
291
292 void SELECT_MASK (ide_drive_t *drive, int mask)
293 {
294         if (HWIF(drive)->maskproc)
295                 HWIF(drive)->maskproc(drive, mask);
296 }
297
298 void QUIRK_LIST (ide_drive_t *drive)
299 {
300         if (HWIF(drive)->quirkproc)
301                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
302 }
303
304 /*
305  * Some localbus EIDE interfaces require a special access sequence
306  * when using 32-bit I/O instructions to transfer data.  We call this
307  * the "vlb_sync" sequence, which consists of three successive reads
308  * of the sector count register location, with interrupts disabled
309  * to ensure that the reads all happen together.
310  */
311 void ata_vlb_sync (ide_drive_t *drive, unsigned long port)
312 {
313         (void) HWIF(drive)->INB(port);
314         (void) HWIF(drive)->INB(port);
315         (void) HWIF(drive)->INB(port);
316 }
317
318 /*
319  * This is used for most PIO data transfers *from* the IDE interface
320  */
321 void ata_input_data (ide_drive_t *drive, void *buffer, u32 wcount)
322 {
323         ide_hwif_t *hwif        = HWIF(drive);
324         u8 io_32bit             = drive->io_32bit;
325
326         if (io_32bit) {
327                 if (io_32bit & 2) {
328                         unsigned long flags;
329                         local_irq_save(flags);
330                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
331                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
332                         local_irq_restore(flags);
333                 } else
334                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
335         } else {
336                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
337         }
338 }
339
340 /*
341  * This is used for most PIO data transfers *to* the IDE interface
342  */
343 void ata_output_data (ide_drive_t *drive, void *buffer, u32 wcount)
344 {
345         ide_hwif_t *hwif        = HWIF(drive);
346         u8 io_32bit             = drive->io_32bit;
347
348         if (io_32bit) {
349                 if (io_32bit & 2) {
350                         unsigned long flags;
351                         local_irq_save(flags);
352                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
353                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
354                         local_irq_restore(flags);
355                 } else
356                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
357         } else {
358                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
359         }
360 }
361
362 /*
363  * The following routines are mainly used by the ATAPI drivers.
364  *
365  * These routines will round up any request for an odd number of bytes,
366  * so if an odd bytecount is specified, be sure that there's at least one
367  * extra byte allocated for the buffer.
368  */
369
370 void atapi_input_bytes (ide_drive_t *drive, void *buffer, u32 bytecount)
371 {
372         ide_hwif_t *hwif = HWIF(drive);
373
374         ++bytecount;
375 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
376         if (MACH_IS_ATARI || MACH_IS_Q40) {
377                 /* Atari has a byte-swapped IDE interface */
378                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
379                 return;
380         }
381 #endif /* CONFIG_ATARI || CONFIG_Q40 */
382         hwif->ata_input_data(drive, buffer, bytecount / 4);
383         if ((bytecount & 0x03) >= 2)
384                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
385 }
386
387 EXPORT_SYMBOL(atapi_input_bytes);
388
389 void atapi_output_bytes (ide_drive_t *drive, void *buffer, u32 bytecount)
390 {
391         ide_hwif_t *hwif = HWIF(drive);
392
393         ++bytecount;
394 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
395         if (MACH_IS_ATARI || MACH_IS_Q40) {
396                 /* Atari has a byte-swapped IDE interface */
397                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
398                 return;
399         }
400 #endif /* CONFIG_ATARI || CONFIG_Q40 */
401         hwif->ata_output_data(drive, buffer, bytecount / 4);
402         if ((bytecount & 0x03) >= 2)
403                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
404 }
405
406 EXPORT_SYMBOL(atapi_output_bytes);
407
408 /*
409  * Beginning of Taskfile OPCODE Library and feature sets.
410  */
411 void ide_fix_driveid (struct hd_driveid *id)
412 {
413 #ifndef __LITTLE_ENDIAN
414 # ifdef __BIG_ENDIAN
415         int i;
416         u16 *stringcast;
417
418         id->config         = __le16_to_cpu(id->config);
419         id->cyls           = __le16_to_cpu(id->cyls);
420         id->reserved2      = __le16_to_cpu(id->reserved2);
421         id->heads          = __le16_to_cpu(id->heads);
422         id->track_bytes    = __le16_to_cpu(id->track_bytes);
423         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
424         id->sectors        = __le16_to_cpu(id->sectors);
425         id->vendor0        = __le16_to_cpu(id->vendor0);
426         id->vendor1        = __le16_to_cpu(id->vendor1);
427         id->vendor2        = __le16_to_cpu(id->vendor2);
428         stringcast = (u16 *)&id->serial_no[0];
429         for (i = 0; i < (20/2); i++)
430                 stringcast[i] = __le16_to_cpu(stringcast[i]);
431         id->buf_type       = __le16_to_cpu(id->buf_type);
432         id->buf_size       = __le16_to_cpu(id->buf_size);
433         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
434         stringcast = (u16 *)&id->fw_rev[0];
435         for (i = 0; i < (8/2); i++)
436                 stringcast[i] = __le16_to_cpu(stringcast[i]);
437         stringcast = (u16 *)&id->model[0];
438         for (i = 0; i < (40/2); i++)
439                 stringcast[i] = __le16_to_cpu(stringcast[i]);
440         id->dword_io       = __le16_to_cpu(id->dword_io);
441         id->reserved50     = __le16_to_cpu(id->reserved50);
442         id->field_valid    = __le16_to_cpu(id->field_valid);
443         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
444         id->cur_heads      = __le16_to_cpu(id->cur_heads);
445         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
446         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
447         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
448         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
449         id->dma_1word      = __le16_to_cpu(id->dma_1word);
450         id->dma_mword      = __le16_to_cpu(id->dma_mword);
451         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
452         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
453         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
454         id->eide_pio       = __le16_to_cpu(id->eide_pio);
455         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
456         for (i = 0; i < 2; ++i)
457                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
458         for (i = 0; i < 4; ++i)
459                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
460         id->queue_depth    = __le16_to_cpu(id->queue_depth);
461         for (i = 0; i < 4; ++i)
462                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
463         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
464         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
465         id->command_set_1  = __le16_to_cpu(id->command_set_1);
466         id->command_set_2  = __le16_to_cpu(id->command_set_2);
467         id->cfsse          = __le16_to_cpu(id->cfsse);
468         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
469         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
470         id->csf_default    = __le16_to_cpu(id->csf_default);
471         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
472         id->trseuc         = __le16_to_cpu(id->trseuc);
473         id->trsEuc         = __le16_to_cpu(id->trsEuc);
474         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
475         id->mprc           = __le16_to_cpu(id->mprc);
476         id->hw_config      = __le16_to_cpu(id->hw_config);
477         id->acoustic       = __le16_to_cpu(id->acoustic);
478         id->msrqs          = __le16_to_cpu(id->msrqs);
479         id->sxfert         = __le16_to_cpu(id->sxfert);
480         id->sal            = __le16_to_cpu(id->sal);
481         id->spg            = __le32_to_cpu(id->spg);
482         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
483         for (i = 0; i < 22; i++)
484                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
485         id->last_lun       = __le16_to_cpu(id->last_lun);
486         id->word127        = __le16_to_cpu(id->word127);
487         id->dlf            = __le16_to_cpu(id->dlf);
488         id->csfo           = __le16_to_cpu(id->csfo);
489         for (i = 0; i < 26; i++)
490                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
491         id->word156        = __le16_to_cpu(id->word156);
492         for (i = 0; i < 3; i++)
493                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
494         id->cfa_power      = __le16_to_cpu(id->cfa_power);
495         for (i = 0; i < 14; i++)
496                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
497         for (i = 0; i < 31; i++)
498                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
499         for (i = 0; i < 48; i++)
500                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
501         id->integrity_word  = __le16_to_cpu(id->integrity_word);
502 # else
503 #  error "Please fix <asm/byteorder.h>"
504 # endif
505 #endif
506 }
507
508 EXPORT_SYMBOL(ide_fix_driveid);
509
510 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
511 {
512         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
513
514         if (byteswap) {
515                 /* convert from big-endian to host byte order */
516                 for (p = end ; p != s;) {
517                         unsigned short *pp = (unsigned short *) (p -= 2);
518                         *pp = ntohs(*pp);
519                 }
520         }
521         /* strip leading blanks */
522         while (s != end && *s == ' ')
523                 ++s;
524         /* compress internal blanks and strip trailing blanks */
525         while (s != end && *s) {
526                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
527                         *p++ = *(s-1);
528         }
529         /* wipe out trailing garbage */
530         while (p != end)
531                 *p++ = '\0';
532 }
533
534 EXPORT_SYMBOL(ide_fixstring);
535
536 /*
537  * Needed for PCI irq sharing
538  */
539 int drive_is_ready (ide_drive_t *drive)
540 {
541         ide_hwif_t *hwif        = HWIF(drive);
542         u8 stat                 = 0;
543
544         if (drive->waiting_for_dma)
545                 return hwif->ide_dma_test_irq(drive);
546
547 #if 0
548         /* need to guarantee 400ns since last command was issued */
549         udelay(1);
550 #endif
551
552 #ifdef CONFIG_IDEPCI_SHARE_IRQ
553         /*
554          * We do a passive status test under shared PCI interrupts on
555          * cards that truly share the ATA side interrupt, but may also share
556          * an interrupt with another pci card/device.  We make no assumptions
557          * about possible isa-pnp and pci-pnp issues yet.
558          */
559         if (IDE_CONTROL_REG)
560                 stat = hwif->INB(IDE_ALTSTATUS_REG);
561         else
562 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
563                 /* Note: this may clear a pending IRQ!! */
564                 stat = hwif->INB(IDE_STATUS_REG);
565
566         if (stat & BUSY_STAT)
567                 /* drive busy:  definitely not interrupting */
568                 return 0;
569
570         /* drive ready: *might* be interrupting */
571         return 1;
572 }
573
574 EXPORT_SYMBOL(drive_is_ready);
575
576 /*
577  * Global for All, and taken from ide-pmac.c. Can be called
578  * with spinlock held & IRQs disabled, so don't schedule !
579  */
580 int wait_for_ready (ide_drive_t *drive, int timeout)
581 {
582         ide_hwif_t *hwif        = HWIF(drive);
583         u8 stat                 = 0;
584
585         while(--timeout) {
586                 stat = hwif->INB(IDE_STATUS_REG);
587                 if (!(stat & BUSY_STAT)) {
588                         if (drive->ready_stat == 0)
589                                 break;
590                         else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
591                                 break;
592                 }
593                 mdelay(1);
594         }
595         if ((stat & ERR_STAT) || timeout <= 0) {
596                 if (stat & ERR_STAT) {
597                         printk(KERN_ERR "%s: wait_for_ready, "
598                                 "error status: %x\n", drive->name, stat);
599                 }
600                 return 1;
601         }
602         return 0;
603 }
604
605 EXPORT_SYMBOL(wait_for_ready);
606
607 /*
608  * This routine busy-waits for the drive status to be not "busy".
609  * It then checks the status for all of the "good" bits and none
610  * of the "bad" bits, and if all is okay it returns 0.  All other
611  * cases return 1 after invoking ide_error() -- caller should just return.
612  *
613  * This routine should get fixed to not hog the cpu during extra long waits..
614  * That could be done by busy-waiting for the first jiffy or two, and then
615  * setting a timer to wake up at half second intervals thereafter,
616  * until timeout is achieved, before timing out.
617  */
618 int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
619 {
620         ide_hwif_t *hwif = HWIF(drive);
621         u8 stat;
622         int i;
623         unsigned long flags;
624  
625         /* bail early if we've exceeded max_failures */
626         if (drive->max_failures && (drive->failures > drive->max_failures)) {
627                 *startstop = ide_stopped;
628                 return 1;
629         }
630
631         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
632         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
633                 local_irq_set(flags);
634                 timeout += jiffies;
635                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
636                         if (time_after(jiffies, timeout)) {
637                                 /*
638                                  * One last read after the timeout in case
639                                  * heavy interrupt load made us not make any
640                                  * progress during the timeout..
641                                  */
642                                 stat = hwif->INB(IDE_STATUS_REG);
643                                 if (!(stat & BUSY_STAT))
644                                         break;
645
646                                 local_irq_restore(flags);
647                                 *startstop = DRIVER(drive)->error(drive, "status timeout", stat);
648                                 return 1;
649                         }
650                 }
651                 local_irq_restore(flags);
652         }
653         /*
654          * Allow status to settle, then read it again.
655          * A few rare drives vastly violate the 400ns spec here,
656          * so we'll wait up to 10usec for a "good" status
657          * rather than expensively fail things immediately.
658          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
659          */
660         for (i = 0; i < 10; i++) {
661                 udelay(1);
662                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
663                         return 0;
664         }
665         *startstop = DRIVER(drive)->error(drive, "status error", stat);
666         return 1;
667 }
668
669 EXPORT_SYMBOL(ide_wait_stat);
670
671 /*
672  *  All hosts that use the 80c ribbon must use!
673  *  The name is derived from upper byte of word 93 and the 80c ribbon.
674  */
675 u8 eighty_ninty_three (ide_drive_t *drive)
676 {
677 #if 0
678         if (!HWIF(drive)->udma_four)
679                 return 0;
680
681         if (drive->id->major_rev_num) {
682                 int hssbd = 0;
683                 int i;
684                 /*
685                  * Determine highest Supported SPEC
686                  */
687                 for (i=1; i<=15; i++)
688                         if (drive->id->major_rev_num & (1<<i))
689                                 hssbd++;
690
691                 switch (hssbd) {
692                         case 7:
693                         case 6:
694                         case 5:
695                 /* ATA-4 and older do not support above Ultra 33 */
696                         default:
697                                 return 0;
698                 }
699         }
700
701         return ((u8) (
702 #ifndef CONFIG_IDEDMA_IVB
703                 (drive->id->hw_config & 0x4000) &&
704 #endif /* CONFIG_IDEDMA_IVB */
705                  (drive->id->hw_config & 0x6000)) ? 1 : 0);
706
707 #else
708
709         return ((u8) ((HWIF(drive)->udma_four) &&
710 #ifndef CONFIG_IDEDMA_IVB
711                         (drive->id->hw_config & 0x4000) &&
712 #endif /* CONFIG_IDEDMA_IVB */
713                         (drive->id->hw_config & 0x6000)) ? 1 : 0);
714 #endif
715 }
716
717 EXPORT_SYMBOL(eighty_ninty_three);
718
719 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
720 {
721         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
722             (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
723             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
724 #ifndef CONFIG_IDEDMA_IVB
725                 if ((drive->id->hw_config & 0x6000) == 0) {
726 #else /* !CONFIG_IDEDMA_IVB */
727                 if (((drive->id->hw_config & 0x2000) == 0) ||
728                     ((drive->id->hw_config & 0x4000) == 0)) {
729 #endif /* CONFIG_IDEDMA_IVB */
730                         printk("%s: Speed warnings UDMA 3/4/5 is not "
731                                 "functional.\n", drive->name);
732                         return 1;
733                 }
734                 if (!HWIF(drive)->udma_four) {
735                         printk("%s: Speed warnings UDMA 3/4/5 is not "
736                                 "functional.\n",
737                                 HWIF(drive)->name);
738                         return 1;
739                 }
740         }
741         return 0;
742 }
743
744 EXPORT_SYMBOL(ide_ata66_check);
745
746 /*
747  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
748  * 1 : Safe to update drive->id DMA registers.
749  * 0 : OOPs not allowed.
750  */
751 int set_transfer (ide_drive_t *drive, ide_task_t *args)
752 {
753         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
754             (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
755             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
756             (drive->id->dma_ultra ||
757              drive->id->dma_mword ||
758              drive->id->dma_1word))
759                 return 1;
760
761         return 0;
762 }
763
764 EXPORT_SYMBOL(set_transfer);
765
766 u8 ide_auto_reduce_xfer (ide_drive_t *drive)
767 {
768         if (!drive->crc_count)
769                 return drive->current_speed;
770         drive->crc_count = 0;
771
772         switch(drive->current_speed) {
773                 case XFER_UDMA_7:       return XFER_UDMA_6;
774                 case XFER_UDMA_6:       return XFER_UDMA_5;
775                 case XFER_UDMA_5:       return XFER_UDMA_4;
776                 case XFER_UDMA_4:       return XFER_UDMA_3;
777                 case XFER_UDMA_3:       return XFER_UDMA_2;
778                 case XFER_UDMA_2:       return XFER_UDMA_1;
779                 case XFER_UDMA_1:       return XFER_UDMA_0;
780                         /*
781                          * OOPS we do not goto non Ultra DMA modes
782                          * without iCRC's available we force
783                          * the system to PIO and make the user
784                          * invoke the ATA-1 ATA-2 DMA modes.
785                          */
786                 case XFER_UDMA_0:
787                 default:                return XFER_PIO_4;
788         }
789 }
790
791 EXPORT_SYMBOL(ide_auto_reduce_xfer);
792
793 /*
794  * Update the 
795  */
796 int ide_driveid_update (ide_drive_t *drive)
797 {
798         ide_hwif_t *hwif        = HWIF(drive);
799         struct hd_driveid *id;
800 #if 0
801         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
802         if (!id)
803                 return 0;
804
805         taskfile_lib_get_identify(drive, (char *)&id);
806
807         ide_fix_driveid(id);
808         if (id) {
809                 drive->id->dma_ultra = id->dma_ultra;
810                 drive->id->dma_mword = id->dma_mword;
811                 drive->id->dma_1word = id->dma_1word;
812                 /* anything more ? */
813                 kfree(id);
814         }
815         return 1;
816 #else
817         /*
818          * Re-read drive->id for possible DMA mode
819          * change (copied from ide-probe.c)
820          */
821         unsigned long timeout, flags;
822
823         SELECT_MASK(drive, 1);
824         if (IDE_CONTROL_REG)
825                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
826         msleep(50);
827         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
828         timeout = jiffies + WAIT_WORSTCASE;
829         do {
830                 if (time_after(jiffies, timeout)) {
831                         SELECT_MASK(drive, 0);
832                         return 0;       /* drive timed-out */
833                 }
834                 msleep(50);     /* give drive a breather */
835         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
836         msleep(50);     /* wait for IRQ and DRQ_STAT */
837         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
838                 SELECT_MASK(drive, 0);
839                 printk("%s: CHECK for good STATUS\n", drive->name);
840                 return 0;
841         }
842         local_irq_save(flags);
843         SELECT_MASK(drive, 0);
844         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
845         if (!id) {
846                 local_irq_restore(flags);
847                 return 0;
848         }
849         ata_input_data(drive, id, SECTOR_WORDS);
850         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
851         local_irq_enable();
852         local_irq_restore(flags);
853         ide_fix_driveid(id);
854         if (id) {
855                 drive->id->dma_ultra = id->dma_ultra;
856                 drive->id->dma_mword = id->dma_mword;
857                 drive->id->dma_1word = id->dma_1word;
858                 /* anything more ? */
859                 kfree(id);
860         }
861
862         return 1;
863 #endif
864 }
865
866 EXPORT_SYMBOL(ide_driveid_update);
867
868 /*
869  * Similar to ide_wait_stat(), except it never calls ide_error internally.
870  * This is a kludge to handle the new ide_config_drive_speed() function,
871  * and should not otherwise be used anywhere.  Eventually, the tuneproc's
872  * should be updated to return ide_startstop_t, in which case we can get
873  * rid of this abomination again.  :)   -ml
874  *
875  * It is gone..........
876  *
877  * const char *msg == consider adding for verbose errors.
878  */
879 int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
880 {
881         ide_hwif_t *hwif        = HWIF(drive);
882         int     i, error        = 1;
883         u8 stat;
884
885 //      while (HWGROUP(drive)->busy)
886 //              msleep(50);
887
888 #ifdef CONFIG_BLK_DEV_IDEDMA
889         if (hwif->ide_dma_check)         /* check if host supports DMA */
890                 hwif->ide_dma_host_off(drive);
891 #endif
892
893         /*
894          * Don't use ide_wait_cmd here - it will
895          * attempt to set_geometry and recalibrate,
896          * but for some reason these don't work at
897          * this point (lost interrupt).
898          */
899         /*
900          * Select the drive, and issue the SETFEATURES command
901          */
902         disable_irq_nosync(hwif->irq);
903         
904         /*
905          *      FIXME: we race against the running IRQ here if
906          *      this is called from non IRQ context. If we use
907          *      disable_irq() we hang on the error path. Work
908          *      is needed.
909          */
910          
911         udelay(1);
912         SELECT_DRIVE(drive);
913         SELECT_MASK(drive, 0);
914         udelay(1);
915         if (IDE_CONTROL_REG)
916                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
917         hwif->OUTB(speed, IDE_NSECTOR_REG);
918         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
919         hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
920         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
921                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
922         udelay(1);
923         /*
924          * Wait for drive to become non-BUSY
925          */
926         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
927                 unsigned long flags, timeout;
928                 local_irq_set(flags);
929                 timeout = jiffies + WAIT_CMD;
930                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
931                         if (time_after(jiffies, timeout))
932                                 break;
933                 }
934                 local_irq_restore(flags);
935         }
936
937         /*
938          * Allow status to settle, then read it again.
939          * A few rare drives vastly violate the 400ns spec here,
940          * so we'll wait up to 10usec for a "good" status
941          * rather than expensively fail things immediately.
942          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
943          */
944         for (i = 0; i < 10; i++) {
945                 udelay(1);
946                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
947                         error = 0;
948                         break;
949                 }
950         }
951
952         SELECT_MASK(drive, 0);
953
954         enable_irq(hwif->irq);
955
956         if (error) {
957                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
958                 return error;
959         }
960
961         drive->id->dma_ultra &= ~0xFF00;
962         drive->id->dma_mword &= ~0x0F00;
963         drive->id->dma_1word &= ~0x0F00;
964
965 #ifdef CONFIG_BLK_DEV_IDEDMA
966         if (speed >= XFER_SW_DMA_0)
967                 hwif->ide_dma_host_on(drive);
968         else if (hwif->ide_dma_check)   /* check if host supports DMA */
969                 hwif->ide_dma_off_quietly(drive);
970 #endif
971
972         switch(speed) {
973                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
974                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
975                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
976                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
977                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
978                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
979                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
980                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
981                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
982                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
983                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
984                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
985                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
986                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
987                 default: break;
988         }
989         if (!drive->init_speed)
990                 drive->init_speed = speed;
991         drive->current_speed = speed;
992         return error;
993 }
994
995 EXPORT_SYMBOL(ide_config_drive_speed);
996
997
998 /*
999  * This should get invoked any time we exit the driver to
1000  * wait for an interrupt response from a drive.  handler() points
1001  * at the appropriate code to handle the next interrupt, and a
1002  * timer is started to prevent us from waiting forever in case
1003  * something goes wrong (see the ide_timer_expiry() handler later on).
1004  *
1005  * See also ide_execute_command
1006  */
1007 void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
1008                       unsigned int timeout, ide_expiry_t *expiry)
1009 {
1010         ide_hwgroup_t *hwgroup = HWGROUP(drive);
1011
1012         if (hwgroup->handler != NULL) {
1013                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
1014                         "old=%p, new=%p\n",
1015                         drive->name, hwgroup->handler, handler);
1016         }
1017         hwgroup->handler        = handler;
1018         hwgroup->expiry         = expiry;
1019         hwgroup->timer.expires  = jiffies + timeout;
1020         add_timer(&hwgroup->timer);
1021 }
1022
1023 EXPORT_SYMBOL(__ide_set_handler);
1024
1025 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
1026                       unsigned int timeout, ide_expiry_t *expiry)
1027 {
1028         unsigned long flags;
1029         spin_lock_irqsave(&ide_lock, flags);
1030         __ide_set_handler(drive, handler, timeout, expiry);
1031         spin_unlock_irqrestore(&ide_lock, flags);
1032 }
1033
1034 EXPORT_SYMBOL(ide_set_handler);
1035  
1036 /**
1037  *      ide_execute_command     -       execute an IDE command
1038  *      @drive: IDE drive to issue the command against
1039  *      @command: command byte to write
1040  *      @handler: handler for next phase
1041  *      @timeout: timeout for command
1042  *      @expiry:  handler to run on timeout
1043  *
1044  *      Helper function to issue an IDE command. This handles the
1045  *      atomicity requirements, command timing and ensures that the 
1046  *      handler and IRQ setup do not race. All IDE command kick off
1047  *      should go via this function or do equivalent locking.
1048  */
1049  
1050 void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
1051 {
1052         unsigned long flags;
1053         ide_hwgroup_t *hwgroup = HWGROUP(drive);
1054         ide_hwif_t *hwif = HWIF(drive);
1055         
1056         spin_lock_irqsave(&ide_lock, flags);
1057         
1058         if(hwgroup->handler)
1059                 BUG();
1060         hwgroup->handler        = handler;
1061         hwgroup->expiry         = expiry;
1062         hwgroup->timer.expires  = jiffies + timeout;
1063         add_timer(&hwgroup->timer);
1064         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
1065         /* Drive takes 400nS to respond, we must avoid the IRQ being
1066            serviced before that. 
1067            
1068            FIXME: we could skip this delay with care on non shared
1069            devices 
1070         */
1071         ndelay(400);
1072         spin_unlock_irqrestore(&ide_lock, flags);
1073 }
1074
1075 EXPORT_SYMBOL(ide_execute_command);
1076
1077
1078 /* needed below */
1079 static ide_startstop_t do_reset1 (ide_drive_t *, int);
1080
1081 /*
1082  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1083  * during an atapi drive reset operation. If the drive has not yet responded,
1084  * and we have not yet hit our maximum waiting time, then the timer is restarted
1085  * for another 50ms.
1086  */
1087 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
1088 {
1089         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1090         ide_hwif_t *hwif        = HWIF(drive);
1091         u8 stat;
1092
1093         SELECT_DRIVE(drive);
1094         udelay (10);
1095
1096         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1097                 printk("%s: ATAPI reset complete\n", drive->name);
1098         } else {
1099                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1100                         if (HWGROUP(drive)->handler != NULL)
1101                                 BUG();
1102                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1103                         /* continue polling */
1104                         return ide_started;
1105                 }
1106                 /* end of polling */
1107                 hwgroup->poll_timeout = 0;
1108                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
1109                                 drive->name, stat);
1110                 /* do it the old fashioned way */
1111                 return do_reset1(drive, 1);
1112         }
1113         /* done polling */
1114         hwgroup->poll_timeout = 0;
1115         return ide_stopped;
1116 }
1117
1118 /*
1119  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1120  * during an ide reset operation. If the drives have not yet responded,
1121  * and we have not yet hit our maximum waiting time, then the timer is restarted
1122  * for another 50ms.
1123  */
1124 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1125 {
1126         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1127         ide_hwif_t *hwif        = HWIF(drive);
1128         u8 tmp;
1129
1130         if (hwif->reset_poll != NULL) {
1131                 if (hwif->reset_poll(drive)) {
1132                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1133                                 hwif->name, drive->name);
1134                         return ide_stopped;
1135                 }
1136         }
1137
1138         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1139                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1140                         if (HWGROUP(drive)->handler != NULL)
1141                                 BUG();
1142                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1143                         /* continue polling */
1144                         return ide_started;
1145                 }
1146                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1147                 drive->failures++;
1148         } else  {
1149                 printk("%s: reset: ", hwif->name);
1150                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1151                         printk("success\n");
1152                         drive->failures = 0;
1153                 } else {
1154                         drive->failures++;
1155                         printk("master: ");
1156                         switch (tmp & 0x7f) {
1157                                 case 1: printk("passed");
1158                                         break;
1159                                 case 2: printk("formatter device error");
1160                                         break;
1161                                 case 3: printk("sector buffer error");
1162                                         break;
1163                                 case 4: printk("ECC circuitry error");
1164                                         break;
1165                                 case 5: printk("controlling MPU error");
1166                                         break;
1167                                 default:printk("error (0x%02x?)", tmp);
1168                         }
1169                         if (tmp & 0x80)
1170                                 printk("; slave: failed");
1171                         printk("\n");
1172                 }
1173         }
1174         hwgroup->poll_timeout = 0;      /* done polling */
1175         return ide_stopped;
1176 }
1177
1178 static void check_dma_crc(ide_drive_t *drive)
1179 {
1180 #ifdef CONFIG_BLK_DEV_IDEDMA
1181         if (drive->crc_count) {
1182                 (void) HWIF(drive)->ide_dma_off_quietly(drive);
1183                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1184                 if (drive->current_speed >= XFER_SW_DMA_0)
1185                         (void) HWIF(drive)->ide_dma_on(drive);
1186         } else
1187                 (void)__ide_dma_off(drive);
1188 #endif
1189 }
1190
1191 void pre_reset (ide_drive_t *drive)
1192 {
1193         DRIVER(drive)->pre_reset(drive);
1194
1195         if (!drive->keep_settings) {
1196                 if (drive->using_dma) {
1197                         check_dma_crc(drive);
1198                 } else {
1199                         drive->unmask = 0;
1200                         drive->io_32bit = 0;
1201                 }
1202                 return;
1203         }
1204         if (drive->using_dma)
1205                 check_dma_crc(drive);
1206
1207         if (HWIF(drive)->pre_reset != NULL)
1208                 HWIF(drive)->pre_reset(drive);
1209
1210 }
1211
1212 /*
1213  * do_reset1() attempts to recover a confused drive by resetting it.
1214  * Unfortunately, resetting a disk drive actually resets all devices on
1215  * the same interface, so it can really be thought of as resetting the
1216  * interface rather than resetting the drive.
1217  *
1218  * ATAPI devices have their own reset mechanism which allows them to be
1219  * individually reset without clobbering other devices on the same interface.
1220  *
1221  * Unfortunately, the IDE interface does not generate an interrupt to let
1222  * us know when the reset operation has finished, so we must poll for this.
1223  * Equally poor, though, is the fact that this may a very long time to complete,
1224  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1225  * we set a timer to poll at 50ms intervals.
1226  */
1227 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1228 {
1229         unsigned int unit;
1230         unsigned long flags;
1231         ide_hwif_t *hwif;
1232         ide_hwgroup_t *hwgroup;
1233         
1234         spin_lock_irqsave(&ide_lock, flags);
1235         hwif = HWIF(drive);
1236         hwgroup = HWGROUP(drive);
1237
1238         /* We must not reset with running handlers */
1239         if(hwgroup->handler != NULL)
1240                 BUG();
1241
1242         /* For an ATAPI device, first try an ATAPI SRST. */
1243         if (drive->media != ide_disk && !do_not_try_atapi) {
1244                 pre_reset(drive);
1245                 SELECT_DRIVE(drive);
1246                 udelay (20);
1247                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1248                 ndelay(400);
1249                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1250                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1251                 spin_unlock_irqrestore(&ide_lock, flags);
1252                 return ide_started;
1253         }
1254
1255         /*
1256          * First, reset any device state data we were maintaining
1257          * for any of the drives on this interface.
1258          */
1259         for (unit = 0; unit < MAX_DRIVES; ++unit)
1260                 pre_reset(&hwif->drives[unit]);
1261
1262 #if OK_TO_RESET_CONTROLLER
1263         if (!IDE_CONTROL_REG) {
1264                 spin_unlock_irqrestore(&ide_lock, flags);
1265                 return ide_stopped;
1266         }
1267
1268         /*
1269          * Note that we also set nIEN while resetting the device,
1270          * to mask unwanted interrupts from the interface during the reset.
1271          * However, due to the design of PC hardware, this will cause an
1272          * immediate interrupt due to the edge transition it produces.
1273          * This single interrupt gives us a "fast poll" for drives that
1274          * recover from reset very quickly, saving us the first 50ms wait time.
1275          */
1276         /* set SRST and nIEN */
1277         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1278         /* more than enough time */
1279         udelay(10);
1280         if (drive->quirk_list == 2) {
1281                 /* clear SRST and nIEN */
1282                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1283         } else {
1284                 /* clear SRST, leave nIEN */
1285                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1286         }
1287         /* more than enough time */
1288         udelay(10);
1289         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1290         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1291
1292         /*
1293          * Some weird controller like resetting themselves to a strange
1294          * state when the disks are reset this way. At least, the Winbond
1295          * 553 documentation says that
1296          */
1297         if (hwif->resetproc != NULL) {
1298                 hwif->resetproc(drive);
1299         }
1300         
1301 #endif  /* OK_TO_RESET_CONTROLLER */
1302
1303         spin_unlock_irqrestore(&ide_lock, flags);
1304         return ide_started;
1305 }
1306
1307 /*
1308  * ide_do_reset() is the entry point to the drive/interface reset code.
1309  */
1310
1311 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1312 {
1313         return do_reset1(drive, 0);
1314 }
1315
1316 EXPORT_SYMBOL(ide_do_reset);
1317
1318 /*
1319  * ide_wait_not_busy() waits for the currently selected device on the hwif
1320  * to report a non-busy status, see comments in probe_hwif().
1321  */
1322 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1323 {
1324         u8 stat = 0;
1325
1326         while(timeout--) {
1327                 /*
1328                  * Turn this into a schedule() sleep once I'm sure
1329                  * about locking issues (2.5 work ?).
1330                  */
1331                 mdelay(1);
1332                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1333                 if ((stat & BUSY_STAT) == 0)
1334                         return 0;
1335                 /*
1336                  * Assume a value of 0xff means nothing is connected to
1337                  * the interface and it doesn't implement the pull-down
1338                  * resistor on D7.
1339                  */
1340                 if (stat == 0xff)
1341                         return -ENODEV;
1342         }
1343         return -EBUSY;
1344 }
1345
1346 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1347