drivers/media/video/cx88/cx88-dvb.c

   1 /*
   2  *
   3  * device driver for Conexant 2388x based TV cards
   4  * MPEG Transport Stream (DVB) routines
   5  *
   6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
   7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; either version 2 of the License, or
  12  *  (at your option) any later version.
  13  *
  14  *  This program is distributed in the hope that it will be useful,
  15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *  GNU General Public License for more details.
  18  *
  19  *  You should have received a copy of the GNU General Public License
  20  *  along with this program; if not, write to the Free Software
  21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/init.h>
  26 #include <linux/device.h>
  27 #include <linux/fs.h>
  28 #include <linux/kthread.h>
  29 #include <linux/file.h>
  30 #include <linux/suspend.h>
  31
  32 #include "cx88.h"
  33 #include "dvb-pll.h"
  34 #include <media/v4l2-common.h>
  35
  36 #ifdef HAVE_MT352
  37 # include "mt352.h"
  38 # include "mt352_priv.h"
  39 # ifdef HAVE_VP3054_I2C
  40 #  include "cx88-vp3054-i2c.h"
  41 # endif
  42 #endif
  43 #ifdef HAVE_CX22702
  44 # include "cx22702.h"
  45 #endif
  46 #ifdef HAVE_OR51132
  47 # include "or51132.h"
  48 #endif
  49 #ifdef HAVE_LGDT330X
  50 # include "lgdt330x.h"
  51 #endif
  52 #ifdef HAVE_NXT200X
  53 # include "nxt200x.h"
  54 #endif
  55 #ifdef HAVE_CX24123
  56 # include "cx24123.h"
  57 #endif
  58
  59 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  60 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  61 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  62 MODULE_LICENSE("GPL");
  63
  64 static unsigned int debug = 0;
  65 module_param(debug, int, 0644);
  66 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  67
  68 #define dprintk(level,fmt, arg...)      if (debug >= level) \
  69         printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  70
  71 /* ------------------------------------------------------------------ */
  72
  73 static int dvb_buf_setup(struct videobuf_queue *q,
  74                          unsigned int *count, unsigned int *size)
  75 {
  76         struct cx8802_dev *dev = q->priv_data;
  77
  78         dev->ts_packet_size  = 188 * 4;
  79         dev->ts_packet_count = 32;
  80
  81         *size  = dev->ts_packet_size * dev->ts_packet_count;
  82         *count = 32;
  83         return 0;
  84 }
  85
  86 static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  87                            enum v4l2_field field)
  88 {
  89         struct cx8802_dev *dev = q->priv_data;
  90         return cx8802_buf_prepare(dev, (struct cx88_buffer*)vb,field);
  91 }
  92
  93 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  94 {
  95         struct cx8802_dev *dev = q->priv_data;
  96         cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  97 }
  98
  99 static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
 100 {
 101         struct cx8802_dev *dev = q->priv_data;
 102         cx88_free_buffer(dev->pci, (struct cx88_buffer*)vb);
 103 }
 104
 105 static struct videobuf_queue_ops dvb_qops = {
 106         .buf_setup    = dvb_buf_setup,
 107         .buf_prepare  = dvb_buf_prepare,
 108         .buf_queue    = dvb_buf_queue,
 109         .buf_release  = dvb_buf_release,
 110 };
 111
 112 /* ------------------------------------------------------------------ */
 113
 114 #ifdef HAVE_MT352
 115 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
 116 {
 117         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
 118         static u8 reset []         = { RESET,      0x80 };
 119         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
 120         static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
 121         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
 122         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
 123
 124         mt352_write(fe, clock_config,   sizeof(clock_config));
 125         udelay(200);
 126         mt352_write(fe, reset,          sizeof(reset));
 127         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
 128
 129         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
 130         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
 131         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
 132         return 0;
 133 }
 134
 135 static int dvico_dual_demod_init(struct dvb_frontend *fe)
 136 {
 137         static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
 138         static u8 reset []         = { RESET,      0x80 };
 139         static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
 140         static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
 141         static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
 142         static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
 143
 144         mt352_write(fe, clock_config,   sizeof(clock_config));
 145         udelay(200);
 146         mt352_write(fe, reset,          sizeof(reset));
 147         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
 148
 149         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
 150         mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
 151         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
 152
 153         return 0;
 154 }
 155
 156 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
 157 {
 158         static u8 clock_config []  = { 0x89, 0x38, 0x39 };
 159         static u8 reset []         = { 0x50, 0x80 };
 160         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
 161         static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
 162                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
 163         static u8 dntv_extra[]     = { 0xB5, 0x7A };
 164         static u8 capt_range_cfg[] = { 0x75, 0x32 };
 165
 166         mt352_write(fe, clock_config,   sizeof(clock_config));
 167         udelay(2000);
 168         mt352_write(fe, reset,          sizeof(reset));
 169         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
 170
 171         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
 172         udelay(2000);
 173         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
 174         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
 175
 176         return 0;
 177 }
 178
 179 static int mt352_pll_set(struct dvb_frontend* fe,
 180                          struct dvb_frontend_parameters* params,
 181                          u8* pllbuf)
 182 {
 183         struct cx8802_dev *dev= fe->dvb->priv;
 184
 185         pllbuf[0] = dev->core->pll_addr << 1;
 186         dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
 187                           params->frequency,
 188                           params->u.ofdm.bandwidth);
 189         return 0;
 190 }
 191
 192 static struct mt352_config dvico_fusionhdtv = {
 193         .demod_address = 0x0F,
 194         .demod_init    = dvico_fusionhdtv_demod_init,
 195         .pll_set       = mt352_pll_set,
 196 };
 197
 198 static struct mt352_config dntv_live_dvbt_config = {
 199         .demod_address = 0x0f,
 200         .demod_init    = dntv_live_dvbt_demod_init,
 201         .pll_set       = mt352_pll_set,
 202 };
 203
 204 static struct mt352_config dvico_fusionhdtv_dual = {
 205         .demod_address = 0x0F,
 206         .demod_init    = dvico_dual_demod_init,
 207         .pll_set       = mt352_pll_set,
 208 };
 209
 210 #ifdef HAVE_VP3054_I2C
 211 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
 212 {
 213         static u8 clock_config []  = { 0x89, 0x38, 0x38 };
 214         static u8 reset []         = { 0x50, 0x80 };
 215         static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
 216         static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
 217                                        0x00, 0xFF, 0x00, 0x40, 0x40 };
 218         static u8 dntv_extra[]     = { 0xB5, 0x7A };
 219         static u8 capt_range_cfg[] = { 0x75, 0x32 };
 220
 221         mt352_write(fe, clock_config,   sizeof(clock_config));
 222         udelay(2000);
 223         mt352_write(fe, reset,          sizeof(reset));
 224         mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
 225
 226         mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
 227         udelay(2000);
 228         mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
 229         mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
 230
 231         return 0;
 232 }
 233
 234 static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
 235 {
 236         struct cx8802_dev *dev= fe->dvb->priv;
 237
 238         /* this message is to set up ATC and ALC */
 239         static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
 240         struct i2c_msg msg =
 241                 { .addr = dev->core->pll_addr, .flags = 0,
 242                   .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
 243         int err;
 244
 245         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
 246                 if (err < 0)
 247                         return err;
 248                 else
 249                         return -EREMOTEIO;
 250         }
 251
 252         return 0;
 253 }
 254
 255 static int dntv_live_dvbt_pro_pll_set(struct dvb_frontend* fe,
 256                                       struct dvb_frontend_parameters* params,
 257                                       u8* pllbuf)
 258 {
 259         struct cx8802_dev *dev= fe->dvb->priv;
 260         struct i2c_msg msg =
 261                 { .addr = dev->core->pll_addr, .flags = 0,
 262                   .buf = pllbuf+1, .len = 4 };
 263         int err;
 264
 265         /* Switch PLL to DVB mode */
 266         err = philips_fmd1216_pll_init(fe);
 267         if (err)
 268                 return err;
 269
 270         /* Tune PLL */
 271         pllbuf[0] = dev->core->pll_addr << 1;
 272         dvb_pll_configure(dev->core->pll_desc, pllbuf+1,
 273                           params->frequency,
 274                           params->u.ofdm.bandwidth);
 275         if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
 276                 printk(KERN_WARNING "cx88-dvb: %s error "
 277                            "(addr %02x <- %02x, err = %i)\n",
 278                            __FUNCTION__, pllbuf[0], pllbuf[1], err);
 279                 if (err < 0)
 280                         return err;
 281                 else
 282                         return -EREMOTEIO;
 283         }
 284
 285         return 0;
 286 }
 287
 288 static struct mt352_config dntv_live_dvbt_pro_config = {
 289         .demod_address = 0x0f,
 290         .no_tuner      = 1,
 291         .demod_init    = dntv_live_dvbt_pro_demod_init,
 292         .pll_set       = dntv_live_dvbt_pro_pll_set,
 293 };
 294 #endif
 295 #endif
 296
 297 #ifdef HAVE_CX22702
 298 static struct cx22702_config connexant_refboard_config = {
 299         .demod_address = 0x43,
 300         .output_mode   = CX22702_SERIAL_OUTPUT,
 301         .pll_address   = 0x60,
 302         .pll_desc      = &dvb_pll_thomson_dtt7579,
 303 };
 304
 305 static struct cx22702_config hauppauge_novat_config = {
 306         .demod_address = 0x43,
 307         .output_mode   = CX22702_SERIAL_OUTPUT,
 308         .pll_address   = 0x61,
 309         .pll_desc      = &dvb_pll_thomson_dtt759x,
 310 };
 311 static struct cx22702_config hauppauge_hvr1100_config = {
 312         .demod_address = 0x63,
 313         .output_mode   = CX22702_SERIAL_OUTPUT,
 314         .pll_address   = 0x61,
 315         .pll_desc      = &dvb_pll_fmd1216me,
 316 };
 317 #endif
 318
 319 #ifdef HAVE_OR51132
 320 static int or51132_set_ts_param(struct dvb_frontend* fe,
 321                                 int is_punctured)
 322 {
 323         struct cx8802_dev *dev= fe->dvb->priv;
 324         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
 325         return 0;
 326 }
 327
 328 static struct or51132_config pchdtv_hd3000 = {
 329         .demod_address    = 0x15,
 330         .pll_address      = 0x61,
 331         .pll_desc         = &dvb_pll_thomson_dtt7610,
 332         .set_ts_params    = or51132_set_ts_param,
 333 };
 334 #endif
 335
 336 #ifdef HAVE_LGDT330X
 337 static int lgdt330x_pll_set(struct dvb_frontend* fe,
 338                             struct dvb_frontend_parameters* params)
 339 {
 340         /* FIXME make this routine use the tuner-simple code.
 341          * It could probably be shared with a number of ATSC
 342          * frontends. Many share the same tuner with analog TV. */
 343
 344         struct cx8802_dev *dev= fe->dvb->priv;
 345         struct cx88_core *core = dev->core;
 346         u8 buf[4];
 347         struct i2c_msg msg =
 348                 { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
 349         int err;
 350
 351         /* Put the analog decoder in standby to keep it quiet */
 352         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
 353
 354         dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
 355         dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
 356                         __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
 357         if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
 358                 printk(KERN_WARNING "cx88-dvb: %s error "
 359                            "(addr %02x <- %02x, err = %i)\n",
 360                            __FUNCTION__, buf[0], buf[1], err);
 361                 if (err < 0)
 362                         return err;
 363                 else
 364                         return -EREMOTEIO;
 365         }
 366         if (core->tuner_type == TUNER_LG_TDVS_H062F) {
 367                 /* Set the Auxiliary Byte. */
 368                 buf[2] &= ~0x20;
 369                 buf[2] |= 0x18;
 370                 buf[3] = 0x50;
 371                 i2c_transfer(&core->i2c_adap, &msg, 1);
 372         }
 373         return 0;
 374 }
 375
 376 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
 377 {
 378         struct cx8802_dev *dev= fe->dvb->priv;
 379         struct cx88_core *core = dev->core;
 380
 381         dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
 382         if (index == 0)
 383                 cx_clear(MO_GP0_IO, 8);
 384         else
 385                 cx_set(MO_GP0_IO, 8);
 386         return 0;
 387 }
 388
 389 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
 390 {
 391         struct cx8802_dev *dev= fe->dvb->priv;
 392         if (is_punctured)
 393                 dev->ts_gen_cntrl |= 0x04;
 394         else
 395                 dev->ts_gen_cntrl &= ~0x04;
 396         return 0;
 397 }
 398
 399 static struct lgdt330x_config fusionhdtv_3_gold = {
 400         .demod_address    = 0x0e,
 401         .demod_chip       = LGDT3302,
 402         .serial_mpeg      = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
 403         .pll_set          = lgdt330x_pll_set,
 404         .set_ts_params    = lgdt330x_set_ts_param,
 405 };
 406
 407 static struct lgdt330x_config fusionhdtv_5_gold = {
 408         .demod_address    = 0x0e,
 409         .demod_chip       = LGDT3303,
 410         .serial_mpeg      = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
 411         .pll_set          = lgdt330x_pll_set,
 412         .set_ts_params    = lgdt330x_set_ts_param,
 413 };
 414 #endif
 415
 416 #ifdef HAVE_NXT200X
 417 static int nxt200x_set_ts_param(struct dvb_frontend* fe,
 418                                 int is_punctured)
 419 {
 420         struct cx8802_dev *dev= fe->dvb->priv;
 421         dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
 422         return 0;
 423 }
 424
 425 static int nxt200x_set_pll_input(u8* buf, int input)
 426 {
 427         if (input)
 428                 buf[3] |= 0x08;
 429         else
 430                 buf[3] &= ~0x08;
 431         return 0;
 432 }
 433
 434 static struct nxt200x_config ati_hdtvwonder = {
 435         .demod_address    = 0x0a,
 436         .pll_address      = 0x61,
 437         .pll_desc         = &dvb_pll_tuv1236d,
 438         .set_pll_input    = nxt200x_set_pll_input,
 439         .set_ts_params    = nxt200x_set_ts_param,
 440 };
 441 #endif
 442
 443 #ifdef HAVE_CX24123
 444 static int cx24123_set_ts_param(struct dvb_frontend* fe,
 445         int is_punctured)
 446 {
 447         struct cx8802_dev *dev= fe->dvb->priv;
 448         dev->ts_gen_cntrl = 0x2;
 449         return 0;
 450 }
 451
 452 static void cx24123_enable_lnb_voltage(struct dvb_frontend* fe, int on)
 453 {
 454         struct cx8802_dev *dev= fe->dvb->priv;
 455         struct cx88_core *core = dev->core;
 456
 457         if (on)
 458                 cx_write(MO_GP0_IO, 0x000006f9);
 459         else
 460                 cx_write(MO_GP0_IO, 0x000006fB);
 461 }
 462
 463 static struct cx24123_config hauppauge_novas_config = {
 464         .demod_address          = 0x55,
 465         .use_isl6421            = 1,
 466         .set_ts_params          = cx24123_set_ts_param,
 467 };
 468
 469 static struct cx24123_config kworld_dvbs_100_config = {
 470         .demod_address          = 0x15,
 471         .use_isl6421            = 0,
 472         .set_ts_params          = cx24123_set_ts_param,
 473         .enable_lnb_voltage     = cx24123_enable_lnb_voltage,
 474 };
 475 #endif
 476
 477 static int dvb_register(struct cx8802_dev *dev)
 478 {
 479         /* init struct videobuf_dvb */
 480         dev->dvb.name = dev->core->name;
 481         dev->ts_gen_cntrl = 0x0c;
 482
 483         /* init frontend */
 484         switch (dev->core->board) {
 485 #ifdef HAVE_CX22702
 486         case CX88_BOARD_HAUPPAUGE_DVB_T1:
 487                 dev->dvb.frontend = cx22702_attach(&hauppauge_novat_config,
 488                                                    &dev->core->i2c_adap);
 489                 break;
 490         case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
 491         case CX88_BOARD_CONEXANT_DVB_T1:
 492         case CX88_BOARD_KWORLD_DVB_T_CX22702:
 493         case CX88_BOARD_WINFAST_DTV1000:
 494                 dev->dvb.frontend = cx22702_attach(&connexant_refboard_config,
 495                                                    &dev->core->i2c_adap);
 496                 break;
 497         case CX88_BOARD_HAUPPAUGE_HVR1100:
 498         case CX88_BOARD_HAUPPAUGE_HVR1100LP:
 499                 dev->dvb.frontend = cx22702_attach(&hauppauge_hvr1100_config,
 500                                                    &dev->core->i2c_adap);
 501                 break;
 502 #endif
 503 #ifdef HAVE_MT352
 504         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
 505                 dev->core->pll_addr = 0x61;
 506                 dev->core->pll_desc = &dvb_pll_lg_z201;
 507                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
 508                                                  &dev->core->i2c_adap);
 509                 break;
 510         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
 511                 dev->core->pll_addr = 0x60;
 512                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
 513                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv,
 514                                                  &dev->core->i2c_adap);
 515                 break;
 516         case CX88_BOARD_KWORLD_DVB_T:
 517         case CX88_BOARD_DNTV_LIVE_DVB_T:
 518         case CX88_BOARD_ADSTECH_DVB_T_PCI:
 519                 dev->core->pll_addr = 0x61;
 520                 dev->core->pll_desc = &dvb_pll_unknown_1;
 521                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_config,
 522                                                  &dev->core->i2c_adap);
 523                 break;
 524         case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
 525 #ifdef HAVE_VP3054_I2C
 526                 dev->core->pll_addr = 0x61;
 527                 dev->core->pll_desc = &dvb_pll_fmd1216me;
 528                 dev->dvb.frontend = mt352_attach(&dntv_live_dvbt_pro_config,
 529                         &((struct vp3054_i2c_state *)dev->card_priv)->adap);
 530 #else
 531                 printk("%s: built without vp3054 support\n", dev->core->name);
 532 #endif
 533                 break;
 534         case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
 535                 /* The tin box says DEE1601, but it seems to be DTT7579
 536                  * compatible, with a slightly different MT352 AGC gain. */
 537                 dev->core->pll_addr = 0x61;
 538                 dev->core->pll_desc = &dvb_pll_thomson_dtt7579;
 539                 dev->dvb.frontend = mt352_attach(&dvico_fusionhdtv_dual,
 540                                                  &dev->core->i2c_adap);
 541                 break;
 542 #endif
 543 #ifdef HAVE_OR51132
 544         case CX88_BOARD_PCHDTV_HD3000:
 545                 dev->dvb.frontend = or51132_attach(&pchdtv_hd3000,
 546                                                  &dev->core->i2c_adap);
 547                 break;
 548 #endif
 549 #ifdef HAVE_LGDT330X
 550         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
 551                 dev->ts_gen_cntrl = 0x08;
 552                 {
 553                 /* Do a hardware reset of chip before using it. */
 554                 struct cx88_core *core = dev->core;
 555
 556                 cx_clear(MO_GP0_IO, 1);
 557                 mdelay(100);
 558                 cx_set(MO_GP0_IO, 1);
 559                 mdelay(200);
 560
 561                 /* Select RF connector callback */
 562                 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
 563                 dev->core->pll_addr = 0x61;
 564                 dev->core->pll_desc = &dvb_pll_microtune_4042;
 565                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
 566                                                     &dev->core->i2c_adap);
 567                 }
 568                 break;
 569         case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
 570                 dev->ts_gen_cntrl = 0x08;
 571                 {
 572                 /* Do a hardware reset of chip before using it. */
 573                 struct cx88_core *core = dev->core;
 574
 575                 cx_clear(MO_GP0_IO, 1);
 576                 mdelay(100);
 577                 cx_set(MO_GP0_IO, 9);
 578                 mdelay(200);
 579                 dev->core->pll_addr = 0x61;
 580                 dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
 581                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_3_gold,
 582                                                     &dev->core->i2c_adap);
 583                 }
 584                 break;
 585         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
 586                 dev->ts_gen_cntrl = 0x08;
 587                 {
 588                 /* Do a hardware reset of chip before using it. */
 589                 struct cx88_core *core = dev->core;
 590
 591                 cx_clear(MO_GP0_IO, 1);
 592                 mdelay(100);
 593                 cx_set(MO_GP0_IO, 1);
 594                 mdelay(200);
 595                 dev->core->pll_addr = 0x61;
 596                 dev->core->pll_desc = &dvb_pll_tdvs_tua6034;
 597                 dev->dvb.frontend = lgdt330x_attach(&fusionhdtv_5_gold,
 598                                                     &dev->core->i2c_adap);
 599                 }
 600                 break;
 601 #endif
 602 #ifdef HAVE_NXT200X
 603         case CX88_BOARD_ATI_HDTVWONDER:
 604                 dev->dvb.frontend = nxt200x_attach(&ati_hdtvwonder,
 605                                                  &dev->core->i2c_adap);
 606                 break;
 607 #endif
 608 #ifdef HAVE_CX24123
 609         case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
 610         case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
 611                 dev->dvb.frontend = cx24123_attach(&hauppauge_novas_config,
 612                         &dev->core->i2c_adap);
 613                 break;
 614         case CX88_BOARD_KWORLD_DVBS_100:
 615                 dev->dvb.frontend = cx24123_attach(&kworld_dvbs_100_config,
 616                         &dev->core->i2c_adap);
 617                 break;
 618 #endif
 619         default:
 620                 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
 621                        dev->core->name);
 622                 break;
 623         }
 624         if (NULL == dev->dvb.frontend) {
 625                 printk("%s: frontend initialization failed\n",dev->core->name);
 626                 return -1;
 627         }
 628
 629         if (dev->core->pll_desc) {
 630                 dev->dvb.frontend->ops->info.frequency_min = dev->core->pll_desc->min;
 631                 dev->dvb.frontend->ops->info.frequency_max = dev->core->pll_desc->max;
 632         }
 633
 634         /* Put the analog decoder in standby to keep it quiet */
 635         cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
 636
 637         /* register everything */
 638         return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
 639 }
 640
 641 /* ----------------------------------------------------------- */
 642
 643 static int __devinit dvb_probe(struct pci_dev *pci_dev,
 644                                const struct pci_device_id *pci_id)
 645 {
 646         struct cx8802_dev *dev;
 647         struct cx88_core  *core;
 648         int err;
 649
 650         /* general setup */
 651         core = cx88_core_get(pci_dev);
 652         if (NULL == core)
 653                 return -EINVAL;
 654
 655         err = -ENODEV;
 656         if (!cx88_boards[core->board].dvb)
 657                 goto fail_core;
 658
 659         err = -ENOMEM;
 660         dev = kzalloc(sizeof(*dev),GFP_KERNEL);
 661         if (NULL == dev)
 662                 goto fail_core;
 663         dev->pci = pci_dev;
 664         dev->core = core;
 665
 666         err = cx8802_init_common(dev);
 667         if (0 != err)
 668                 goto fail_free;
 669
 670 #ifdef HAVE_VP3054_I2C
 671         err = vp3054_i2c_probe(dev);
 672         if (0 != err)
 673                 goto fail_free;
 674 #endif
 675
 676         /* dvb stuff */
 677         printk("%s/2: cx2388x based dvb card\n", core->name);
 678         videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
 679                             dev->pci, &dev->slock,
 680                             V4L2_BUF_TYPE_VIDEO_CAPTURE,
 681                             V4L2_FIELD_TOP,
 682                             sizeof(struct cx88_buffer),
 683                             dev);
 684         err = dvb_register(dev);
 685         if (0 != err)
 686                 goto fail_fini;
 687
 688         /* Maintain a reference to cx88-video can query the 8802 device. */
 689         core->dvbdev = dev;
 690         return 0;
 691
 692  fail_fini:
 693         cx8802_fini_common(dev);
 694  fail_free:
 695         kfree(dev);
 696  fail_core:
 697         cx88_core_put(core,pci_dev);
 698         return err;
 699 }
 700
 701 static void __devexit dvb_remove(struct pci_dev *pci_dev)
 702 {
 703         struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
 704
 705         /* Destroy any 8802 reference. */
 706         dev->core->dvbdev = NULL;
 707
 708         /* dvb */
 709         videobuf_dvb_unregister(&dev->dvb);
 710
 711 #ifdef HAVE_VP3054_I2C
 712         vp3054_i2c_remove(dev);
 713 #endif
 714
 715         /* common */
 716         cx8802_fini_common(dev);
 717         cx88_core_put(dev->core,dev->pci);
 718         kfree(dev);
 719 }
 720
 721 static struct pci_device_id cx8802_pci_tbl[] = {
 722         {
 723                 .vendor       = 0x14f1,
 724                 .device       = 0x8802,
 725                 .subvendor    = PCI_ANY_ID,
 726                 .subdevice    = PCI_ANY_ID,
 727         },{
 728                 /* --- end of list --- */
 729         }
 730 };
 731 MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
 732
 733 static struct pci_driver dvb_pci_driver = {
 734         .name     = "cx88-dvb",
 735         .id_table = cx8802_pci_tbl,
 736         .probe    = dvb_probe,
 737         .remove   = __devexit_p(dvb_remove),
 738         .suspend  = cx8802_suspend_common,
 739         .resume   = cx8802_resume_common,
 740 };
 741
 742 static int dvb_init(void)
 743 {
 744         printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
 745                (CX88_VERSION_CODE >> 16) & 0xff,
 746                (CX88_VERSION_CODE >>  8) & 0xff,
 747                CX88_VERSION_CODE & 0xff);
 748 #ifdef SNAPSHOT
 749         printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
 750                SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
 751 #endif
 752         return pci_register_driver(&dvb_pci_driver);
 753 }
 754
 755 static void dvb_fini(void)
 756 {
 757         pci_unregister_driver(&dvb_pci_driver);
 758 }
 759
 760 module_init(dvb_init);
 761 module_exit(dvb_fini);
 762
 763 /*
 764  * Local variables:
 765  * c-basic-offset: 8
 766  * compile-command: "make DVB=1"
 767  * End:
 768  */