2 * linux/drivers/mmc/mmci.c - ARM PrimeCell MMCI PL180/1 driver
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/config.h>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/device.h>
16 #include <linux/interrupt.h>
17 #include <linux/blkdev.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/mmc/host.h>
21 #include <linux/mmc/protocol.h>
25 #include <asm/hardware/amba.h>
26 #include <asm/hardware/clock.h>
27 #include <asm/mach/mmc.h>
31 #define DRIVER_NAME "mmci-pl18x"
33 #ifdef CONFIG_MMC_DEBUG
34 #define DBG(host,fmt,args...) \
35 pr_debug("%s: %s: " fmt, host->mmc->host_name, __func__ , args)
37 #define DBG(host,fmt,args...) do { } while (0)
40 static unsigned int fmax = 515633;
43 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
45 writel(0, host->base + MMCICOMMAND);
51 mrq->data->bytes_xfered = host->data_xfered;
54 * Need to drop the host lock here; mmc_request_done may call
55 * back into the driver...
57 spin_unlock(&host->lock);
58 mmc_request_done(host->mmc, mrq);
59 spin_lock(&host->lock);
62 static void mmci_stop_data(struct mmci_host *host)
64 writel(0, host->base + MMCIDATACTRL);
65 writel(0, host->base + MMCIMASK1);
69 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
71 unsigned int datactrl, timeout, irqmask;
74 DBG(host, "blksz %04x blks %04x flags %08x\n",
75 1 << data->blksz_bits, data->blocks, data->flags);
78 host->size = data->blocks << data->blksz_bits;
79 host->data_xfered = 0;
81 mmci_init_sg(host, data);
83 timeout = data->timeout_clks +
84 ((unsigned long long)data->timeout_ns * host->cclk) /
88 writel(timeout, base + MMCIDATATIMER);
89 writel(host->size, base + MMCIDATALENGTH);
91 datactrl = MCI_DPSM_ENABLE | data->blksz_bits << 4;
92 if (data->flags & MMC_DATA_READ) {
93 datactrl |= MCI_DPSM_DIRECTION;
94 irqmask = MCI_RXFIFOHALFFULLMASK;
97 * We don't actually need to include "FIFO empty" here
98 * since its implicit in "FIFO half empty".
100 irqmask = MCI_TXFIFOHALFEMPTYMASK;
103 writel(datactrl, base + MMCIDATACTRL);
104 writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
105 writel(irqmask, base + MMCIMASK1);
109 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
111 void __iomem *base = host->base;
113 DBG(host, "op %02x arg %08x flags %08x\n",
114 cmd->opcode, cmd->arg, cmd->flags);
116 if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
117 writel(0, base + MMCICOMMAND);
121 c |= cmd->opcode | MCI_CPSM_ENABLE;
122 switch (cmd->flags & MMC_RSP_MASK) {
127 c |= MCI_CPSM_LONGRSP;
129 c |= MCI_CPSM_RESPONSE;
133 c |= MCI_CPSM_INTERRUPT;
137 writel(cmd->arg, base + MMCIARGUMENT);
138 writel(c, base + MMCICOMMAND);
142 mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
145 if (status & MCI_DATABLOCKEND) {
146 host->data_xfered += 1 << data->blksz_bits;
148 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
149 if (status & MCI_DATACRCFAIL)
150 data->error = MMC_ERR_BADCRC;
151 else if (status & MCI_DATATIMEOUT)
152 data->error = MMC_ERR_TIMEOUT;
153 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
154 data->error = MMC_ERR_FIFO;
155 status |= MCI_DATAEND;
157 if (status & MCI_DATAEND) {
158 mmci_stop_data(host);
161 mmci_request_end(host, data->mrq);
163 mmci_start_command(host, data->stop, 0);
169 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
172 void __iomem *base = host->base;
176 cmd->resp[0] = readl(base + MMCIRESPONSE0);
177 cmd->resp[1] = readl(base + MMCIRESPONSE1);
178 cmd->resp[2] = readl(base + MMCIRESPONSE2);
179 cmd->resp[3] = readl(base + MMCIRESPONSE3);
181 if (status & MCI_CMDTIMEOUT) {
182 cmd->error = MMC_ERR_TIMEOUT;
183 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
184 cmd->error = MMC_ERR_BADCRC;
187 if (!cmd->data || cmd->error != MMC_ERR_NONE) {
188 mmci_request_end(host, cmd->mrq);
189 } else if (!(cmd->data->flags & MMC_DATA_READ)) {
190 mmci_start_data(host, cmd->data);
194 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
196 void __iomem *base = host->base;
201 int count = host->size - (readl(base + MMCIFIFOCNT) << 2);
209 readsl(base + MMCIFIFO, ptr, count >> 2);
217 status = readl(base + MMCISTATUS);
218 } while (status & MCI_RXDATAAVLBL);
223 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
225 void __iomem *base = host->base;
229 unsigned int count, maxcnt;
231 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
232 count = min(remain, maxcnt);
234 writesl(base + MMCIFIFO, ptr, count >> 2);
242 status = readl(base + MMCISTATUS);
243 } while (status & MCI_TXFIFOHALFEMPTY);
249 * PIO data transfer IRQ handler.
251 static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
253 struct mmci_host *host = dev_id;
254 void __iomem *base = host->base;
257 status = readl(base + MMCISTATUS);
259 DBG(host, "irq1 %08x\n", status);
263 unsigned int remain, len;
267 * For write, we only need to test the half-empty flag
268 * here - if the FIFO is completely empty, then by
269 * definition it is more than half empty.
271 * For read, check for data available.
273 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
277 * Map the current scatter buffer.
279 buffer = mmci_kmap_atomic(host, &flags) + host->sg_off;
280 remain = host->sg_ptr->length - host->sg_off;
283 if (status & MCI_RXACTIVE)
284 len = mmci_pio_read(host, buffer, remain);
285 if (status & MCI_TXACTIVE)
286 len = mmci_pio_write(host, buffer, remain, status);
291 mmci_kunmap_atomic(host, &flags);
300 if (!mmci_next_sg(host))
303 status = readl(base + MMCISTATUS);
307 * If we're nearing the end of the read, switch to
308 * "any data available" mode.
310 if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
311 writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
314 * If we run out of data, disable the data IRQs; this
315 * prevents a race where the FIFO becomes empty before
316 * the chip itself has disabled the data path, and
317 * stops us racing with our data end IRQ.
319 if (host->size == 0) {
320 writel(0, base + MMCIMASK1);
321 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
328 * Handle completion of command and data transfers.
330 static irqreturn_t mmci_irq(int irq, void *dev_id, struct pt_regs *regs)
332 struct mmci_host *host = dev_id;
336 spin_lock(&host->lock);
339 struct mmc_command *cmd;
340 struct mmc_data *data;
342 status = readl(host->base + MMCISTATUS);
343 status &= readl(host->base + MMCIMASK0);
344 writel(status, host->base + MMCICLEAR);
346 DBG(host, "irq0 %08x\n", status);
349 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
350 MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
351 mmci_data_irq(host, data, status);
354 if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
355 mmci_cmd_irq(host, cmd, status);
360 spin_unlock(&host->lock);
362 return IRQ_RETVAL(ret);
365 static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
367 struct mmci_host *host = mmc_priv(mmc);
369 WARN_ON(host->mrq != NULL);
371 spin_lock_irq(&host->lock);
375 if (mrq->data && mrq->data->flags & MMC_DATA_READ)
376 mmci_start_data(host, mrq->data);
378 mmci_start_command(host, mrq->cmd, 0);
380 spin_unlock_irq(&host->lock);
383 static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
385 struct mmci_host *host = mmc_priv(mmc);
386 u32 clk = 0, pwr = 0;
388 DBG(host, "clock %uHz busmode %u powermode %u Vdd %u\n",
389 ios->clock, ios->bus_mode, ios->power_mode, ios->vdd);
392 if (ios->clock >= host->mclk) {
393 clk = MCI_CLK_BYPASS;
394 host->cclk = host->mclk;
396 clk = host->mclk / (2 * ios->clock) - 1;
399 host->cclk = host->mclk / (2 * (clk + 1));
401 clk |= MCI_CLK_ENABLE;
404 if (host->plat->translate_vdd)
405 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
407 switch (ios->power_mode) {
418 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
421 writel(clk, host->base + MMCICLOCK);
423 if (host->pwr != pwr) {
425 writel(pwr, host->base + MMCIPOWER);
429 static struct mmc_host_ops mmci_ops = {
430 .request = mmci_request,
431 .set_ios = mmci_set_ios,
434 static void mmci_check_status(unsigned long data)
436 struct mmci_host *host = (struct mmci_host *)data;
439 status = host->plat->status(mmc_dev(host->mmc));
440 if (status ^ host->oldstat)
441 mmc_detect_change(host->mmc);
443 host->oldstat = status;
444 mod_timer(&host->timer, jiffies + HZ);
447 static int mmci_probe(struct amba_device *dev, void *id)
449 struct mmc_platform_data *plat = dev->dev.platform_data;
450 struct mmci_host *host;
451 struct mmc_host *mmc;
454 /* must have platform data */
460 ret = amba_request_regions(dev, DRIVER_NAME);
464 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
470 host = mmc_priv(mmc);
471 host->clk = clk_get(&dev->dev, "MCLK");
472 if (IS_ERR(host->clk)) {
473 ret = PTR_ERR(host->clk);
478 ret = clk_use(host->clk);
482 ret = clk_enable(host->clk);
487 host->mclk = clk_get_rate(host->clk);
489 host->base = ioremap(dev->res.start, SZ_4K);
495 mmc->ops = &mmci_ops;
496 mmc->f_min = (host->mclk + 511) / 512;
497 mmc->f_max = min(host->mclk, fmax);
498 mmc->ocr_avail = plat->ocr_mask;
503 mmc->max_hw_segs = 16;
504 mmc->max_phys_segs = NR_SG;
507 * Since we only have a 16-bit data length register, we must
508 * ensure that we don't exceed 2^16-1 bytes in a single request.
509 * Choose 64 (512-byte) sectors as the limit.
511 mmc->max_sectors = 64;
514 * Set the maximum segment size. Since we aren't doing DMA
515 * (yet) we are only limited by the data length register.
517 mmc->max_seg_size = mmc->max_sectors << 9;
519 spin_lock_init(&host->lock);
521 writel(0, host->base + MMCIMASK0);
522 writel(0, host->base + MMCIMASK1);
523 writel(0xfff, host->base + MMCICLEAR);
525 ret = request_irq(dev->irq[0], mmci_irq, SA_SHIRQ, DRIVER_NAME " (cmd)", host);
529 ret = request_irq(dev->irq[1], mmci_pio_irq, SA_SHIRQ, DRIVER_NAME " (pio)", host);
533 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
535 amba_set_drvdata(dev, mmc);
539 printk(KERN_INFO "%s: MMCI rev %x cfg %02x at 0x%08lx irq %d,%d\n",
540 mmc->host_name, amba_rev(dev), amba_config(dev),
541 dev->res.start, dev->irq[0], dev->irq[1]);
543 init_timer(&host->timer);
544 host->timer.data = (unsigned long)host;
545 host->timer.function = mmci_check_status;
546 host->timer.expires = jiffies + HZ;
547 add_timer(&host->timer);
552 free_irq(dev->irq[0], host);
556 clk_disable(host->clk);
558 clk_unuse(host->clk);
564 amba_release_regions(dev);
569 static int mmci_remove(struct amba_device *dev)
571 struct mmc_host *mmc = amba_get_drvdata(dev);
573 amba_set_drvdata(dev, NULL);
576 struct mmci_host *host = mmc_priv(mmc);
578 del_timer_sync(&host->timer);
580 mmc_remove_host(mmc);
582 writel(0, host->base + MMCIMASK0);
583 writel(0, host->base + MMCIMASK1);
585 writel(0, host->base + MMCICOMMAND);
586 writel(0, host->base + MMCIDATACTRL);
588 free_irq(dev->irq[0], host);
589 free_irq(dev->irq[1], host);
592 clk_disable(host->clk);
593 clk_unuse(host->clk);
598 amba_release_regions(dev);
605 static int mmci_suspend(struct amba_device *dev, u32 state)
607 struct mmc_host *mmc = amba_get_drvdata(dev);
611 struct mmci_host *host = mmc_priv(mmc);
613 ret = mmc_suspend_host(mmc, state);
615 writel(0, host->base + MMCIMASK0);
621 static int mmci_resume(struct amba_device *dev)
623 struct mmc_host *mmc = amba_get_drvdata(dev);
627 struct mmci_host *host = mmc_priv(mmc);
629 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
631 ret = mmc_resume_host(mmc);
637 #define mmci_suspend NULL
638 #define mmci_resume NULL
641 static struct amba_id mmci_ids[] = {
653 static struct amba_driver mmci_driver = {
658 .remove = mmci_remove,
659 .suspend = mmci_suspend,
660 .resume = mmci_resume,
661 .id_table = mmci_ids,
664 static int __init mmci_init(void)
666 return amba_driver_register(&mmci_driver);
669 static void __exit mmci_exit(void)
671 amba_driver_unregister(&mmci_driver);
674 module_init(mmci_init);
675 module_exit(mmci_exit);
676 module_param(fmax, uint, 0444);
678 MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
679 MODULE_LICENSE("GPL");