2 * MTD map driver for flash on the DC21285 (the StrongARM-110 companion chip)
4 * (C) 2000 Nicolas Pitre <nico@cam.org>
8 * $Id: dc21285.c,v 1.15 2003/05/21 12:45:18 dwmw2 Exp $
10 #include <linux/config.h>
11 #include <linux/module.h>
12 #include <linux/types.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
16 #include <linux/mtd/mtd.h>
17 #include <linux/mtd/map.h>
18 #include <linux/mtd/partitions.h>
21 #include <asm/hardware/dec21285.h>
24 static struct mtd_info *mymtd;
26 __u8 dc21285_read8(struct map_info *map, unsigned long ofs)
28 return *(__u8*)(map->map_priv_1 + ofs);
31 __u16 dc21285_read16(struct map_info *map, unsigned long ofs)
33 return *(__u16*)(map->map_priv_1 + ofs);
36 __u32 dc21285_read32(struct map_info *map, unsigned long ofs)
38 return *(__u32*)(map->map_priv_1 + ofs);
41 void dc21285_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
43 memcpy(to, (void*)(map->map_priv_1 + from), len);
46 void dc21285_write8(struct map_info *map, __u8 d, unsigned long adr)
48 *CSR_ROMWRITEREG = adr & 3;
50 *(__u8*)(map->map_priv_1 + adr) = d;
53 void dc21285_write16(struct map_info *map, __u16 d, unsigned long adr)
55 *CSR_ROMWRITEREG = adr & 3;
57 *(__u16*)(map->map_priv_1 + adr) = d;
60 void dc21285_write32(struct map_info *map, __u32 d, unsigned long adr)
62 *(__u32*)(map->map_priv_1 + adr) = d;
65 void dc21285_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
67 switch (map->buswidth) {
70 __u32 d = *((__u32*)from)++;
71 dc21285_write32(map, d, to);
78 __u16 d = *((__u16*)from)++;
79 dc21285_write16(map, d, to);
86 __u8 d = *((__u8*)from)++;
87 dc21285_write8(map, d, to);
95 struct map_info dc21285_map = {
96 .name = "DC21285 flash",
99 .read8 = dc21285_read8,
100 .read16 = dc21285_read16,
101 .read32 = dc21285_read32,
102 .copy_from = dc21285_copy_from,
103 .write8 = dc21285_write8,
104 .write16 = dc21285_write16,
105 .write32 = dc21285_write32,
106 .copy_to = dc21285_copy_to
110 /* Partition stuff */
111 static struct mtd_partition *dc21285_parts;
112 #ifdef CONFIG_MTD_PARTITIONS
113 static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
116 int __init init_dc21285(void)
120 * Flash timing is determined with bits 19-16 of the
121 * CSR_SA110_CNTL. The value is the number of wait cycles, or
122 * 0 for 16 cycles (the default). Cycles are 20 ns.
123 * Here we use 7 for 140 ns flash chips.
126 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x000f0000) | (7 << 16));
128 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x00f00000) | (7 << 20));
130 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24));
132 /* Determine buswidth */
133 switch (*CSR_SA110_CNTL & (3<<14)) {
134 case SA110_CNTL_ROMWIDTH_8:
135 dc21285_map.buswidth = 1;
137 case SA110_CNTL_ROMWIDTH_16:
138 dc21285_map.buswidth = 2;
140 case SA110_CNTL_ROMWIDTH_32:
141 dc21285_map.buswidth = 4;
144 printk (KERN_ERR "DC21285 flash: undefined buswidth\n");
147 printk (KERN_NOTICE "DC21285 flash support (%d-bit buswidth)\n",
148 dc21285_map.buswidth*8);
150 /* Let's map the flash area */
151 dc21285_map.map_priv_1 = (unsigned long)ioremap(DC21285_FLASH, 16*1024*1024);
152 if (!dc21285_map.map_priv_1) {
153 printk("Failed to ioremap\n");
157 mymtd = do_map_probe("cfi_probe", &dc21285_map);
161 mymtd->owner = THIS_MODULE;
163 /* partition fixup */
165 #ifdef CONFIG_MTD_PARTITIONS
166 nrparts = parse_mtd_partitions(mymtd, probes, &dc21285_parts, (void *)0);
168 add_mtd_partitions(mymtd, dc21285_parts, nrparts);
172 add_mtd_device(mymtd);
176 iounmap((void *)dc21285_map.map_priv_1);
180 static void __exit cleanup_dc21285(void)
182 #ifdef CONFIG_MTD_PARTITIONS
184 del_mtd_partitions(mymtd);
185 kfree(dc21285_parts);
188 del_mtd_device(mymtd);
191 iounmap((void *)dc21285_map.map_priv_1);
194 module_init(init_dc21285);
195 module_exit(cleanup_dc21285);
198 MODULE_LICENSE("GPL");
199 MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>");
200 MODULE_DESCRIPTION("MTD map driver for DC21285 boards");