3 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
5 Maintained by Jeff Garzik <jgarzik@pobox.com>
6 Copyright 2000-2002 Jeff Garzik
8 Much code comes from Donald Becker's rtl8139.c driver,
9 versions 1.13 and older. This driver was originally based
10 on rtl8139.c version 1.07. Header of rtl8139.c version 1.13:
14 Written 1997-2001 by Donald Becker.
15 This software may be used and distributed according to the
16 terms of the GNU General Public License (GPL), incorporated
17 herein by reference. Drivers based on or derived from this
18 code fall under the GPL and must retain the authorship,
19 copyright and license notice. This file is not a complete
20 program and may only be used when the entire operating
21 system is licensed under the GPL.
23 This driver is for boards based on the RTL8129 and RTL8139
26 The author may be reached as becker@scyld.com, or C/O Scyld
27 Computing Corporation 410 Severn Ave., Suite 210 Annapolis
30 Support and updates available at
31 http://www.scyld.com/network/rtl8139.html
33 Twister-tuning table provided by Kinston
34 <shangh@realtek.com.tw>.
38 This software may be used and distributed according to the terms
39 of the GNU General Public License, incorporated herein by reference.
43 Donald Becker - he wrote the original driver, kudos to him!
44 (but please don't e-mail him for support, this isn't his driver)
46 Tigran Aivazian - bug fixes, skbuff free cleanup
48 Martin Mares - suggestions for PCI cleanup
50 David S. Miller - PCI DMA and softnet updates
52 Ernst Gill - fixes ported from BSD driver
54 Daniel Kobras - identified specific locations of
55 posted MMIO write bugginess
57 Gerard Sharp - bug fix, testing and feedback
59 David Ford - Rx ring wrap fix
61 Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
62 to find and fix a crucial bug on older chipsets.
64 Donald Becker/Chris Butterworth/Marcus Westergren -
65 Noticed various Rx packet size-related buglets.
67 Santiago Garcia Mantinan - testing and feedback
69 Jens David - 2.2.x kernel backports
71 Martin Dennett - incredibly helpful insight on undocumented
72 features of the 8139 chips
74 Jean-Jacques Michel - bug fix
76 Tobias Ringström - Rx interrupt status checking suggestion
78 Andrew Morton - Clear blocked signals, avoid
79 buffer overrun setting current->comm.
81 Kalle Olavi Niemitalo - Wake-on-LAN ioctls
83 Robert Kuebel - Save kernel thread from dying on any signal.
85 Submitting bug reports:
87 "rtl8139-diag -mmmaaavvveefN" output
88 enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
90 See 8139too.txt for more details.
94 #define DRV_NAME "8139too"
95 #define DRV_VERSION "0.9.27"
98 #include <linux/config.h>
99 #include <linux/module.h>
100 #include <linux/kernel.h>
101 #include <linux/compiler.h>
102 #include <linux/pci.h>
103 #include <linux/init.h>
104 #include <linux/ioport.h>
105 #include <linux/netdevice.h>
106 #include <linux/etherdevice.h>
107 #include <linux/rtnetlink.h>
108 #include <linux/delay.h>
109 #include <linux/ethtool.h>
110 #include <linux/mii.h>
111 #include <linux/completion.h>
112 #include <linux/crc32.h>
113 #include <linux/suspend.h>
115 #include <asm/uaccess.h>
118 #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION
119 #define PFX DRV_NAME ": "
121 /* Default Message level */
122 #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
127 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
128 #ifdef CONFIG_8139TOO_PIO
132 /* define to 1 to enable copious debugging info */
135 /* define to 1 to disable lightweight runtime debugging checks */
136 #undef RTL8139_NDEBUG
140 /* note: prints function name for you */
141 # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
143 # define DPRINTK(fmt, args...)
146 #ifdef RTL8139_NDEBUG
147 # define assert(expr) do {} while (0)
149 # define assert(expr) \
150 if(unlikely(!(expr))) { \
151 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
152 #expr,__FILE__,__FUNCTION__,__LINE__); \
157 /* A few user-configurable values. */
160 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
161 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
163 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
164 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
165 static int multicast_filter_limit = 32;
167 /* bitmapped message enable number */
168 static int debug = -1;
172 * Warning: 64K ring has hardware issues and may lock up.
174 #define RX_BUF_IDX 2 /* 32K ring */
175 #define RX_BUF_LEN (8192 << RX_BUF_IDX)
176 #define RX_BUF_PAD 16
177 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
179 #if RX_BUF_LEN == 65536
180 #define RX_BUF_TOT_LEN RX_BUF_LEN
182 #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
185 /* Number of Tx descriptor registers. */
186 #define NUM_TX_DESC 4
188 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
189 #define MAX_ETH_FRAME_SIZE 1536
191 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
192 #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE
193 #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC)
195 /* PCI Tuning Parameters
196 Threshold is bytes transferred to chip before transmission starts. */
197 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
199 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */
200 #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */
201 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
202 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
203 #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */
205 /* Operational parameters that usually are not changed. */
206 /* Time in jiffies before concluding the transmitter is hung. */
207 #define TX_TIMEOUT (6*HZ)
211 HAS_MII_XCVR = 0x010000,
212 HAS_CHIP_XCVR = 0x020000,
213 HAS_LNK_CHNG = 0x040000,
216 #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */
217 #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */
218 #define RTL_MIN_IO_SIZE 0x80
219 #define RTL8139B_IO_SIZE 256
221 #define RTL8129_CAPS HAS_MII_XCVR
222 #define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG
230 /* indexed by board_t, above */
234 } board_info[] __devinitdata = {
235 { "RealTek RTL8139", RTL8139_CAPS },
236 { "RealTek RTL8129", RTL8129_CAPS },
240 static struct pci_device_id rtl8139_pci_tbl[] = {
241 {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
242 {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
243 {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
244 {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
245 {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
246 {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
247 {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
248 {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
249 {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
250 {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
251 {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
252 {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
253 {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
254 {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
255 {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
256 {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
257 {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
258 {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
259 {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
261 #ifdef CONFIG_SH_SECUREEDGE5410
262 /* Bogus 8139 silicon reports 8129 without external PROM :-( */
263 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
265 #ifdef CONFIG_8139TOO_8129
266 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
269 /* some crazy cards report invalid vendor ids like
270 * 0x0001 here. The other ids are valid and constant,
271 * so we simply don't match on the main vendor id.
273 {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
274 {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
275 {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
279 MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
282 const char str[ETH_GSTRING_LEN];
283 } ethtool_stats_keys[] = {
287 { "rx_lost_in_ring" },
290 /* The rest of these values should never change. */
292 /* Symbolic offsets to registers. */
293 enum RTL8139_registers {
294 MAC0 = 0, /* Ethernet hardware address. */
295 MAR0 = 8, /* Multicast filter. */
296 TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */
297 TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */
306 Timer = 0x48, /* A general-purpose counter. */
307 RxMissed = 0x4C, /* 24 bits valid, write clears. */
314 Config4 = 0x5A, /* absent on RTL-8139A */
318 BasicModeCtrl = 0x62,
319 BasicModeStatus = 0x64,
322 NWayExpansion = 0x6A,
323 /* Undocumented registers, but required for proper operation. */
324 FIFOTMS = 0x70, /* FIFO Control and test. */
325 CSCR = 0x74, /* Chip Status and Configuration Register. */
327 PARA7c = 0x7c, /* Magic transceiver parameter register. */
328 Config5 = 0xD8, /* absent on RTL-8139A */
332 MultiIntrClear = 0xF000,
334 Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
344 /* Interrupt register bits, using my own meaningful names. */
345 enum IntrStatusBits {
356 RxAckBits = RxFIFOOver | RxOverflow | RxOK,
363 TxOutOfWindow = 0x20000000,
364 TxAborted = 0x40000000,
365 TxCarrierLost = 0x80000000,
368 RxMulticast = 0x8000,
370 RxBroadcast = 0x2000,
371 RxBadSymbol = 0x0020,
379 /* Bits in RxConfig. */
383 AcceptBroadcast = 0x08,
384 AcceptMulticast = 0x04,
386 AcceptAllPhys = 0x01,
389 /* Bits in TxConfig. */
390 enum tx_config_bits {
391 TxIFG1 = (1 << 25), /* Interframe Gap Time */
392 TxIFG0 = (1 << 24), /* Enabling these bits violates IEEE 802.3 */
393 TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
394 TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */
395 TxClearAbt = (1 << 0), /* Clear abort (WO) */
396 TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */
397 TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */
399 TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
402 /* Bits in Config1 */
404 Cfg1_PM_Enable = 0x01,
405 Cfg1_VPD_Enable = 0x02,
408 LWAKE = 0x10, /* not on 8139, 8139A */
409 Cfg1_Driver_Load = 0x20,
412 SLEEP = (1 << 1), /* only on 8139, 8139A */
413 PWRDN = (1 << 0), /* only on 8139, 8139A */
416 /* Bits in Config3 */
418 Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */
419 Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
420 Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
421 Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */
422 Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */
423 Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
424 Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */
425 Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
428 /* Bits in Config4 */
430 LWPTN = (1 << 2), /* not on 8139, 8139A */
433 /* Bits in Config5 */
435 Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */
436 Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */
437 Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */
438 Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
439 Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */
440 Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */
441 Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */
445 /* rx fifo threshold */
447 RxCfgFIFONone = (7 << RxCfgFIFOShift),
451 RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
453 /* rx ring buffer length */
455 RxCfgRcv16K = (1 << 11),
456 RxCfgRcv32K = (1 << 12),
457 RxCfgRcv64K = (1 << 11) | (1 << 12),
459 /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
463 /* Twister tuning parameters from RealTek.
464 Completely undocumented, but required to tune bad links on some boards. */
466 CSCR_LinkOKBit = 0x0400,
467 CSCR_LinkChangeBit = 0x0800,
468 CSCR_LinkStatusBits = 0x0f000,
469 CSCR_LinkDownOffCmd = 0x003c0,
470 CSCR_LinkDownCmd = 0x0f3c0,
475 Cfg9346_Unlock = 0xC0,
492 HasHltClk = (1 << 0),
496 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
497 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
498 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1)
500 /* directly indexed by chip_t, above */
501 const static struct {
503 u32 version; /* from RTL8139C/RTL8139D docs */
505 } rtl_chip_info[] = {
507 HW_REVID(1, 0, 0, 0, 0, 0, 0),
512 HW_REVID(1, 1, 0, 0, 0, 0, 0),
517 HW_REVID(1, 1, 1, 0, 0, 0, 0),
518 HasHltClk, /* XXX undocumented? */
522 HW_REVID(1, 1, 1, 0, 0, 1, 0),
523 HasHltClk, /* XXX undocumented? */
527 HW_REVID(1, 1, 1, 1, 0, 0, 0),
532 HW_REVID(1, 1, 1, 1, 1, 0, 0),
537 HW_REVID(1, 1, 1, 0, 1, 0, 0),
542 HW_REVID(1, 1, 1, 1, 0, 1, 0),
547 HW_REVID(1, 1, 1, 0, 1, 0, 1),
552 HW_REVID(1, 1, 1, 0, 1, 1, 1),
557 struct rtl_extra_stats {
558 unsigned long early_rx;
559 unsigned long tx_buf_mapped;
560 unsigned long tx_timeouts;
561 unsigned long rx_lost_in_ring;
564 struct rtl8139_private {
567 struct pci_dev *pci_dev;
570 struct net_device_stats stats;
571 unsigned char *rx_ring;
572 unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */
573 unsigned int tx_flag;
574 unsigned long cur_tx;
575 unsigned long dirty_tx;
576 unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */
577 unsigned char *tx_bufs; /* Tx bounce buffer region. */
578 dma_addr_t rx_ring_dma;
579 dma_addr_t tx_bufs_dma;
580 signed char phys[4]; /* MII device addresses. */
581 char twistie, twist_row, twist_col; /* Twister tune state. */
582 unsigned int default_port:4; /* Last dev->if_port value. */
587 wait_queue_head_t thr_wait;
588 struct completion thr_exited;
590 struct rtl_extra_stats xstats;
592 struct mii_if_info mii;
593 unsigned int regs_len;
596 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
597 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
598 MODULE_LICENSE("GPL");
600 MODULE_PARM (multicast_filter_limit, "i");
601 MODULE_PARM (media, "1-" __MODULE_STRING(MAX_UNITS) "i");
602 MODULE_PARM (full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
603 MODULE_PARM (debug, "i");
604 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
605 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
606 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
607 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
609 static int read_eeprom (void *ioaddr, int location, int addr_len);
610 static int rtl8139_open (struct net_device *dev);
611 static int mdio_read (struct net_device *dev, int phy_id, int location);
612 static void mdio_write (struct net_device *dev, int phy_id, int location,
614 static inline void rtl8139_start_thread(struct net_device *dev);
615 static void rtl8139_tx_timeout (struct net_device *dev);
616 static void rtl8139_init_ring (struct net_device *dev);
617 static int rtl8139_start_xmit (struct sk_buff *skb,
618 struct net_device *dev);
619 static int rtl8139_poll(struct net_device *dev, int *budget);
620 #ifdef CONFIG_NET_POLL_CONTROLLER
621 static void rtl8139_poll_controller(struct net_device *dev);
623 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
624 struct pt_regs *regs);
625 static int rtl8139_close (struct net_device *dev);
626 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
627 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
628 static void rtl8139_set_rx_mode (struct net_device *dev);
629 static void __set_rx_mode (struct net_device *dev);
630 static void rtl8139_hw_start (struct net_device *dev);
631 static struct ethtool_ops rtl8139_ethtool_ops;
635 #define RTL_R8(reg) inb (((unsigned long)ioaddr) + (reg))
636 #define RTL_R16(reg) inw (((unsigned long)ioaddr) + (reg))
637 #define RTL_R32(reg) ((unsigned long) inl (((unsigned long)ioaddr) + (reg)))
638 #define RTL_W8(reg, val8) outb ((val8), ((unsigned long)ioaddr) + (reg))
639 #define RTL_W16(reg, val16) outw ((val16), ((unsigned long)ioaddr) + (reg))
640 #define RTL_W32(reg, val32) outl ((val32), ((unsigned long)ioaddr) + (reg))
641 #define RTL_W8_F RTL_W8
642 #define RTL_W16_F RTL_W16
643 #define RTL_W32_F RTL_W32
650 #define readb(addr) inb((unsigned long)(addr))
651 #define readw(addr) inw((unsigned long)(addr))
652 #define readl(addr) inl((unsigned long)(addr))
653 #define writeb(val,addr) outb((val),(unsigned long)(addr))
654 #define writew(val,addr) outw((val),(unsigned long)(addr))
655 #define writel(val,addr) outl((val),(unsigned long)(addr))
659 /* write MMIO register, with flush */
660 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
661 #define RTL_W8_F(reg, val8) do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0)
662 #define RTL_W16_F(reg, val16) do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0)
663 #define RTL_W32_F(reg, val32) do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0)
666 #define MMIO_FLUSH_AUDIT_COMPLETE 1
667 #if MMIO_FLUSH_AUDIT_COMPLETE
669 /* write MMIO register */
670 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
671 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
672 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
676 /* write MMIO register, then flush */
677 #define RTL_W8 RTL_W8_F
678 #define RTL_W16 RTL_W16_F
679 #define RTL_W32 RTL_W32_F
681 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
683 /* read MMIO register */
684 #define RTL_R8(reg) readb (ioaddr + (reg))
685 #define RTL_R16(reg) readw (ioaddr + (reg))
686 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
688 #endif /* USE_IO_OPS */
691 static const u16 rtl8139_intr_mask =
692 PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
693 TxErr | TxOK | RxErr | RxOK;
695 static const u16 rtl8139_norx_intr_mask =
696 PCIErr | PCSTimeout | RxUnderrun |
697 TxErr | TxOK | RxErr ;
700 static const unsigned int rtl8139_rx_config =
701 RxCfgRcv8K | RxNoWrap |
702 (RX_FIFO_THRESH << RxCfgFIFOShift) |
703 (RX_DMA_BURST << RxCfgDMAShift);
704 #elif RX_BUF_IDX == 1
705 static const unsigned int rtl8139_rx_config =
706 RxCfgRcv16K | RxNoWrap |
707 (RX_FIFO_THRESH << RxCfgFIFOShift) |
708 (RX_DMA_BURST << RxCfgDMAShift);
709 #elif RX_BUF_IDX == 2
710 static const unsigned int rtl8139_rx_config =
711 RxCfgRcv32K | RxNoWrap |
712 (RX_FIFO_THRESH << RxCfgFIFOShift) |
713 (RX_DMA_BURST << RxCfgDMAShift);
714 #elif RX_BUF_IDX == 3
715 static const unsigned int rtl8139_rx_config =
717 (RX_FIFO_THRESH << RxCfgFIFOShift) |
718 (RX_DMA_BURST << RxCfgDMAShift);
720 #error "Invalid configuration for 8139_RXBUF_IDX"
723 static const unsigned int rtl8139_tx_config =
724 (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
726 static void __rtl8139_cleanup_dev (struct net_device *dev)
728 struct rtl8139_private *tp;
729 struct pci_dev *pdev;
731 assert (dev != NULL);
732 assert (dev->priv != NULL);
735 assert (tp->pci_dev != NULL);
740 iounmap (tp->mmio_addr);
741 #endif /* !USE_IO_OPS */
743 /* it's ok to call this even if we have no regions to free */
744 pci_release_regions (pdev);
748 pci_set_drvdata (pdev, NULL);
752 static void rtl8139_chip_reset (void *ioaddr)
756 /* Soft reset the chip. */
757 RTL_W8 (ChipCmd, CmdReset);
759 /* Check that the chip has finished the reset. */
760 for (i = 1000; i > 0; i--) {
762 if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
769 static int __devinit rtl8139_init_board (struct pci_dev *pdev,
770 struct net_device **dev_out)
773 struct net_device *dev;
774 struct rtl8139_private *tp;
778 u32 pio_start, pio_end, pio_flags, pio_len;
779 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
782 assert (pdev != NULL);
786 /* dev and dev->priv zeroed in alloc_etherdev */
787 dev = alloc_etherdev (sizeof (*tp));
789 printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pci_name(pdev));
792 SET_MODULE_OWNER(dev);
793 SET_NETDEV_DEV(dev, &pdev->dev);
798 /* enable device (incl. PCI PM wakeup and hotplug setup) */
799 rc = pci_enable_device (pdev);
803 pio_start = pci_resource_start (pdev, 0);
804 pio_end = pci_resource_end (pdev, 0);
805 pio_flags = pci_resource_flags (pdev, 0);
806 pio_len = pci_resource_len (pdev, 0);
808 mmio_start = pci_resource_start (pdev, 1);
809 mmio_end = pci_resource_end (pdev, 1);
810 mmio_flags = pci_resource_flags (pdev, 1);
811 mmio_len = pci_resource_len (pdev, 1);
813 /* set this immediately, we need to know before
814 * we talk to the chip directly */
815 DPRINTK("PIO region size == 0x%02X\n", pio_len);
816 DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
819 /* make sure PCI base addr 0 is PIO */
820 if (!(pio_flags & IORESOURCE_IO)) {
821 printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pci_name(pdev));
825 /* check for weird/broken PCI region reporting */
826 if (pio_len < RTL_MIN_IO_SIZE) {
827 printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pci_name(pdev));
832 /* make sure PCI base addr 1 is MMIO */
833 if (!(mmio_flags & IORESOURCE_MEM)) {
834 printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pci_name(pdev));
838 if (mmio_len < RTL_MIN_IO_SIZE) {
839 printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pci_name(pdev));
845 rc = pci_request_regions (pdev, "8139too");
849 /* enable PCI bus-mastering */
850 pci_set_master (pdev);
853 ioaddr = (void *) pio_start;
854 dev->base_addr = pio_start;
855 tp->mmio_addr = ioaddr;
856 tp->regs_len = pio_len;
858 /* ioremap MMIO region */
859 ioaddr = ioremap (mmio_start, mmio_len);
860 if (ioaddr == NULL) {
861 printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev));
865 dev->base_addr = (long) ioaddr;
866 tp->mmio_addr = ioaddr;
867 tp->regs_len = mmio_len;
868 #endif /* USE_IO_OPS */
870 /* Bring old chips out of low-power mode. */
871 RTL_W8 (HltClk, 'R');
873 /* check for missing/broken hardware */
874 if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
875 printk (KERN_ERR PFX "%s: Chip not responding, ignoring board\n",
881 /* identify chip attached to board */
882 version = RTL_R32 (TxConfig) & HW_REVID_MASK;
883 for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
884 if (version == rtl_chip_info[i].version) {
889 /* if unknown chip, assume array element #0, original RTL-8139 in this case */
890 printk (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n",
892 printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pci_name(pdev), RTL_R32 (TxConfig));
896 DPRINTK ("chipset id (%d) == index %d, '%s'\n",
897 version, i, rtl_chip_info[i].name);
899 if (tp->chipset >= CH_8139B) {
900 u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
901 DPRINTK("PCI PM wakeup\n");
902 if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
905 new_tmp8 |= Cfg1_PM_Enable;
906 if (new_tmp8 != tmp8) {
907 RTL_W8 (Cfg9346, Cfg9346_Unlock);
908 RTL_W8 (Config1, tmp8);
909 RTL_W8 (Cfg9346, Cfg9346_Lock);
911 if (rtl_chip_info[tp->chipset].flags & HasLWake) {
912 tmp8 = RTL_R8 (Config4);
914 RTL_W8 (Cfg9346, Cfg9346_Unlock);
915 RTL_W8 (Config4, tmp8 & ~LWPTN);
916 RTL_W8 (Cfg9346, Cfg9346_Lock);
920 DPRINTK("Old chip wakeup\n");
921 tmp8 = RTL_R8 (Config1);
922 tmp8 &= ~(SLEEP | PWRDN);
923 RTL_W8 (Config1, tmp8);
926 rtl8139_chip_reset (ioaddr);
932 __rtl8139_cleanup_dev (dev);
937 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
938 const struct pci_device_id *ent)
940 struct net_device *dev = NULL;
941 struct rtl8139_private *tp;
942 int i, addr_len, option;
944 static int board_idx = -1;
947 assert (pdev != NULL);
948 assert (ent != NULL);
952 /* when we're built into the kernel, the driver version message
953 * is only printed if at least one 8139 board has been found
957 static int printed_version;
958 if (!printed_version++)
959 printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
963 pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev);
965 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
966 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
967 printk(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
968 pci_name(pdev), pdev->vendor, pdev->device, pci_rev);
969 printk(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n");
972 i = rtl8139_init_board (pdev, &dev);
976 assert (dev != NULL);
979 ioaddr = tp->mmio_addr;
980 assert (ioaddr != NULL);
982 addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
983 for (i = 0; i < 3; i++)
984 ((u16 *) (dev->dev_addr))[i] =
985 le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
987 /* The Rtl8139-specific entries in the device structure. */
988 dev->open = rtl8139_open;
989 dev->hard_start_xmit = rtl8139_start_xmit;
990 dev->poll = rtl8139_poll;
992 dev->stop = rtl8139_close;
993 dev->get_stats = rtl8139_get_stats;
994 dev->set_multicast_list = rtl8139_set_rx_mode;
995 dev->do_ioctl = netdev_ioctl;
996 dev->ethtool_ops = &rtl8139_ethtool_ops;
997 dev->tx_timeout = rtl8139_tx_timeout;
998 dev->watchdog_timeo = TX_TIMEOUT;
999 #ifdef CONFIG_NET_POLL_CONTROLLER
1000 dev->poll_controller = rtl8139_poll_controller;
1003 /* note: the hardware is not capable of sg/csum/highdma, however
1004 * through the use of skb_copy_and_csum_dev we enable these
1007 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
1009 dev->irq = pdev->irq;
1011 /* dev->priv/tp zeroed and aligned in alloc_etherdev */
1014 /* note: tp->chipset set in rtl8139_init_board */
1015 tp->drv_flags = board_info[ent->driver_data].hw_flags;
1016 tp->mmio_addr = ioaddr;
1018 (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
1019 spin_lock_init (&tp->lock);
1020 spin_lock_init (&tp->rx_lock);
1021 init_waitqueue_head (&tp->thr_wait);
1022 init_completion (&tp->thr_exited);
1024 tp->mii.mdio_read = mdio_read;
1025 tp->mii.mdio_write = mdio_write;
1026 tp->mii.phy_id_mask = 0x3f;
1027 tp->mii.reg_num_mask = 0x1f;
1029 /* dev is fully set up and ready to use now */
1030 DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
1031 i = register_netdev (dev);
1032 if (i) goto err_out;
1034 pci_set_drvdata (pdev, dev);
1036 printk (KERN_INFO "%s: %s at 0x%lx, "
1037 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1040 board_info[ent->driver_data].name,
1042 dev->dev_addr[0], dev->dev_addr[1],
1043 dev->dev_addr[2], dev->dev_addr[3],
1044 dev->dev_addr[4], dev->dev_addr[5],
1047 printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n",
1048 dev->name, rtl_chip_info[tp->chipset].name);
1050 /* Find the connected MII xcvrs.
1051 Doing this in open() would allow detecting external xcvrs later, but
1052 takes too much time. */
1053 #ifdef CONFIG_8139TOO_8129
1054 if (tp->drv_flags & HAS_MII_XCVR) {
1055 int phy, phy_idx = 0;
1056 for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
1057 int mii_status = mdio_read(dev, phy, 1);
1058 if (mii_status != 0xffff && mii_status != 0x0000) {
1059 u16 advertising = mdio_read(dev, phy, 4);
1060 tp->phys[phy_idx++] = phy;
1061 printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
1062 "advertising %4.4x.\n",
1063 dev->name, phy, mii_status, advertising);
1067 printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM "
1075 tp->mii.phy_id = tp->phys[0];
1077 /* The lower four bits are the media type. */
1078 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
1080 tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
1081 tp->default_port = option & 0xFF;
1082 if (tp->default_port)
1083 tp->mii.force_media = 1;
1085 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0)
1086 tp->mii.full_duplex = full_duplex[board_idx];
1087 if (tp->mii.full_duplex) {
1088 printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
1089 /* Changing the MII-advertised media because might prevent
1091 tp->mii.force_media = 1;
1093 if (tp->default_port) {
1094 printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n",
1095 (option & 0x20 ? 100 : 10),
1096 (option & 0x10 ? "full" : "half"));
1097 mdio_write(dev, tp->phys[0], 0,
1098 ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */
1099 ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
1102 /* Put the chip into low-power mode. */
1103 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
1104 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */
1109 __rtl8139_cleanup_dev (dev);
1114 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
1116 struct net_device *dev = pci_get_drvdata (pdev);
1117 struct rtl8139_private *np;
1119 assert (dev != NULL);
1121 assert (np != NULL);
1123 unregister_netdev (dev);
1125 __rtl8139_cleanup_dev (dev);
1129 /* Serial EEPROM section. */
1131 /* EEPROM_Ctrl bits. */
1132 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
1133 #define EE_CS 0x08 /* EEPROM chip select. */
1134 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
1135 #define EE_WRITE_0 0x00
1136 #define EE_WRITE_1 0x02
1137 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
1138 #define EE_ENB (0x80 | EE_CS)
1140 /* Delay between EEPROM clock transitions.
1141 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
1144 #define eeprom_delay() readl(ee_addr)
1146 /* The EEPROM commands include the alway-set leading bit. */
1147 #define EE_WRITE_CMD (5)
1148 #define EE_READ_CMD (6)
1149 #define EE_ERASE_CMD (7)
1151 static int __devinit read_eeprom (void *ioaddr, int location, int addr_len)
1154 unsigned retval = 0;
1155 void *ee_addr = ioaddr + Cfg9346;
1156 int read_cmd = location | (EE_READ_CMD << addr_len);
1158 writeb (EE_ENB & ~EE_CS, ee_addr);
1159 writeb (EE_ENB, ee_addr);
1162 /* Shift the read command bits out. */
1163 for (i = 4 + addr_len; i >= 0; i--) {
1164 int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
1165 writeb (EE_ENB | dataval, ee_addr);
1167 writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1170 writeb (EE_ENB, ee_addr);
1173 for (i = 16; i > 0; i--) {
1174 writeb (EE_ENB | EE_SHIFT_CLK, ee_addr);
1177 (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 :
1179 writeb (EE_ENB, ee_addr);
1183 /* Terminate the EEPROM access. */
1184 writeb (~EE_CS, ee_addr);
1190 /* MII serial management: mostly bogus for now. */
1191 /* Read and write the MII management registers using software-generated
1192 serial MDIO protocol.
1193 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
1194 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
1195 "overclocking" issues. */
1196 #define MDIO_DIR 0x80
1197 #define MDIO_DATA_OUT 0x04
1198 #define MDIO_DATA_IN 0x02
1199 #define MDIO_CLK 0x01
1200 #define MDIO_WRITE0 (MDIO_DIR)
1201 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
1203 #define mdio_delay(mdio_addr) readb(mdio_addr)
1206 static char mii_2_8139_map[8] = {
1218 #ifdef CONFIG_8139TOO_8129
1219 /* Syncronize the MII management interface by shifting 32 one bits out. */
1220 static void mdio_sync (void *mdio_addr)
1224 for (i = 32; i >= 0; i--) {
1225 writeb (MDIO_WRITE1, mdio_addr);
1226 mdio_delay (mdio_addr);
1227 writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr);
1228 mdio_delay (mdio_addr);
1233 static int mdio_read (struct net_device *dev, int phy_id, int location)
1235 struct rtl8139_private *tp = dev->priv;
1237 #ifdef CONFIG_8139TOO_8129
1238 void *mdio_addr = tp->mmio_addr + Config4;
1239 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
1243 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
1244 return location < 8 && mii_2_8139_map[location] ?
1245 readw (tp->mmio_addr + mii_2_8139_map[location]) : 0;
1248 #ifdef CONFIG_8139TOO_8129
1249 mdio_sync (mdio_addr);
1250 /* Shift the read command bits out. */
1251 for (i = 15; i >= 0; i--) {
1252 int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
1254 writeb (MDIO_DIR | dataval, mdio_addr);
1255 mdio_delay (mdio_addr);
1256 writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr);
1257 mdio_delay (mdio_addr);
1260 /* Read the two transition, 16 data, and wire-idle bits. */
1261 for (i = 19; i > 0; i--) {
1262 writeb (0, mdio_addr);
1263 mdio_delay (mdio_addr);
1264 retval = (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 : 0);
1265 writeb (MDIO_CLK, mdio_addr);
1266 mdio_delay (mdio_addr);
1270 return (retval >> 1) & 0xffff;
1274 static void mdio_write (struct net_device *dev, int phy_id, int location,
1277 struct rtl8139_private *tp = dev->priv;
1278 #ifdef CONFIG_8139TOO_8129
1279 void *mdio_addr = tp->mmio_addr + Config4;
1280 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
1284 if (phy_id > 31) { /* Really a 8139. Use internal registers. */
1285 void *ioaddr = tp->mmio_addr;
1286 if (location == 0) {
1287 RTL_W8 (Cfg9346, Cfg9346_Unlock);
1288 RTL_W16 (BasicModeCtrl, value);
1289 RTL_W8 (Cfg9346, Cfg9346_Lock);
1290 } else if (location < 8 && mii_2_8139_map[location])
1291 RTL_W16 (mii_2_8139_map[location], value);
1295 #ifdef CONFIG_8139TOO_8129
1296 mdio_sync (mdio_addr);
1298 /* Shift the command bits out. */
1299 for (i = 31; i >= 0; i--) {
1301 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
1302 writeb (dataval, mdio_addr);
1303 mdio_delay (mdio_addr);
1304 writeb (dataval | MDIO_CLK, mdio_addr);
1305 mdio_delay (mdio_addr);
1307 /* Clear out extra bits. */
1308 for (i = 2; i > 0; i--) {
1309 writeb (0, mdio_addr);
1310 mdio_delay (mdio_addr);
1311 writeb (MDIO_CLK, mdio_addr);
1312 mdio_delay (mdio_addr);
1318 static int rtl8139_open (struct net_device *dev)
1320 struct rtl8139_private *tp = dev->priv;
1322 void *ioaddr = tp->mmio_addr;
1324 retval = request_irq (dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev);
1328 tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
1330 tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
1332 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
1333 free_irq(dev->irq, dev);
1336 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
1337 tp->tx_bufs, tp->tx_bufs_dma);
1339 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
1340 tp->rx_ring, tp->rx_ring_dma);
1346 tp->mii.full_duplex = tp->mii.force_media;
1347 tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
1349 rtl8139_init_ring (dev);
1350 rtl8139_hw_start (dev);
1351 netif_start_queue (dev);
1353 if (netif_msg_ifup(tp))
1354 printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#lx IRQ %d"
1355 " GP Pins %2.2x %s-duplex.\n",
1356 dev->name, pci_resource_start (tp->pci_dev, 1),
1357 dev->irq, RTL_R8 (MediaStatus),
1358 tp->mii.full_duplex ? "full" : "half");
1360 rtl8139_start_thread(dev);
1366 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
1368 struct rtl8139_private *tp = dev->priv;
1370 if (tp->phys[0] >= 0) {
1371 mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
1375 /* Start the hardware at open or resume. */
1376 static void rtl8139_hw_start (struct net_device *dev)
1378 struct rtl8139_private *tp = dev->priv;
1379 void *ioaddr = tp->mmio_addr;
1383 /* Bring old chips out of low-power mode. */
1384 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
1385 RTL_W8 (HltClk, 'R');
1387 rtl8139_chip_reset (ioaddr);
1389 /* unlock Config[01234] and BMCR register writes */
1390 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
1391 /* Restore our idea of the MAC address. */
1392 RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
1393 RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
1395 /* Must enable Tx/Rx before setting transfer thresholds! */
1396 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1398 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
1399 RTL_W32 (RxConfig, tp->rx_config);
1401 /* Check this value: the documentation for IFG contradicts ifself. */
1402 RTL_W32 (TxConfig, rtl8139_tx_config);
1406 rtl_check_media (dev, 1);
1408 if (tp->chipset >= CH_8139B) {
1409 /* Disable magic packet scanning, which is enabled
1410 * when PM is enabled in Config1. It can be reenabled
1411 * via ETHTOOL_SWOL if desired. */
1412 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
1415 DPRINTK("init buffer addresses\n");
1417 /* Lock Config[01234] and BMCR register writes */
1418 RTL_W8 (Cfg9346, Cfg9346_Lock);
1420 /* init Rx ring buffer DMA address */
1421 RTL_W32_F (RxBuf, tp->rx_ring_dma);
1423 /* init Tx buffer DMA addresses */
1424 for (i = 0; i < NUM_TX_DESC; i++)
1425 RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
1427 RTL_W32 (RxMissed, 0);
1429 rtl8139_set_rx_mode (dev);
1431 /* no early-rx interrupts */
1432 RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
1434 /* make sure RxTx has started */
1435 tmp = RTL_R8 (ChipCmd);
1436 if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
1437 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1439 /* Enable all known interrupts by setting the interrupt mask. */
1440 RTL_W16 (IntrMask, rtl8139_intr_mask);
1444 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1445 static void rtl8139_init_ring (struct net_device *dev)
1447 struct rtl8139_private *tp = dev->priv;
1454 for (i = 0; i < NUM_TX_DESC; i++)
1455 tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
1459 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
1460 static int next_tick = 3 * HZ;
1462 #ifndef CONFIG_8139TOO_TUNE_TWISTER
1463 static inline void rtl8139_tune_twister (struct net_device *dev,
1464 struct rtl8139_private *tp) {}
1466 enum TwisterParamVals {
1467 PARA78_default = 0x78fa8388,
1468 PARA7c_default = 0xcb38de43, /* param[0][3] */
1469 PARA7c_xxx = 0xcb38de43,
1472 static const unsigned long param[4][4] = {
1473 {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
1474 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1475 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1476 {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
1479 static void rtl8139_tune_twister (struct net_device *dev,
1480 struct rtl8139_private *tp)
1483 void *ioaddr = tp->mmio_addr;
1485 /* This is a complicated state machine to configure the "twister" for
1486 impedance/echos based on the cable length.
1487 All of this is magic and undocumented.
1489 switch (tp->twistie) {
1491 if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
1492 /* We have link beat, let us tune the twister. */
1493 RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
1494 tp->twistie = 2; /* Change to state 2. */
1495 next_tick = HZ / 10;
1497 /* Just put in some reasonable defaults for when beat returns. */
1498 RTL_W16 (CSCR, CSCR_LinkDownCmd);
1499 RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */
1500 RTL_W32 (PARA78, PARA78_default);
1501 RTL_W32 (PARA7c, PARA7c_default);
1502 tp->twistie = 0; /* Bail from future actions. */
1506 /* Read how long it took to hear the echo. */
1507 linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
1508 if (linkcase == 0x7000)
1510 else if (linkcase == 0x3000)
1512 else if (linkcase == 0x1000)
1517 tp->twistie = 3; /* Change to state 2. */
1518 next_tick = HZ / 10;
1521 /* Put out four tuning parameters, one per 100msec. */
1522 if (tp->twist_col == 0)
1523 RTL_W16 (FIFOTMS, 0);
1524 RTL_W32 (PARA7c, param[(int) tp->twist_row]
1525 [(int) tp->twist_col]);
1526 next_tick = HZ / 10;
1527 if (++tp->twist_col >= 4) {
1528 /* For short cables we are done.
1529 For long cables (row == 3) check for mistune. */
1531 (tp->twist_row == 3) ? 4 : 0;
1535 /* Special case for long cables: check for mistune. */
1536 if ((RTL_R16 (CSCR) &
1537 CSCR_LinkStatusBits) == 0x7000) {
1541 RTL_W32 (PARA7c, 0xfb38de03);
1543 next_tick = HZ / 10;
1547 /* Retune for shorter cable (column 2). */
1548 RTL_W32 (FIFOTMS, 0x20);
1549 RTL_W32 (PARA78, PARA78_default);
1550 RTL_W32 (PARA7c, PARA7c_default);
1551 RTL_W32 (FIFOTMS, 0x00);
1555 next_tick = HZ / 10;
1563 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
1565 static inline void rtl8139_thread_iter (struct net_device *dev,
1566 struct rtl8139_private *tp,
1571 mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
1573 if (!tp->mii.force_media && mii_lpa != 0xffff) {
1574 int duplex = (mii_lpa & LPA_100FULL)
1575 || (mii_lpa & 0x01C0) == 0x0040;
1576 if (tp->mii.full_duplex != duplex) {
1577 tp->mii.full_duplex = duplex;
1581 "%s: Setting %s-duplex based on MII #%d link"
1582 " partner ability of %4.4x.\n",
1584 tp->mii.full_duplex ? "full" : "half",
1585 tp->phys[0], mii_lpa);
1587 printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
1591 RTL_W8 (Cfg9346, Cfg9346_Unlock);
1592 RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
1593 RTL_W8 (Cfg9346, Cfg9346_Lock);
1598 next_tick = HZ * 60;
1600 rtl8139_tune_twister (dev, tp);
1602 DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
1603 dev->name, RTL_R16 (NWayLPAR));
1604 DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n",
1605 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
1606 DPRINTK ("%s: Chip config %2.2x %2.2x.\n",
1607 dev->name, RTL_R8 (Config0),
1611 static int rtl8139_thread (void *data)
1613 struct net_device *dev = data;
1614 struct rtl8139_private *tp = dev->priv;
1615 unsigned long timeout;
1617 daemonize("%s", dev->name);
1618 allow_signal(SIGTERM);
1621 timeout = next_tick;
1623 timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout);
1624 /* make swsusp happy with our thread */
1625 if (current->flags & PF_FREEZE)
1626 refrigerator(PF_FREEZE);
1627 } while (!signal_pending (current) && (timeout > 0));
1629 if (signal_pending (current)) {
1630 flush_signals(current);
1633 if (tp->time_to_die)
1637 rtl8139_thread_iter (dev, tp, tp->mmio_addr);
1641 complete_and_exit (&tp->thr_exited, 0);
1644 static inline void rtl8139_start_thread(struct net_device *dev)
1646 struct rtl8139_private *tp = dev->priv;
1650 tp->time_to_die = 0;
1651 if (tp->chipset == CH_8139_K)
1653 else if (tp->drv_flags & HAS_LNK_CHNG)
1656 tp->thr_pid = kernel_thread(rtl8139_thread, dev, CLONE_FS|CLONE_FILES);
1657 if (tp->thr_pid < 0) {
1658 printk (KERN_WARNING "%s: unable to start kernel thread\n",
1663 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
1668 /* XXX account for unsent Tx packets in tp->stats.tx_dropped */
1672 static void rtl8139_tx_timeout (struct net_device *dev)
1674 struct rtl8139_private *tp = dev->priv;
1675 void *ioaddr = tp->mmio_addr;
1678 unsigned long flags;
1680 DPRINTK ("%s: Transmit timeout, status %2.2x %4.4x "
1681 "media %2.2x.\n", dev->name,
1683 RTL_R16 (IntrStatus),
1684 RTL_R8 (MediaStatus));
1686 tp->xstats.tx_timeouts++;
1688 /* disable Tx ASAP, if not already */
1689 tmp8 = RTL_R8 (ChipCmd);
1690 if (tmp8 & CmdTxEnb)
1691 RTL_W8 (ChipCmd, CmdRxEnb);
1693 spin_lock(&tp->rx_lock);
1694 /* Disable interrupts by clearing the interrupt mask. */
1695 RTL_W16 (IntrMask, 0x0000);
1697 /* Emit info to figure out what went wrong. */
1698 printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n",
1699 dev->name, tp->cur_tx, tp->dirty_tx);
1700 for (i = 0; i < NUM_TX_DESC; i++)
1701 printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n",
1702 dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
1703 i == tp->dirty_tx % NUM_TX_DESC ?
1704 " (queue head)" : "");
1706 /* Stop a shared interrupt from scavenging while we are. */
1707 spin_lock_irqsave (&tp->lock, flags);
1708 rtl8139_tx_clear (tp);
1709 spin_unlock_irqrestore (&tp->lock, flags);
1711 /* ...and finally, reset everything */
1712 if (netif_running(dev)) {
1713 rtl8139_hw_start (dev);
1714 netif_wake_queue (dev);
1716 spin_unlock(&tp->rx_lock);
1721 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
1723 struct rtl8139_private *tp = dev->priv;
1724 void *ioaddr = tp->mmio_addr;
1726 unsigned int len = skb->len;
1728 /* Calculate the next Tx descriptor entry. */
1729 entry = tp->cur_tx % NUM_TX_DESC;
1731 /* Note: the chip doesn't have auto-pad! */
1732 if (likely(len < TX_BUF_SIZE)) {
1734 memset(tp->tx_buf[entry], 0, ETH_ZLEN);
1735 skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
1739 tp->stats.tx_dropped++;
1743 spin_lock_irq(&tp->lock);
1744 RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
1745 tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
1747 dev->trans_start = jiffies;
1752 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
1753 netif_stop_queue (dev);
1754 spin_unlock_irq(&tp->lock);
1756 if (netif_msg_tx_queued(tp))
1757 printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
1758 dev->name, len, entry);
1764 static void rtl8139_tx_interrupt (struct net_device *dev,
1765 struct rtl8139_private *tp,
1768 unsigned long dirty_tx, tx_left;
1770 assert (dev != NULL);
1771 assert (tp != NULL);
1772 assert (ioaddr != NULL);
1774 dirty_tx = tp->dirty_tx;
1775 tx_left = tp->cur_tx - dirty_tx;
1776 while (tx_left > 0) {
1777 int entry = dirty_tx % NUM_TX_DESC;
1780 txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
1782 if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
1783 break; /* It still hasn't been Txed */
1785 /* Note: TxCarrierLost is always asserted at 100mbps. */
1786 if (txstatus & (TxOutOfWindow | TxAborted)) {
1787 /* There was an major error, log it. */
1788 if (netif_msg_tx_err(tp))
1789 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
1790 dev->name, txstatus);
1791 tp->stats.tx_errors++;
1792 if (txstatus & TxAborted) {
1793 tp->stats.tx_aborted_errors++;
1794 RTL_W32 (TxConfig, TxClearAbt);
1795 RTL_W16 (IntrStatus, TxErr);
1798 if (txstatus & TxCarrierLost)
1799 tp->stats.tx_carrier_errors++;
1800 if (txstatus & TxOutOfWindow)
1801 tp->stats.tx_window_errors++;
1803 if (txstatus & TxUnderrun) {
1804 /* Add 64 to the Tx FIFO threshold. */
1805 if (tp->tx_flag < 0x00300000)
1806 tp->tx_flag += 0x00020000;
1807 tp->stats.tx_fifo_errors++;
1809 tp->stats.collisions += (txstatus >> 24) & 15;
1810 tp->stats.tx_bytes += txstatus & 0x7ff;
1811 tp->stats.tx_packets++;
1818 #ifndef RTL8139_NDEBUG
1819 if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
1820 printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
1821 dev->name, dirty_tx, tp->cur_tx);
1822 dirty_tx += NUM_TX_DESC;
1824 #endif /* RTL8139_NDEBUG */
1826 /* only wake the queue if we did work, and the queue is stopped */
1827 if (tp->dirty_tx != dirty_tx) {
1828 tp->dirty_tx = dirty_tx;
1830 netif_wake_queue (dev);
1835 /* TODO: clean this up! Rx reset need not be this intensive */
1836 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
1837 struct rtl8139_private *tp, void *ioaddr)
1840 #ifdef CONFIG_8139_OLD_RX_RESET
1844 if (netif_msg_rx_err (tp))
1845 printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
1846 dev->name, rx_status);
1847 tp->stats.rx_errors++;
1848 if (!(rx_status & RxStatusOK)) {
1849 if (rx_status & RxTooLong) {
1850 DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
1851 dev->name, rx_status);
1852 /* A.C.: The chip hangs here. */
1854 if (rx_status & (RxBadSymbol | RxBadAlign))
1855 tp->stats.rx_frame_errors++;
1856 if (rx_status & (RxRunt | RxTooLong))
1857 tp->stats.rx_length_errors++;
1858 if (rx_status & RxCRCErr)
1859 tp->stats.rx_crc_errors++;
1861 tp->xstats.rx_lost_in_ring++;
1864 #ifndef CONFIG_8139_OLD_RX_RESET
1865 tmp8 = RTL_R8 (ChipCmd);
1866 RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
1867 RTL_W8 (ChipCmd, tmp8);
1868 RTL_W32 (RxConfig, tp->rx_config);
1871 /* Reset the receiver, based on RealTek recommendation. (Bug?) */
1873 /* disable receive */
1874 RTL_W8_F (ChipCmd, CmdTxEnb);
1876 while (--tmp_work > 0) {
1878 tmp8 = RTL_R8 (ChipCmd);
1879 if (!(tmp8 & CmdRxEnb))
1883 printk (KERN_WARNING PFX "rx stop wait too long\n");
1884 /* restart receive */
1886 while (--tmp_work > 0) {
1887 RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
1889 tmp8 = RTL_R8 (ChipCmd);
1890 if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
1894 printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
1896 /* and reinitialize all rx related registers */
1897 RTL_W8_F (Cfg9346, Cfg9346_Unlock);
1898 /* Must enable Tx/Rx before setting transfer thresholds! */
1899 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
1901 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
1902 RTL_W32 (RxConfig, tp->rx_config);
1905 DPRINTK("init buffer addresses\n");
1907 /* Lock Config[01234] and BMCR register writes */
1908 RTL_W8 (Cfg9346, Cfg9346_Lock);
1910 /* init Rx ring buffer DMA address */
1911 RTL_W32_F (RxBuf, tp->rx_ring_dma);
1913 /* A.C.: Reset the multicast list. */
1914 __set_rx_mode (dev);
1919 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
1920 u32 offset, unsigned int size)
1922 u32 left = RX_BUF_LEN - offset;
1925 memcpy(skb->data, ring + offset, left);
1926 memcpy(skb->data+left, ring, size - left);
1928 memcpy(skb->data, ring + offset, size);
1932 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
1935 void *ioaddr = tp->mmio_addr;
1937 unsigned char *rx_ring = tp->rx_ring;
1938 unsigned int cur_rx = tp->cur_rx;
1940 DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
1941 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
1942 RTL_R16 (RxBufAddr),
1943 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
1945 while (netif_running(dev) && received < budget
1946 && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
1947 u32 ring_offset = cur_rx % RX_BUF_LEN;
1949 unsigned int rx_size;
1950 unsigned int pkt_size;
1951 struct sk_buff *skb;
1956 /* read size+status of next frame from DMA ring buffer */
1957 rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
1958 rx_size = rx_status >> 16;
1959 pkt_size = rx_size - 4;
1961 if (netif_msg_rx_status(tp))
1962 printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x,"
1963 " cur %4.4x.\n", dev->name, rx_status,
1965 #if RTL8139_DEBUG > 2
1968 DPRINTK ("%s: Frame contents ", dev->name);
1969 for (i = 0; i < 70; i++)
1971 rx_ring[ring_offset + i]);
1976 /* Packet copy from FIFO still in progress.
1977 * Theoretically, this should never happen
1978 * since EarlyRx is disabled.
1980 if (unlikely(rx_size == 0xfff0)) {
1981 tp->xstats.early_rx++;
1985 /* If Rx err or invalid rx_size/rx_status received
1986 * (which happens if we get lost in the ring),
1987 * Rx process gets reset, so we abort any further
1990 if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
1992 (!(rx_status & RxStatusOK)))) {
1993 rtl8139_rx_err (rx_status, dev, tp, ioaddr);
1997 /* Malloc up new buffer, compatible with net-2e. */
1998 /* Omit the four octet CRC from the length. */
2000 skb = dev_alloc_skb (pkt_size + 2);
2003 skb_reserve (skb, 2); /* 16 byte align the IP fields. */
2005 wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
2007 eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0);
2009 skb_put (skb, pkt_size);
2011 skb->protocol = eth_type_trans (skb, dev);
2013 dev->last_rx = jiffies;
2014 tp->stats.rx_bytes += pkt_size;
2015 tp->stats.rx_packets++;
2017 netif_receive_skb (skb);
2019 if (net_ratelimit())
2020 printk (KERN_WARNING
2021 "%s: Memory squeeze, dropping packet.\n",
2023 tp->stats.rx_dropped++;
2027 cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
2028 RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
2030 /* Clear out errors and receive interrupts */
2031 status = RTL_R16 (IntrStatus) & RxAckBits;
2032 if (likely(status != 0)) {
2033 if (unlikely(status & (RxFIFOOver | RxOverflow))) {
2034 tp->stats.rx_errors++;
2035 if (status & RxFIFOOver)
2036 tp->stats.rx_fifo_errors++;
2038 RTL_W16_F (IntrStatus, RxAckBits);
2044 #if RTL8139_DEBUG > 1
2045 DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
2046 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
2047 RTL_R16 (RxBufAddr),
2048 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
2051 tp->cur_rx = cur_rx;
2056 static void rtl8139_weird_interrupt (struct net_device *dev,
2057 struct rtl8139_private *tp,
2059 int status, int link_changed)
2061 DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
2064 assert (dev != NULL);
2065 assert (tp != NULL);
2066 assert (ioaddr != NULL);
2068 /* Update the error count. */
2069 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2070 RTL_W32 (RxMissed, 0);
2072 if ((status & RxUnderrun) && link_changed &&
2073 (tp->drv_flags & HAS_LNK_CHNG)) {
2074 rtl_check_media(dev, 0);
2075 status &= ~RxUnderrun;
2078 if (status & (RxUnderrun | RxErr))
2079 tp->stats.rx_errors++;
2081 if (status & PCSTimeout)
2082 tp->stats.rx_length_errors++;
2083 if (status & RxUnderrun)
2084 tp->stats.rx_fifo_errors++;
2085 if (status & PCIErr) {
2087 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
2088 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
2090 printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
2091 dev->name, pci_cmd_status);
2095 static int rtl8139_poll(struct net_device *dev, int *budget)
2097 struct rtl8139_private *tp = dev->priv;
2098 void *ioaddr = tp->mmio_addr;
2099 int orig_budget = min(*budget, dev->quota);
2102 spin_lock(&tp->rx_lock);
2103 if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
2106 work_done = rtl8139_rx(dev, tp, orig_budget);
2107 if (likely(work_done > 0)) {
2108 *budget -= work_done;
2109 dev->quota -= work_done;
2110 done = (work_done < orig_budget);
2116 * Order is important since data can get interrupted
2117 * again when we think we are done.
2119 local_irq_disable();
2120 RTL_W16_F(IntrMask, rtl8139_intr_mask);
2121 __netif_rx_complete(dev);
2124 spin_unlock(&tp->rx_lock);
2129 /* The interrupt handler does all of the Rx thread work and cleans up
2130 after the Tx thread. */
2131 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
2132 struct pt_regs *regs)
2134 struct net_device *dev = (struct net_device *) dev_instance;
2135 struct rtl8139_private *tp = dev->priv;
2136 void *ioaddr = tp->mmio_addr;
2137 u16 status, ackstat;
2138 int link_changed = 0; /* avoid bogus "uninit" warning */
2141 spin_lock (&tp->lock);
2142 status = RTL_R16 (IntrStatus);
2145 if (unlikely((status & rtl8139_intr_mask) == 0))
2150 /* h/w no longer present (hotplug?) or major error, bail */
2151 if (unlikely(status == 0xFFFF))
2154 /* close possible race's with dev_close */
2155 if (unlikely(!netif_running(dev))) {
2156 RTL_W16 (IntrMask, 0);
2160 /* Acknowledge all of the current interrupt sources ASAP, but
2161 an first get an additional status bit from CSCR. */
2162 if (unlikely(status & RxUnderrun))
2163 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
2165 ackstat = status & ~(RxAckBits | TxErr);
2167 RTL_W16 (IntrStatus, ackstat);
2169 /* Receive packets are processed by poll routine.
2170 If not running start it now. */
2171 if (status & RxAckBits){
2172 if (netif_rx_schedule_prep(dev)) {
2173 RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
2174 __netif_rx_schedule (dev);
2178 /* Check uncommon events with one test. */
2179 if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
2180 rtl8139_weird_interrupt (dev, tp, ioaddr,
2181 status, link_changed);
2183 if (status & (TxOK | TxErr)) {
2184 rtl8139_tx_interrupt (dev, tp, ioaddr);
2186 RTL_W16 (IntrStatus, TxErr);
2189 spin_unlock (&tp->lock);
2191 DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
2192 dev->name, RTL_R16 (IntrStatus));
2193 return IRQ_RETVAL(handled);
2196 #ifdef CONFIG_NET_POLL_CONTROLLER
2198 * Polling receive - used by netconsole and other diagnostic tools
2199 * to allow network i/o with interrupts disabled.
2201 static void rtl8139_poll_controller(struct net_device *dev)
2203 disable_irq(dev->irq);
2204 rtl8139_interrupt(dev->irq, dev, NULL);
2205 enable_irq(dev->irq);
2209 static int rtl8139_close (struct net_device *dev)
2211 struct rtl8139_private *tp = dev->priv;
2212 void *ioaddr = tp->mmio_addr;
2214 unsigned long flags;
2216 netif_stop_queue (dev);
2218 if (tp->thr_pid >= 0) {
2219 tp->time_to_die = 1;
2221 ret = kill_proc (tp->thr_pid, SIGTERM, 1);
2223 printk (KERN_ERR "%s: unable to signal thread\n", dev->name);
2226 wait_for_completion (&tp->thr_exited);
2229 if (netif_msg_ifdown(tp))
2230 printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
2231 dev->name, RTL_R16 (IntrStatus));
2233 spin_lock_irqsave (&tp->lock, flags);
2235 /* Stop the chip's Tx and Rx DMA processes. */
2236 RTL_W8 (ChipCmd, 0);
2238 /* Disable interrupts by clearing the interrupt mask. */
2239 RTL_W16 (IntrMask, 0);
2241 /* Update the error counts. */
2242 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2243 RTL_W32 (RxMissed, 0);
2245 spin_unlock_irqrestore (&tp->lock, flags);
2247 synchronize_irq (dev->irq); /* racy, but that's ok here */
2248 free_irq (dev->irq, dev);
2250 rtl8139_tx_clear (tp);
2252 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
2253 tp->rx_ring, tp->rx_ring_dma);
2254 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
2255 tp->tx_bufs, tp->tx_bufs_dma);
2259 /* Green! Put the chip in low-power mode. */
2260 RTL_W8 (Cfg9346, Cfg9346_Unlock);
2262 if (rtl_chip_info[tp->chipset].flags & HasHltClk)
2263 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */
2269 /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to
2270 kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
2271 other threads or interrupts aren't messing with the 8139. */
2272 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2274 struct rtl8139_private *np = dev->priv;
2275 void *ioaddr = np->mmio_addr;
2277 spin_lock_irq(&np->lock);
2278 if (rtl_chip_info[np->chipset].flags & HasLWake) {
2279 u8 cfg3 = RTL_R8 (Config3);
2280 u8 cfg5 = RTL_R8 (Config5);
2282 wol->supported = WAKE_PHY | WAKE_MAGIC
2283 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
2286 if (cfg3 & Cfg3_LinkUp)
2287 wol->wolopts |= WAKE_PHY;
2288 if (cfg3 & Cfg3_Magic)
2289 wol->wolopts |= WAKE_MAGIC;
2290 /* (KON)FIXME: See how netdev_set_wol() handles the
2291 following constants. */
2292 if (cfg5 & Cfg5_UWF)
2293 wol->wolopts |= WAKE_UCAST;
2294 if (cfg5 & Cfg5_MWF)
2295 wol->wolopts |= WAKE_MCAST;
2296 if (cfg5 & Cfg5_BWF)
2297 wol->wolopts |= WAKE_BCAST;
2299 spin_unlock_irq(&np->lock);
2303 /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes
2304 that wol points to kernel memory and other threads or interrupts
2305 aren't messing with the 8139. */
2306 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2308 struct rtl8139_private *np = dev->priv;
2309 void *ioaddr = np->mmio_addr;
2313 support = ((rtl_chip_info[np->chipset].flags & HasLWake)
2314 ? (WAKE_PHY | WAKE_MAGIC
2315 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
2317 if (wol->wolopts & ~support)
2320 spin_lock_irq(&np->lock);
2321 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
2322 if (wol->wolopts & WAKE_PHY)
2323 cfg3 |= Cfg3_LinkUp;
2324 if (wol->wolopts & WAKE_MAGIC)
2326 RTL_W8 (Cfg9346, Cfg9346_Unlock);
2327 RTL_W8 (Config3, cfg3);
2328 RTL_W8 (Cfg9346, Cfg9346_Lock);
2330 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
2331 /* (KON)FIXME: These are untested. We may have to set the
2332 CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
2334 if (wol->wolopts & WAKE_UCAST)
2336 if (wol->wolopts & WAKE_MCAST)
2338 if (wol->wolopts & WAKE_BCAST)
2340 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */
2341 spin_unlock_irq(&np->lock);
2346 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2348 struct rtl8139_private *np = dev->priv;
2349 strcpy(info->driver, DRV_NAME);
2350 strcpy(info->version, DRV_VERSION);
2351 strcpy(info->bus_info, pci_name(np->pci_dev));
2352 info->regdump_len = np->regs_len;
2355 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2357 struct rtl8139_private *np = dev->priv;
2358 spin_lock_irq(&np->lock);
2359 mii_ethtool_gset(&np->mii, cmd);
2360 spin_unlock_irq(&np->lock);
2364 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2366 struct rtl8139_private *np = dev->priv;
2368 spin_lock_irq(&np->lock);
2369 rc = mii_ethtool_sset(&np->mii, cmd);
2370 spin_unlock_irq(&np->lock);
2374 static int rtl8139_nway_reset(struct net_device *dev)
2376 struct rtl8139_private *np = dev->priv;
2377 return mii_nway_restart(&np->mii);
2380 static u32 rtl8139_get_link(struct net_device *dev)
2382 struct rtl8139_private *np = dev->priv;
2383 return mii_link_ok(&np->mii);
2386 static u32 rtl8139_get_msglevel(struct net_device *dev)
2388 struct rtl8139_private *np = dev->priv;
2389 return np->msg_enable;
2392 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
2394 struct rtl8139_private *np = dev->priv;
2395 np->msg_enable = datum;
2398 /* TODO: we are too slack to do reg dumping for pio, for now */
2399 #ifdef CONFIG_8139TOO_PIO
2400 #define rtl8139_get_regs_len NULL
2401 #define rtl8139_get_regs NULL
2403 static int rtl8139_get_regs_len(struct net_device *dev)
2405 struct rtl8139_private *np = dev->priv;
2406 return np->regs_len;
2409 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
2411 struct rtl8139_private *np = dev->priv;
2413 regs->version = RTL_REGS_VER;
2415 spin_lock_irq(&np->lock);
2416 memcpy_fromio(regbuf, np->mmio_addr, regs->len);
2417 spin_unlock_irq(&np->lock);
2419 #endif /* CONFIG_8139TOO_MMIO */
2421 static int rtl8139_get_stats_count(struct net_device *dev)
2423 return RTL_NUM_STATS;
2426 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2428 struct rtl8139_private *np = dev->priv;
2430 data[0] = np->xstats.early_rx;
2431 data[1] = np->xstats.tx_buf_mapped;
2432 data[2] = np->xstats.tx_timeouts;
2433 data[3] = np->xstats.rx_lost_in_ring;
2436 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2438 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2441 static struct ethtool_ops rtl8139_ethtool_ops = {
2442 .get_drvinfo = rtl8139_get_drvinfo,
2443 .get_settings = rtl8139_get_settings,
2444 .set_settings = rtl8139_set_settings,
2445 .get_regs_len = rtl8139_get_regs_len,
2446 .get_regs = rtl8139_get_regs,
2447 .nway_reset = rtl8139_nway_reset,
2448 .get_link = rtl8139_get_link,
2449 .get_msglevel = rtl8139_get_msglevel,
2450 .set_msglevel = rtl8139_set_msglevel,
2451 .get_wol = rtl8139_get_wol,
2452 .set_wol = rtl8139_set_wol,
2453 .get_strings = rtl8139_get_strings,
2454 .get_stats_count = rtl8139_get_stats_count,
2455 .get_ethtool_stats = rtl8139_get_ethtool_stats,
2458 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2460 struct rtl8139_private *np = dev->priv;
2461 struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
2464 if (!netif_running(dev))
2467 spin_lock_irq(&np->lock);
2468 rc = generic_mii_ioctl(&np->mii, data, cmd, NULL);
2469 spin_unlock_irq(&np->lock);
2475 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
2477 struct rtl8139_private *tp = dev->priv;
2478 void *ioaddr = tp->mmio_addr;
2479 unsigned long flags;
2481 if (netif_running(dev)) {
2482 spin_lock_irqsave (&tp->lock, flags);
2483 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2484 RTL_W32 (RxMissed, 0);
2485 spin_unlock_irqrestore (&tp->lock, flags);
2491 /* Set or clear the multicast filter for this adaptor.
2492 This routine is not state sensitive and need not be SMP locked. */
2494 static void __set_rx_mode (struct net_device *dev)
2496 struct rtl8139_private *tp = dev->priv;
2497 void *ioaddr = tp->mmio_addr;
2498 u32 mc_filter[2]; /* Multicast hash filter */
2502 DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
2503 dev->name, dev->flags, RTL_R32 (RxConfig));
2505 /* Note: do not reorder, GCC is clever about common statements. */
2506 if (dev->flags & IFF_PROMISC) {
2507 /* Unconditionally log net taps. */
2508 printk (KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2511 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2513 mc_filter[1] = mc_filter[0] = 0xffffffff;
2514 } else if ((dev->mc_count > multicast_filter_limit)
2515 || (dev->flags & IFF_ALLMULTI)) {
2516 /* Too many to filter perfectly -- accept all multicasts. */
2517 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2518 mc_filter[1] = mc_filter[0] = 0xffffffff;
2520 struct dev_mc_list *mclist;
2521 rx_mode = AcceptBroadcast | AcceptMyPhys;
2522 mc_filter[1] = mc_filter[0] = 0;
2523 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2524 i++, mclist = mclist->next) {
2525 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2527 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2528 rx_mode |= AcceptMulticast;
2532 /* We can safely update without stopping the chip. */
2533 tmp = rtl8139_rx_config | rx_mode;
2534 if (tp->rx_config != tmp) {
2535 RTL_W32_F (RxConfig, tmp);
2536 tp->rx_config = tmp;
2538 RTL_W32_F (MAR0 + 0, mc_filter[0]);
2539 RTL_W32_F (MAR0 + 4, mc_filter[1]);
2542 static void rtl8139_set_rx_mode (struct net_device *dev)
2544 unsigned long flags;
2545 struct rtl8139_private *tp = dev->priv;
2547 spin_lock_irqsave (&tp->lock, flags);
2549 spin_unlock_irqrestore (&tp->lock, flags);
2554 static int rtl8139_suspend (struct pci_dev *pdev, u32 state)
2556 struct net_device *dev = pci_get_drvdata (pdev);
2557 struct rtl8139_private *tp = dev->priv;
2558 void *ioaddr = tp->mmio_addr;
2559 unsigned long flags;
2561 if (!netif_running (dev))
2564 netif_device_detach (dev);
2566 spin_lock_irqsave (&tp->lock, flags);
2568 /* Disable interrupts, stop Tx and Rx. */
2569 RTL_W16 (IntrMask, 0);
2570 RTL_W8 (ChipCmd, 0);
2572 /* Update the error counts. */
2573 tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
2574 RTL_W32 (RxMissed, 0);
2576 spin_unlock_irqrestore (&tp->lock, flags);
2578 pci_set_power_state (pdev, 3);
2579 pci_save_state (pdev, tp->pci_state);
2585 static int rtl8139_resume (struct pci_dev *pdev)
2587 struct net_device *dev = pci_get_drvdata (pdev);
2588 struct rtl8139_private *tp = dev->priv;
2590 if (!netif_running (dev))
2592 pci_restore_state (pdev, tp->pci_state);
2593 pci_set_power_state (pdev, 0);
2594 rtl8139_init_ring (dev);
2595 rtl8139_hw_start (dev);
2596 netif_device_attach (dev);
2600 #endif /* CONFIG_PM */
2603 static struct pci_driver rtl8139_pci_driver = {
2605 .id_table = rtl8139_pci_tbl,
2606 .probe = rtl8139_init_one,
2607 .remove = __devexit_p(rtl8139_remove_one),
2609 .suspend = rtl8139_suspend,
2610 .resume = rtl8139_resume,
2611 #endif /* CONFIG_PM */
2615 static int __init rtl8139_init_module (void)
2617 /* when we're a module, we always print a version message,
2618 * even if no 8139 board is found.
2621 printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
2624 return pci_module_init (&rtl8139_pci_driver);
2628 static void __exit rtl8139_cleanup_module (void)
2630 pci_unregister_driver (&rtl8139_pci_driver);
2634 module_init(rtl8139_init_module);
2635 module_exit(rtl8139_cleanup_module);