2 drivers/net/tulip/tulip.h
4 Copyright 2000,2001 The Linux Kernel Team
5 Written/copyright 1994-2001 by Donald Becker.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
10 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
11 for more information on this driver, or visit the project
12 Web page at http://sourceforge.net/projects/tulip/
16 #ifndef __NET_TULIP_H__
17 #define __NET_TULIP_H__
19 #include <linux/config.h>
20 #include <linux/kernel.h>
21 #include <linux/types.h>
22 #include <linux/spinlock.h>
23 #include <linux/netdevice.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
31 /* undefine, or define to various debugging levels (>4 == obscene levels) */
34 /* undefine USE_IO_OPS for MMIO, define for PIO */
35 #ifdef CONFIG_TULIP_MMIO
43 struct tulip_chip_table {
46 int valid_intrs; /* CSR7 interrupt enable settings */
48 void (*media_timer) (unsigned long data);
54 HAS_MEDIA_TABLE = 0x0002,
55 CSR12_IN_SROM = 0x0004,
56 ALWAYS_CHECK_MII = 0x0008,
58 MC_HASH_ONLY = 0x0020, /* Hash-only multicast filter. */
59 HAS_PNICNWAY = 0x0080,
60 HAS_NWAY = 0x0040, /* Uses internal NWay xcvr. */
61 HAS_INTR_MITIGATION = 0x0100,
64 COMET_MAC_ADDR = 0x0800,
70 /* chip types. careful! order is VERY IMPORTANT here, as these
71 * are used throughout the driver as indices into arrays */
72 /* Note 21142 == 21143. */
77 DC21142 = 3, DC21143 = 3,
101 /* Offsets to the Command and Status Registers, "CSRs". All accesses
102 must be longword instructions and quadword aligned. */
122 /* register offset and bits for CFDD PCI config reg */
123 enum pci_cfg_driver_reg {
125 CFDD_Sleep = (1 << 31),
126 CFDD_Snooze = (1 << 30),
129 #define RxPollInt (RxIntr|RxNoBuf|RxDied|RxJabber)
131 /* The bits in the CSR5 status registers, mostly interrupt sources. */
137 NormalIntr = 0x10000,
138 AbnormalIntr = 0x8000,
143 TxFIFOUnderflow = 0x20,
151 enum tulip_mode_bits {
152 TxThreshold = (1 << 22),
153 FullDuplex = (1 << 9),
155 AcceptBroadcast = 0x0100,
156 AcceptAllMulticast = 0x0080,
157 AcceptAllPhys = 0x0040,
160 RxTx = (TxOn | RxOn),
164 enum tulip_busconfig_bits {
173 /* The Tulip Rx and Tx buffer descriptors. */
174 struct tulip_rx_desc {
182 struct tulip_tx_desc {
186 u32 buffer2; /* We use only buffer 1. */
190 enum desc_status_bits {
191 DescOwned = 0x80000000,
192 RxDescFatalErr = 0x8000,
197 enum t21143_csr6_bits {
200 csr6_ign_dest_msb = (1<<26),
202 csr6_scr = (1<<24), /* scramble mode flag: can't be set */
203 csr6_pcs = (1<<23), /* Enables PCS functions (symbol mode requires csr6_ps be set) default is set */
204 csr6_ttm = (1<<22), /* Transmit Threshold Mode, set for 10baseT, 0 for 100BaseTX */
205 csr6_sf = (1<<21), /* Store and forward. If set ignores TR bits */
206 csr6_hbd = (1<<19), /* Heart beat disable. Disables SQE function in 10baseT */
207 csr6_ps = (1<<18), /* Port Select. 0 (defualt) = 10baseT, 1 = 100baseTX: can't be set */
208 csr6_ca = (1<<17), /* Collision Offset Enable. If set uses special algorithm in low collision situations */
209 csr6_trh = (1<<15), /* Transmit Threshold high bit */
210 csr6_trl = (1<<14), /* Transmit Threshold low bit */
212 /***************************************************************
213 * This table shows transmit threshold values based on media *
214 * and these two registers (from PNIC1 & 2 docs) Note: this is *
215 * all meaningless if sf is set. *
216 ***************************************************************/
218 /***********************************
219 * (trh,trl) * 100BaseTX * 10BaseT *
220 ***********************************
223 * (1,0) * 512 * 128 *
224 * (1,1) * 1024 * 160 *
225 ***********************************/
227 csr6_fc = (1<<12), /* Forces a collision in next transmission (for testing in loopback mode) */
228 csr6_om_int_loop = (1<<10), /* internal (FIFO) loopback flag */
229 csr6_om_ext_loop = (1<<11), /* external (PMD) loopback flag */
230 /* set both and you get (PHY) loopback */
231 csr6_fd = (1<<9), /* Full duplex mode, disables hearbeat, no loopback */
232 csr6_pm = (1<<7), /* Pass All Multicast */
233 csr6_pr = (1<<6), /* Promiscuous mode */
234 csr6_sb = (1<<5), /* Start(1)/Stop(0) backoff counter */
235 csr6_if = (1<<4), /* Inverse Filtering, rejects only addresses in address table: can't be set */
236 csr6_pb = (1<<3), /* Pass Bad Frames, (1) causes even bad frames to be passed on */
237 csr6_ho = (1<<2), /* Hash-only filtering mode: can't be set */
238 csr6_hp = (1<<0), /* Hash/Perfect Receive Filtering Mode: can't be set */
240 csr6_mask_capture = (csr6_sc | csr6_ca),
241 csr6_mask_defstate = (csr6_mask_capture | csr6_mbo),
242 csr6_mask_hdcap = (csr6_mask_defstate | csr6_hbd | csr6_ps),
243 csr6_mask_hdcaptt = (csr6_mask_hdcap | csr6_trh | csr6_trl),
244 csr6_mask_fullcap = (csr6_mask_hdcaptt | csr6_fd),
245 csr6_mask_fullpromisc = (csr6_pr | csr6_pm),
246 csr6_mask_filters = (csr6_hp | csr6_ho | csr6_if),
247 csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd),
251 /* Keep the ring sizes a power of two for efficiency.
252 Making the Tx ring too large decreases the effectiveness of channel
253 bonding and packet priority.
254 There are no ill effects from too-large receive rings. */
256 #define TX_RING_SIZE 32
257 #define RX_RING_SIZE 128
258 #define MEDIA_MASK 31
260 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
262 #define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */
264 #if defined(__sparc__) || defined(__hppa__)
265 /* The UltraSparc PCI controllers will disconnect at every 64-byte
266 * crossing anyways so it makes no sense to tell Tulip to burst
267 * any more than that.
269 #define TULIP_MAX_CACHE_LINE 16 /* in units of 32-bit words */
271 #define TULIP_MAX_CACHE_LINE 32 /* in units of 32-bit words */
275 /* Ring-wrap flag in length field, use for last ring entry.
276 0x01000000 means chain on buffer2 address,
277 0x02000000 means use the ring start address in CSR2/3.
278 Note: Some work-alike chips do not function correctly in chained mode.
279 The ASIX chip works only in chained mode.
280 Thus we indicates ring mode, but always write the 'next' field for
281 chained mode as well.
283 #define DESC_RING_WRAP 0x02000000
286 #define EEPROM_SIZE 512 /* 2 << EEPROM_ADDRLEN */
289 #define RUN_AT(x) (jiffies + (x))
291 #if defined(__i386__) /* AKA get_unaligned() */
292 #define get_u16(ptr) (*(u16 *)(ptr))
294 #define get_u16(ptr) (((u8*)(ptr))[0] + (((u8*)(ptr))[1]<<8))
300 unsigned char *leafdata;
307 u8 csr12dir; /* General purpose pin directions. */
309 unsigned has_nonmii:1;
310 unsigned has_reset:6;
312 u32 csr15val; /* 21143 NWay setting. */
313 struct medialeaf mleaf[0];
318 struct mediainfo *next;
330 struct tulip_private {
331 const char *product_name;
332 struct net_device *next_module;
333 struct tulip_rx_desc *rx_ring;
334 struct tulip_tx_desc *tx_ring;
335 dma_addr_t rx_ring_dma;
336 dma_addr_t tx_ring_dma;
337 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
338 struct ring_info tx_buffers[TX_RING_SIZE];
339 /* The addresses of receive-in-place skbuffs. */
340 struct ring_info rx_buffers[RX_RING_SIZE];
341 u16 setup_frame[96]; /* Pseudo-Tx frame to init address table. */
345 struct net_device_stats stats;
346 struct timer_list timer; /* Media selection timer. */
347 struct timer_list oom_timer; /* Out of memory timer. */
351 unsigned int cur_rx, cur_tx; /* The next free ring entry */
352 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
354 #ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
357 unsigned int full_duplex:1; /* Full-duplex operation requested. */
358 unsigned int full_duplex_lock:1;
359 unsigned int fake_addr:1; /* Multiport board faked address. */
360 unsigned int default_port:4; /* Last dev->if_port value. */
361 unsigned int media2:4; /* Secondary monitored media port. */
362 unsigned int medialock:1; /* Don't sense media type. */
363 unsigned int mediasense:1; /* Media sensing in progress. */
364 unsigned int nway:1, nwayset:1; /* 21143 internal NWay. */
365 unsigned int csr0; /* CSR0 setting. */
366 unsigned int csr6; /* Current CSR6 control settings. */
367 unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */
368 void (*link_change) (struct net_device * dev, int csr5);
369 u16 sym_advertise, mii_advertise; /* NWay capabilities advertised. */
370 u16 lpar; /* 21143 Link partner ability. */
372 signed char phys[4], mii_cnt; /* MII device addresses. */
373 struct mediatable *mtable;
374 int cur_index; /* Current media index. */
376 struct pci_dev *pdev;
380 unsigned long base_addr;
382 int pad0; /* Used for 8-byte alignment */
386 struct eeprom_fixup {
391 u16 newtable[32]; /* Max length below. */
396 extern u16 t21142_csr14[];
397 void t21142_timer(unsigned long data);
398 void t21142_start_nway(struct net_device *dev);
399 void t21142_lnk_change(struct net_device *dev, int csr5);
403 void pnic2_lnk_change(struct net_device *dev, int csr5);
404 void pnic2_timer(unsigned long data);
405 void pnic2_start_nway(struct net_device *dev);
406 void pnic2_lnk_change(struct net_device *dev, int csr5);
409 void tulip_parse_eeprom(struct net_device *dev);
410 int tulip_read_eeprom(long ioaddr, int location, int addr_len);
413 extern unsigned int tulip_max_interrupt_work;
414 extern int tulip_rx_copybreak;
415 irqreturn_t tulip_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
416 int tulip_refill_rx(struct net_device *dev);
417 #ifdef CONFIG_TULIP_NAPI
418 int tulip_poll(struct net_device *dev, int *budget);
423 int tulip_mdio_read(struct net_device *dev, int phy_id, int location);
424 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int value);
425 void tulip_select_media(struct net_device *dev, int startup);
426 int tulip_check_duplex(struct net_device *dev);
427 void tulip_find_mii (struct net_device *dev, int board_idx);
430 void pnic_do_nway(struct net_device *dev);
431 void pnic_lnk_change(struct net_device *dev, int csr5);
432 void pnic_timer(unsigned long data);
435 void tulip_timer(unsigned long data);
436 void mxic_timer(unsigned long data);
437 void comet_timer(unsigned long data);
440 extern int tulip_debug;
441 extern const char * const medianame[];
442 extern const char tulip_media_cap[];
443 extern struct tulip_chip_table tulip_tbl[];
444 void oom_timer(unsigned long data);
445 extern u8 t21040_csr13[];
454 #define inb(addr) readb((void*)(addr))
455 #define inw(addr) readw((void*)(addr))
456 #define inl(addr) readl((void*)(addr))
457 #define outb(val,addr) writeb((val), (void*)(addr))
458 #define outw(val,addr) writew((val), (void*)(addr))
459 #define outl(val,addr) writel((val), (void*)(addr))
460 #endif /* !USE_IO_OPS */
464 static inline void tulip_start_rxtx(struct tulip_private *tp)
466 long ioaddr = tp->base_addr;
467 outl(tp->csr6 | RxTx, ioaddr + CSR6);
469 (void) inl(ioaddr + CSR6); /* mmio sync */
472 static inline void tulip_stop_rxtx(struct tulip_private *tp)
474 long ioaddr = tp->base_addr;
475 u32 csr6 = inl(ioaddr + CSR6);
478 outl(csr6 & ~RxTx, ioaddr + CSR6);
480 (void) inl(ioaddr + CSR6); /* mmio sync */
484 static inline void tulip_restart_rxtx(struct tulip_private *tp)
488 tulip_start_rxtx(tp);
491 #endif /* __NET_TULIP_H__ */