2 * FarSync X21 driver for Linux (generic HDLC version)
4 * Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards
6 * Copyright (C) 2001 FarSite Communications Ltd.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
14 * Author: R.J.Dunlop <bob.dunlop@farsite.co.uk>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/ioport.h>
21 #include <linux/init.h>
22 #include <asm/uaccess.h>
24 #include <linux/hdlc.h>
32 MODULE_AUTHOR("R.J.Dunlop <bob.dunlop@farsite.co.uk>");
33 MODULE_DESCRIPTION("FarSync T-Series X21 driver. FarSite Communications Ltd.");
34 MODULE_LICENSE("GPL");
36 /* Driver configuration and global parameters
37 * ==========================================
40 /* Number of ports (per card) supported
42 #define FST_MAX_PORTS 4
45 /* PCI vendor and device IDs
47 #define FSC_PCI_VENDOR_ID 0x1619 /* FarSite Communications Ltd */
48 #define T2P_PCI_DEVICE_ID 0x0400 /* T2P X21 2 port card */
49 #define T4P_PCI_DEVICE_ID 0x0440 /* T4P X21 4 port card */
52 /* Default parameters for the link
54 #define FST_TX_QUEUE_LEN 100 /* At 8Mbps a longer queue length is
55 * useful, the syncppp module forces
56 * this down assuming a slower line I
59 #define FST_MAX_MTU 8000 /* Huge but possible */
60 #define FST_DEF_MTU 1500 /* Common sane value */
62 #define FST_TX_TIMEOUT (2*HZ)
66 #define ARPHRD_MYTYPE ARPHRD_RAWHDLC /* Raw frames */
68 #define ARPHRD_MYTYPE ARPHRD_HDLC /* Cisco-HDLC (keepalives etc) */
72 /* Card shared memory layout
73 * =========================
77 /* This information is derived in part from the FarSite FarSync Smc.h
78 * file. Unfortunately various name clashes and the non-portability of the
79 * bit field declarations in that file have meant that I have chosen to
80 * recreate the information here.
82 * The SMC (Shared Memory Configuration) has a version number that is
83 * incremented every time there is a significant change. This number can
84 * be used to check that we have not got out of step with the firmware
85 * contained in the .CDE files.
87 #define SMC_VERSION 11
89 #define FST_MEMSIZE 0x100000 /* Size of card memory (1Mb) */
91 #define SMC_BASE 0x00002000L /* Base offset of the shared memory window main
92 * configuration structure */
93 #define BFM_BASE 0x00010000L /* Base offset of the shared memory window DMA
96 #define LEN_TX_BUFFER 8192 /* Size of packet buffers */
97 #define LEN_RX_BUFFER 8192
99 #define LEN_SMALL_TX_BUFFER 256 /* Size of obsolete buffs used for DOS diags */
100 #define LEN_SMALL_RX_BUFFER 256
102 #define NUM_TX_BUFFER 2 /* Must be power of 2. Fixed by firmware */
103 #define NUM_RX_BUFFER 8
105 /* Interrupt retry time in milliseconds */
106 #define INT_RETRY_TIME 2
109 /* The Am186CH/CC processors support a SmartDMA mode using circular pools
110 * of buffer descriptors. The structure is almost identical to that used
111 * in the LANCE Ethernet controllers. Details available as PDF from the
112 * AMD web site: http://www.amd.com/products/epd/processors/\
113 * 2.16bitcont/3.am186cxfa/a21914/21914.pdf
115 struct txdesc { /* Transmit descriptor */
116 volatile u16 ladr; /* Low order address of packet. This is a
117 * linear address in the Am186 memory space
119 volatile u8 hadr; /* High order address. Low 4 bits only, high 4
122 volatile u8 bits; /* Status and config */
123 volatile u16 bcnt; /* 2s complement of packet size in low 15 bits.
124 * Transmit terminal count interrupt enable in
127 u16 unused; /* Not used in Tx */
130 struct rxdesc { /* Receive descriptor */
131 volatile u16 ladr; /* Low order address of packet */
132 volatile u8 hadr; /* High order address */
133 volatile u8 bits; /* Status and config */
134 volatile u16 bcnt; /* 2s complement of buffer size in low 15 bits.
135 * Receive terminal count interrupt enable in
138 volatile u16 mcnt; /* Message byte count (15 bits) */
141 /* Convert a length into the 15 bit 2's complement */
142 /* #define cnv_bcnt(len) (( ~(len) + 1 ) & 0x7FFF ) */
143 /* Since we need to set the high bit to enable the completion interrupt this
144 * can be made a lot simpler
146 #define cnv_bcnt(len) (-(len))
148 /* Status and config bits for the above */
149 #define DMA_OWN 0x80 /* SmartDMA owns the descriptor */
150 #define TX_STP 0x02 /* Tx: start of packet */
151 #define TX_ENP 0x01 /* Tx: end of packet */
152 #define RX_ERR 0x40 /* Rx: error (OR of next 4 bits) */
153 #define RX_FRAM 0x20 /* Rx: framing error */
154 #define RX_OFLO 0x10 /* Rx: overflow error */
155 #define RX_CRC 0x08 /* Rx: CRC error */
156 #define RX_HBUF 0x04 /* Rx: buffer error */
157 #define RX_STP 0x02 /* Rx: start of packet */
158 #define RX_ENP 0x01 /* Rx: end of packet */
161 /* Interrupts from the card are caused by various events and these are presented
162 * in a circular buffer as several events may be processed on one physical int
164 #define MAX_CIRBUFF 32
167 u8 rdindex; /* read, then increment and wrap */
168 u8 wrindex; /* write, then increment and wrap */
169 u8 evntbuff[MAX_CIRBUFF];
172 /* Interrupt event codes.
173 * Where appropriate the two low order bits indicate the port number
175 #define CTLA_CHG 0x18 /* Control signal changed */
176 #define CTLB_CHG 0x19
177 #define CTLC_CHG 0x1A
178 #define CTLD_CHG 0x1B
180 #define INIT_CPLT 0x20 /* Initialisation complete */
181 #define INIT_FAIL 0x21 /* Initialisation failed */
183 #define ABTA_SENT 0x24 /* Abort sent */
184 #define ABTB_SENT 0x25
185 #define ABTC_SENT 0x26
186 #define ABTD_SENT 0x27
188 #define TXA_UNDF 0x28 /* Transmission underflow */
189 #define TXB_UNDF 0x29
190 #define TXC_UNDF 0x2A
191 #define TXD_UNDF 0x2B
194 /* Port physical configuration. See farsync.h for field values */
196 u16 lineInterface; /* Physical interface type */
197 u8 x25op; /* Unused at present */
198 u8 internalClock; /* 1 => internal clock, 0 => external */
199 u32 lineSpeed; /* Speed in bps */
202 /* Finally sling all the above together into the shared memory structure.
203 * Sorry it's a hodge podge of arrays, structures and unused bits, it's been
204 * evolving under NT for some time so I guess we're stuck with it.
205 * The structure starts at offset SMC_BASE.
206 * See farsync.h for some field values.
209 /* DMA descriptor rings */
210 struct rxdesc rxDescrRing[FST_MAX_PORTS][NUM_RX_BUFFER];
211 struct txdesc txDescrRing[FST_MAX_PORTS][NUM_TX_BUFFER];
213 /* Obsolete small buffers */
214 u8 smallRxBuffer[FST_MAX_PORTS][NUM_RX_BUFFER][LEN_SMALL_RX_BUFFER];
215 u8 smallTxBuffer[FST_MAX_PORTS][NUM_TX_BUFFER][LEN_SMALL_TX_BUFFER];
217 u8 taskStatus; /* 0x00 => initialising, 0x01 => running,
221 u8 interruptHandshake; /* Set to 0x01 by adapter to signal interrupt,
222 * set to 0xEE by host to acknowledge interrupt
225 u16 smcVersion; /* Must match SMC_VERSION */
227 u32 smcFirmwareVersion; /* 0xIIVVRRBB where II = product ID, VV = major
228 * version, RR = revision and BB = build
231 u16 txa_done; /* Obsolete completion flags */
240 u16 mailbox[4]; /* Diagnostics mailbox. Not used */
242 struct cirbuff interruptEvent; /* interrupt causes */
244 u32 v24IpSts[FST_MAX_PORTS]; /* V.24 control input status */
245 u32 v24OpSts[FST_MAX_PORTS]; /* V.24 control output status */
247 struct port_cfg portConfig[FST_MAX_PORTS];
249 u16 clockStatus[FST_MAX_PORTS]; /* lsb: 0=> present, 1=> absent */
251 u16 cableStatus; /* lsb: 0=> present, 1=> absent */
253 u16 txDescrIndex[FST_MAX_PORTS]; /* transmit descriptor ring index */
254 u16 rxDescrIndex[FST_MAX_PORTS]; /* receive descriptor ring index */
256 u16 portMailbox[FST_MAX_PORTS][2]; /* command, modifier */
257 u16 cardMailbox[4]; /* Not used */
259 /* Number of times that card thinks the host has
260 * missed an interrupt by not acknowledging
261 * within 2mS (I guess NT has problems)
263 u32 interruptRetryCount;
265 /* Driver private data used as an ID. We'll not
266 * use this on Linux I'd rather keep such things
267 * in main memory rather than on the PCI bus
269 u32 portHandle[FST_MAX_PORTS];
271 /* Count of Tx underflows for stats */
272 u32 transmitBufferUnderflow[FST_MAX_PORTS];
274 /* Debounced V.24 control input status */
275 u32 v24DebouncedSts[FST_MAX_PORTS];
277 /* Adapter debounce timers. Don't touch */
278 u32 ctsTimer[FST_MAX_PORTS];
279 u32 ctsTimerRun[FST_MAX_PORTS];
280 u32 dcdTimer[FST_MAX_PORTS];
281 u32 dcdTimerRun[FST_MAX_PORTS];
283 u32 numberOfPorts; /* Number of ports detected at startup */
287 u16 cardMode; /* Bit-mask to enable features:
288 * Bit 0: 1 enables LED identify mode
291 u16 portScheduleOffset;
293 u32 endOfSmcSignature; /* endOfSmcSignature MUST be the last member of
294 * the structure and marks the end of the shared
295 * memory. Adapter code initializes its value as
300 /* endOfSmcSignature value */
301 #define END_SIG 0x12345678
303 /* Mailbox values. (portMailbox) */
304 #define NOP 0 /* No operation */
305 #define ACK 1 /* Positive acknowledgement to PC driver */
306 #define NAK 2 /* Negative acknowledgement to PC driver */
307 #define STARTPORT 3 /* Start an HDLC port */
308 #define STOPPORT 4 /* Stop an HDLC port */
309 #define ABORTTX 5 /* Abort the transmitter for a port */
310 #define SETV24O 6 /* Set V24 outputs */
313 /* Larger buffers are positioned in memory at offset BFM_BASE */
315 u8 txBuffer[FST_MAX_PORTS][NUM_TX_BUFFER][LEN_TX_BUFFER];
316 u8 rxBuffer[FST_MAX_PORTS][NUM_RX_BUFFER][LEN_RX_BUFFER];
319 /* Calculate offset of a buffer object within the shared memory window */
320 #define BUF_OFFSET(X) offsetof(struct buf_window, X)
325 /* Device driver private information
326 * =================================
328 /* Per port (line or channel) information
330 struct fst_port_info {
331 struct net_device *dev;
332 struct fst_card_info *card; /* Card we're associated with */
333 int index; /* Port index on the card */
334 int hwif; /* Line hardware (lineInterface copy) */
335 int run; /* Port is running */
336 int rxpos; /* Next Rx buffer to use */
337 int txpos; /* Next Tx buffer to use */
338 int txipos; /* Next Tx buffer to check for free */
339 int txcnt; /* Count of Tx buffers in use */
342 /* Per card information
344 struct fst_card_info {
345 char *mem; /* Card memory mapped to kernel space */
346 char *ctlmem; /* Control memory for PCI cards */
347 unsigned int phys_mem; /* Physical memory window address */
348 unsigned int phys_ctlmem; /* Physical control memory address */
349 unsigned int irq; /* Interrupt request line number */
350 unsigned int nports; /* Number of serial ports */
351 unsigned int type; /* Type index of card */
352 unsigned int state; /* State of card */
353 spinlock_t card_lock; /* Lock for SMP access */
354 unsigned short pci_conf; /* PCI card config in I/O space */
356 struct fst_port_info ports[ FST_MAX_PORTS ];
359 /* Convert an HDLC device pointer into a port info pointer and similar */
360 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
361 #define port_to_dev(P) ((P)->dev)
365 * Shared memory window access macros
367 * We have a nice memory based structure above, which could be directly
368 * mapped on i386 but might not work on other architectures unless we use
369 * the readb,w,l and writeb,w,l macros. Unfortunately these macros take
370 * physical offsets so we have to convert. The only saving grace is that
371 * this should all collapse back to a simple indirection eventually.
373 #define WIN_OFFSET(X) ((long)&(((struct fst_shared *)SMC_BASE)->X))
375 #define FST_RDB(C,E) readb ((C)->mem + WIN_OFFSET(E))
376 #define FST_RDW(C,E) readw ((C)->mem + WIN_OFFSET(E))
377 #define FST_RDL(C,E) readl ((C)->mem + WIN_OFFSET(E))
379 #define FST_WRB(C,E,B) writeb ((B), (C)->mem + WIN_OFFSET(E))
380 #define FST_WRW(C,E,W) writew ((W), (C)->mem + WIN_OFFSET(E))
381 #define FST_WRL(C,E,L) writel ((L), (C)->mem + WIN_OFFSET(E))
389 static int fst_debug_mask = { FST_DEBUG };
391 /* Most common debug activity is to print something if the corresponding bit
392 * is set in the debug mask. Note: this uses a non-ANSI extension in GCC to
393 * support variable numbers of macro parameters. The inverted if prevents us
394 * eating someone else's else clause.
396 #define dbg(F,fmt,A...) if ( ! ( fst_debug_mask & (F))) \
399 printk ( KERN_DEBUG FST_NAME ": " fmt, ## A )
402 # define dbg(X...) /* NOP */
406 /* Printing short cuts
408 #define printk_err(fmt,A...) printk ( KERN_ERR FST_NAME ": " fmt, ## A )
409 #define printk_warn(fmt,A...) printk ( KERN_WARNING FST_NAME ": " fmt, ## A )
410 #define printk_info(fmt,A...) printk ( KERN_INFO FST_NAME ": " fmt, ## A )
414 * PCI ID lookup table
416 static struct pci_device_id fst_pci_dev_id[] = {
417 { FSC_PCI_VENDOR_ID, T2P_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
419 { FSC_PCI_VENDOR_ID, T4P_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
424 MODULE_DEVICE_TABLE ( pci, fst_pci_dev_id );
427 /* Card control functions
428 * ======================
430 /* Place the processor in reset state
432 * Used to be a simple write to card control space but a glitch in the latest
433 * AMD Am186CH processor means that we now have to do it by asserting and de-
434 * asserting the PLX chip PCI Adapter Software Reset. Bit 30 in CNTRL register
438 fst_cpureset ( struct fst_card_info *card )
442 regval = inl ( card->pci_conf + 0x50 );
444 outl ( regval | 0x40000000, card->pci_conf + 0x50 );
445 outl ( regval & ~0x40000000, card->pci_conf + 0x50 );
448 /* Release the processor from reset
451 fst_cpurelease ( struct fst_card_info *card )
453 (void) readb ( card->ctlmem );
456 /* Clear the cards interrupt flag
459 fst_clear_intr ( struct fst_card_info *card )
461 /* Poke the appropriate PLX chip register (same as enabling interrupts)
463 outw ( 0x0543, card->pci_conf + 0x4C );
466 /* Disable card interrupts
469 fst_disable_intr ( struct fst_card_info *card )
471 outw ( 0x0000, card->pci_conf + 0x4C );
475 /* Issue a Mailbox command for a port.
476 * Note we issue them on a fire and forget basis, not expecting to see an
477 * error and not waiting for completion.
480 fst_issue_cmd ( struct fst_port_info *port, unsigned short cmd )
482 struct fst_card_info *card;
483 unsigned short mbval;
488 spin_lock_irqsave ( &card->card_lock, flags );
489 mbval = FST_RDW ( card, portMailbox[port->index][0]);
492 /* Wait for any previous command to complete */
493 while ( mbval > NAK )
495 spin_unlock_irqrestore ( &card->card_lock, flags );
496 schedule_timeout ( 1 );
497 spin_lock_irqsave ( &card->card_lock, flags );
499 if ( ++safety > 1000 )
501 printk_err ("Mailbox safety timeout\n");
505 mbval = FST_RDW ( card, portMailbox[port->index][0]);
509 dbg ( DBG_CMD,"Mailbox clear after %d jiffies\n", safety );
513 dbg ( DBG_CMD,"issue_cmd: previous command was NAK'd\n");
516 FST_WRW ( card, portMailbox[port->index][0], cmd );
518 if ( cmd == ABORTTX || cmd == STARTPORT )
525 spin_unlock_irqrestore ( &card->card_lock, flags );
529 /* Port output signals control
532 fst_op_raise ( struct fst_port_info *port, unsigned int outputs )
534 outputs |= FST_RDL ( port->card, v24OpSts[port->index]);
535 FST_WRL ( port->card, v24OpSts[port->index], outputs );
538 fst_issue_cmd ( port, SETV24O );
542 fst_op_lower ( struct fst_port_info *port, unsigned int outputs )
544 outputs = ~outputs & FST_RDL ( port->card, v24OpSts[port->index]);
545 FST_WRL ( port->card, v24OpSts[port->index], outputs );
548 fst_issue_cmd ( port, SETV24O );
553 * Setup port Rx buffers
556 fst_rx_config ( struct fst_port_info *port )
562 struct fst_card_info *card;
566 spin_lock_irqsave ( &card->card_lock, flags );
567 for ( i = 0 ; i < NUM_RX_BUFFER ; i++ )
569 offset = BUF_OFFSET ( rxBuffer[pi][i][0]);
571 FST_WRW ( card, rxDescrRing[pi][i].ladr, (u16) offset );
572 FST_WRB ( card, rxDescrRing[pi][i].hadr, (u8)( offset >> 16 ));
573 FST_WRW ( card, rxDescrRing[pi][i].bcnt,
574 cnv_bcnt ( LEN_RX_BUFFER ));
575 FST_WRW ( card, rxDescrRing[pi][i].mcnt, 0 );
576 FST_WRB ( card, rxDescrRing[pi][i].bits, DMA_OWN );
579 spin_unlock_irqrestore ( &card->card_lock, flags );
584 * Setup port Tx buffers
587 fst_tx_config ( struct fst_port_info *port )
593 struct fst_card_info *card;
597 spin_lock_irqsave ( &card->card_lock, flags );
598 for ( i = 0 ; i < NUM_TX_BUFFER ; i++ )
600 offset = BUF_OFFSET ( txBuffer[pi][i][0]);
602 FST_WRW ( card, txDescrRing[pi][i].ladr, (u16) offset );
603 FST_WRB ( card, txDescrRing[pi][i].hadr, (u8)( offset >> 16 ));
604 FST_WRW ( card, txDescrRing[pi][i].bcnt, 0 );
605 FST_WRB ( card, txDescrRing[pi][i].bits, 0 );
610 spin_unlock_irqrestore ( &card->card_lock, flags );
614 /* Control signal change interrupt event
617 fst_intr_ctlchg ( struct fst_card_info *card, struct fst_port_info *port )
621 signals = FST_RDL ( card, v24DebouncedSts[port->index]);
623 if ( signals & (( port->hwif == X21 ) ? IPSTS_INDICATE : IPSTS_DCD ))
625 if ( ! netif_carrier_ok ( port_to_dev ( port )))
627 dbg ( DBG_INTR,"DCD active\n");
628 netif_carrier_on ( port_to_dev ( port ));
633 if ( netif_carrier_ok ( port_to_dev ( port )))
635 dbg ( DBG_INTR,"DCD lost\n");
636 netif_carrier_off ( port_to_dev ( port ));
643 /* Rx complete interrupt
646 fst_intr_rx ( struct fst_card_info *card, struct fst_port_info *port )
648 unsigned char dmabits;
653 struct net_device *dev = port_to_dev(port);
654 struct net_device_stats *stats = hdlc_stats(dev);
658 /* Check we have a buffer to process */
661 dmabits = FST_RDB ( card, rxDescrRing[pi][rxp].bits );
662 if ( dmabits & DMA_OWN )
664 dbg ( DBG_RX | DBG_INTR,"intr_rx: No buffer port %d pos %d\n",
669 /* Get buffer length */
670 len = FST_RDW ( card, rxDescrRing[pi][rxp].mcnt );
671 /* Discard the CRC */
674 /* Check buffer length and for other errors. We insist on one packet
675 * in one buffer. This simplifies things greatly and since we've
676 * allocated 8K it shouldn't be a real world limitation
678 dbg ( DBG_RX,"intr_rx: %d,%d: flags %x len %d\n", pi, rxp, dmabits,
680 if ( dmabits != ( RX_STP | RX_ENP ) || len > LEN_RX_BUFFER - 2 )
684 /* Update error stats and discard buffer */
685 if ( dmabits & RX_OFLO )
687 stats->rx_fifo_errors++;
689 if ( dmabits & RX_CRC )
691 stats->rx_crc_errors++;
693 if ( dmabits & RX_FRAM )
695 stats->rx_frame_errors++;
697 if ( dmabits == ( RX_STP | RX_ENP ))
699 stats->rx_length_errors++;
702 /* Discard buffer descriptors until we see the end of packet
706 while (( dmabits & ( DMA_OWN | RX_ENP )) == 0 )
708 FST_WRB ( card, rxDescrRing[pi][rxp].bits, DMA_OWN );
709 if ( ++rxp >= NUM_RX_BUFFER )
711 if ( ++i > NUM_RX_BUFFER )
713 dbg ( DBG_ASS,"intr_rx: Discarding more bufs"
717 dmabits = FST_RDB ( card, rxDescrRing[pi][rxp].bits );
720 /* Discard the terminal buffer */
721 if ( ! ( dmabits & DMA_OWN ))
723 FST_WRB ( card, rxDescrRing[pi][rxp].bits, DMA_OWN );
724 if ( ++rxp >= NUM_RX_BUFFER )
732 if (( skb = dev_alloc_skb ( len )) == NULL )
734 dbg ( DBG_RX,"intr_rx: can't allocate buffer\n");
738 /* Return descriptor to card */
739 FST_WRB ( card, rxDescrRing[pi][rxp].bits, DMA_OWN );
741 if ( ++rxp >= NUM_RX_BUFFER )
748 memcpy_fromio ( skb_put ( skb, len ),
749 card->mem + BUF_OFFSET ( rxBuffer[pi][rxp][0]),
752 /* Reset buffer descriptor */
753 FST_WRB ( card, rxDescrRing[pi][rxp].bits, DMA_OWN );
754 if ( ++rxp >= NUM_RX_BUFFER )
761 stats->rx_bytes += len;
764 skb->mac.raw = skb->data;
766 skb->protocol = hdlc_type_trans(skb, skb->dev);
769 dev->last_rx = jiffies;
774 * The interrupt service routine
775 * Dev_id is our fst_card_info pointer
778 fst_intr ( int irq, void *dev_id, struct pt_regs *regs )
780 struct fst_card_info *card;
781 struct fst_port_info *port;
782 int rdidx; /* Event buffer indices */
784 int event; /* Actual event for processing */
787 if (( card = dev_id ) == NULL )
789 dbg ( DBG_INTR,"intr: spurious %d\n", irq );
793 dbg ( DBG_INTR,"intr: %d %p\n", irq, card );
795 spin_lock ( &card->card_lock );
797 /* Clear and reprime the interrupt source */
798 fst_clear_intr ( card );
800 /* Set the software acknowledge */
801 FST_WRB ( card, interruptHandshake, 0xEE );
803 /* Drain the event queue */
804 rdidx = FST_RDB ( card, interruptEvent.rdindex );
805 wridx = FST_RDB ( card, interruptEvent.wrindex );
806 while ( rdidx != wridx )
808 event = FST_RDB ( card, interruptEvent.evntbuff[rdidx]);
810 port = &card->ports[event & 0x03];
812 dbg ( DBG_INTR,"intr: %x\n", event );
821 fst_intr_ctlchg ( card, port );
828 dbg ( DBG_TX,"Abort complete port %d\n", event & 0x03 );
835 /* Difficult to see how we'd get this given that we
836 * always load up the entire packet for DMA.
838 dbg ( DBG_TX,"Tx underflow port %d\n", event & 0x03 );
839 hdlc_stats(port_to_dev(port))->tx_errors++;
840 hdlc_stats(port_to_dev(port))->tx_fifo_errors++;
844 dbg ( DBG_INIT,"Card init OK intr\n");
848 dbg ( DBG_INIT,"Card init FAILED intr\n");
849 card->state = FST_IFAILED;
853 printk_err ("intr: unknown card event code. ignored\n");
857 /* Bump and wrap the index */
858 if ( ++rdidx >= MAX_CIRBUFF )
861 FST_WRB ( card, interruptEvent.rdindex, rdidx );
863 for ( pi = 0, port = card->ports ; pi < card->nports ; pi++, port++ )
868 /* Check for rx completions */
869 while ( ! ( FST_RDB ( card, rxDescrRing[pi][port->rxpos].bits )
872 fst_intr_rx ( card, port );
875 /* Check for Tx completions */
876 while ( port->txcnt > 0 && ! ( FST_RDB ( card,
877 txDescrRing[pi][port->txipos].bits ) & DMA_OWN ))
880 if ( ++port->txipos >= NUM_TX_BUFFER )
882 netif_wake_queue ( port_to_dev ( port ));
886 spin_unlock ( &card->card_lock );
891 /* Check that the shared memory configuration is one that we can handle
892 * and that some basic parameters are correct
895 check_started_ok ( struct fst_card_info *card )
899 /* Check structure version and end marker */
900 if ( FST_RDW ( card, smcVersion ) != SMC_VERSION )
902 printk_err ("Bad shared memory version %d expected %d\n",
903 FST_RDW ( card, smcVersion ), SMC_VERSION );
904 card->state = FST_BADVERSION;
907 if ( FST_RDL ( card, endOfSmcSignature ) != END_SIG )
909 printk_err ("Missing shared memory signature\n");
910 card->state = FST_BADVERSION;
913 /* Firmware status flag, 0x00 = initialising, 0x01 = OK, 0xFF = fail */
914 if (( i = FST_RDB ( card, taskStatus )) == 0x01 )
916 card->state = FST_RUNNING;
918 else if ( i == 0xFF )
920 printk_err ("Firmware initialisation failed. Card halted\n");
921 card->state = FST_HALTED;
924 else if ( i != 0x00 )
926 printk_err ("Unknown firmware status 0x%x\n", i );
927 card->state = FST_HALTED;
931 /* Finally check the number of ports reported by firmware against the
932 * number we assumed at card detection. Should never happen with
933 * existing firmware etc so we just report it for the moment.
935 if ( FST_RDL ( card, numberOfPorts ) != card->nports )
937 printk_warn ("Port count mismatch."
938 " Firmware thinks %d we say %d\n",
939 FST_RDL ( card, numberOfPorts ), card->nports );
945 set_conf_from_info ( struct fst_card_info *card, struct fst_port_info *port,
946 struct fstioc_info *info )
950 /* Set things according to the user set valid flags.
951 * Several of the old options have been invalidated/replaced by the
952 * generic HDLC package.
955 if ( info->valid & FSTVAL_PROTO )
957 if ( info->valid & FSTVAL_CABLE )
959 if ( info->valid & FSTVAL_SPEED )
962 if ( info->valid & FSTVAL_MODE )
963 FST_WRW ( card, cardMode, info->cardMode );
965 if ( info->valid & FSTVAL_DEBUG )
966 fst_debug_mask = info->debug;
973 gather_conf_info ( struct fst_card_info *card, struct fst_port_info *port,
974 struct fstioc_info *info )
978 memset ( info, 0, sizeof ( struct fstioc_info ));
981 info->nports = card->nports;
982 info->type = card->type;
983 info->state = card->state;
984 info->proto = FST_GEN_HDLC;
987 info->debug = fst_debug_mask;
990 /* Only mark information as valid if card is running.
991 * Copy the data anyway in case it is useful for diagnostics
994 = (( card->state == FST_RUNNING ) ? FSTVAL_ALL : FSTVAL_CARD )
1000 info->lineInterface = FST_RDW ( card, portConfig[i].lineInterface );
1001 info->internalClock = FST_RDB ( card, portConfig[i].internalClock );
1002 info->lineSpeed = FST_RDL ( card, portConfig[i].lineSpeed );
1003 info->v24IpSts = FST_RDL ( card, v24IpSts[i] );
1004 info->v24OpSts = FST_RDL ( card, v24OpSts[i] );
1005 info->clockStatus = FST_RDW ( card, clockStatus[i] );
1006 info->cableStatus = FST_RDW ( card, cableStatus );
1007 info->cardMode = FST_RDW ( card, cardMode );
1008 info->smcFirmwareVersion = FST_RDL ( card, smcFirmwareVersion );
1013 fst_set_iface ( struct fst_card_info *card, struct fst_port_info *port,
1016 sync_serial_settings sync;
1019 if (copy_from_user (&sync, ifr->ifr_settings.ifs_ifsu.sync,
1023 if ( sync.loopback )
1028 switch (ifr->ifr_settings.type)
1031 FST_WRW ( card, portConfig[i].lineInterface, V35 );
1036 FST_WRW ( card, portConfig[i].lineInterface, V24 );
1041 FST_WRW ( card, portConfig[i].lineInterface, X21 );
1045 case IF_IFACE_SYNC_SERIAL:
1052 switch ( sync.clock_type )
1055 FST_WRB ( card, portConfig[i].internalClock, EXTCLK );
1059 FST_WRB ( card, portConfig[i].internalClock, INTCLK );
1065 FST_WRL ( card, portConfig[i].lineSpeed, sync.clock_rate );
1070 fst_get_iface ( struct fst_card_info *card, struct fst_port_info *port,
1073 sync_serial_settings sync;
1076 /* First check what line type is set, we'll default to reporting X.21
1077 * if nothing is set as IF_IFACE_SYNC_SERIAL implies it can't be
1080 switch ( port->hwif )
1083 ifr->ifr_settings.type = IF_IFACE_V35;
1086 ifr->ifr_settings.type = IF_IFACE_V24;
1090 ifr->ifr_settings.type = IF_IFACE_X21;
1094 if (ifr->ifr_settings.size < sizeof(sync)) {
1095 ifr->ifr_settings.size = sizeof(sync); /* data size wanted */
1100 sync.clock_rate = FST_RDL ( card, portConfig[i].lineSpeed );
1101 /* Lucky card and linux use same encoding here */
1102 sync.clock_type = FST_RDB ( card, portConfig[i].internalClock );
1105 if (copy_to_user (ifr->ifr_settings.ifs_ifsu.sync, &sync,
1114 fst_ioctl ( struct net_device *dev, struct ifreq *ifr, int cmd )
1116 struct fst_card_info *card;
1117 struct fst_port_info *port;
1118 struct fstioc_write wrthdr;
1119 struct fstioc_info info;
1120 unsigned long flags;
1122 dbg ( DBG_IOCTL,"ioctl: %x, %p\n", cmd, ifr->ifr_data );
1124 port = dev_to_port ( dev );
1127 if ( !capable ( CAP_NET_ADMIN ))
1133 fst_cpureset ( card );
1134 card->state = FST_RESET;
1138 fst_cpurelease ( card );
1139 card->state = FST_STARTING;
1142 case FSTWRITE: /* Code write (download) */
1144 /* First copy in the header with the length and offset of data
1147 if ( ifr->ifr_data == NULL )
1151 if ( copy_from_user ( &wrthdr, ifr->ifr_data,
1152 sizeof ( struct fstioc_write )))
1157 /* Sanity check the parameters. We don't support partial writes
1158 * when going over the top
1160 if ( wrthdr.size > FST_MEMSIZE || wrthdr.offset > FST_MEMSIZE
1161 || wrthdr.size + wrthdr.offset > FST_MEMSIZE )
1166 /* Now copy the data to the card.
1167 * This will probably break on some architectures.
1168 * I'll fix it when I have something to test on.
1170 if ( copy_from_user ( card->mem + wrthdr.offset,
1171 ifr->ifr_data + sizeof ( struct fstioc_write ),
1177 /* Writes to the memory of a card in the reset state constitute
1180 if ( card->state == FST_RESET )
1182 card->state = FST_DOWNLOAD;
1188 /* If card has just been started check the shared memory config
1189 * version and marker
1191 if ( card->state == FST_STARTING )
1193 check_started_ok ( card );
1195 /* If everything checked out enable card interrupts */
1196 if ( card->state == FST_RUNNING )
1198 spin_lock_irqsave ( &card->card_lock, flags );
1199 fst_clear_intr ( card );
1200 FST_WRB ( card, interruptHandshake, 0xEE );
1201 spin_unlock_irqrestore ( &card->card_lock,
1206 if ( ifr->ifr_data == NULL )
1211 gather_conf_info ( card, port, &info );
1213 if ( copy_to_user ( ifr->ifr_data, &info, sizeof ( info )))
1221 /* Most of the setting have been moved to the generic ioctls
1222 * this just covers debug and board ident mode now
1224 if ( copy_from_user ( &info, ifr->ifr_data, sizeof ( info )))
1229 return set_conf_from_info ( card, port, &info );
1232 switch (ifr->ifr_settings.type)
1235 return fst_get_iface ( card, port, ifr );
1237 case IF_IFACE_SYNC_SERIAL:
1241 return fst_set_iface ( card, port, ifr );
1244 return hdlc_ioctl ( dev, ifr, cmd );
1248 /* Not one of ours. Pass through to HDLC package */
1249 return hdlc_ioctl ( dev, ifr, cmd );
1255 fst_openport ( struct fst_port_info *port )
1259 /* Only init things if card is actually running. This allows open to
1260 * succeed for downloads etc.
1262 if ( port->card->state == FST_RUNNING )
1266 dbg ( DBG_OPEN,"open: found port already running\n");
1268 fst_issue_cmd ( port, STOPPORT );
1272 fst_rx_config ( port );
1273 fst_tx_config ( port );
1274 fst_op_raise ( port, OPSTS_RTS | OPSTS_DTR );
1276 fst_issue_cmd ( port, STARTPORT );
1279 signals = FST_RDL ( port->card, v24DebouncedSts[port->index]);
1280 if ( signals & (( port->hwif == X21 ) ? IPSTS_INDICATE
1282 netif_carrier_on ( port_to_dev ( port ));
1284 netif_carrier_off ( port_to_dev ( port ));
1289 fst_closeport ( struct fst_port_info *port )
1291 if ( port->card->state == FST_RUNNING )
1296 fst_op_lower ( port, OPSTS_RTS | OPSTS_DTR );
1298 fst_issue_cmd ( port, STOPPORT );
1302 dbg ( DBG_OPEN,"close: port not running\n");
1309 fst_open ( struct net_device *dev )
1313 err = hdlc_open (dev);
1317 fst_openport ( dev_to_port ( dev ));
1318 netif_wake_queue ( dev );
1323 fst_close ( struct net_device *dev )
1325 netif_stop_queue ( dev );
1326 fst_closeport ( dev_to_port ( dev ));
1332 fst_attach ( struct net_device *dev, unsigned short encoding, unsigned short parity )
1334 /* Setting currently fixed in FarSync card so we check and forget */
1335 if ( encoding != ENCODING_NRZ || parity != PARITY_CRC16_PR1_CCITT )
1342 fst_tx_timeout ( struct net_device *dev )
1344 struct fst_port_info *port;
1345 struct net_device_stats *stats = hdlc_stats(dev);
1347 dbg ( DBG_INTR | DBG_TX,"tx_timeout\n");
1349 port = dev_to_port ( dev );
1352 stats->tx_aborted_errors++;
1354 if ( port->txcnt > 0 )
1355 fst_issue_cmd ( port, ABORTTX );
1357 dev->trans_start = jiffies;
1358 netif_wake_queue ( dev );
1363 fst_start_xmit ( struct sk_buff *skb, struct net_device *dev )
1365 struct net_device_stats *stats = hdlc_stats(dev);
1366 struct fst_card_info *card;
1367 struct fst_port_info *port;
1368 unsigned char dmabits;
1369 unsigned long flags;
1373 port = dev_to_port ( dev );
1376 /* Drop packet with error if we don't have carrier */
1377 if ( ! netif_carrier_ok ( dev ))
1379 dev_kfree_skb ( skb );
1381 stats->tx_carrier_errors++;
1385 /* Drop it if it's too big! MTU failure ? */
1386 if ( skb->len > LEN_TX_BUFFER )
1388 dbg ( DBG_TX,"Packet too large %d vs %d\n", skb->len,
1390 dev_kfree_skb ( skb );
1395 /* Check we have a buffer */
1397 spin_lock_irqsave ( &card->card_lock, flags );
1399 dmabits = FST_RDB ( card, txDescrRing[pi][txp].bits );
1400 if ( dmabits & DMA_OWN )
1402 spin_unlock_irqrestore ( &card->card_lock, flags );
1403 dbg ( DBG_TX,"Out of Tx buffers\n");
1404 dev_kfree_skb ( skb );
1408 if ( ++port->txpos >= NUM_TX_BUFFER )
1411 if ( ++port->txcnt >= NUM_TX_BUFFER )
1412 netif_stop_queue ( dev );
1414 /* Release the card lock before we copy the data as we now have
1415 * exclusive access to the buffer.
1417 spin_unlock_irqrestore ( &card->card_lock, flags );
1419 /* Enqueue the packet */
1420 memcpy_toio ( card->mem + BUF_OFFSET ( txBuffer[pi][txp][0]),
1421 skb->data, skb->len );
1422 FST_WRW ( card, txDescrRing[pi][txp].bcnt, cnv_bcnt ( skb->len ));
1423 FST_WRB ( card, txDescrRing[pi][txp].bits, DMA_OWN | TX_STP | TX_ENP );
1425 stats->tx_packets++;
1426 stats->tx_bytes += skb->len;
1428 dev_kfree_skb ( skb );
1430 dev->trans_start = jiffies;
1436 * Card setup having checked hardware resources.
1437 * Should be pretty bizarre if we get an error here (kernel memory
1438 * exhaustion is one possibility). If we do see a problem we report it
1439 * via a printk and leave the corresponding interface and all that follow
1442 static char *type_strings[] __devinitdata = {
1443 "no hardware", /* Should never be seen */
1448 static void __devinit
1449 fst_init_card ( struct fst_card_info *card )
1454 /* We're working on a number of ports based on the card ID. If the
1455 * firmware detects something different later (should never happen)
1456 * we'll have to revise it in some way then.
1458 for ( i = 0 ; i < card->nports ; i++ ) {
1459 err = register_hdlc_device(card->ports[i].dev);
1462 printk_err ("Cannot register HDLC device for port %d"
1463 " (errno %d)\n", i, -err );
1464 for (j = i; j < card->nports; j++) {
1465 free_netdev(card->ports[j].dev);
1466 card->ports[j].dev = NULL;
1473 printk ( KERN_INFO "%s-%s: %s IRQ%d, %d ports\n",
1474 port_to_dev(&card->ports[0])->name,
1475 port_to_dev(&card->ports[card->nports-1])->name,
1476 type_strings[card->type], card->irq, card->nports );
1481 * Initialise card when detected.
1482 * Returns 0 to indicate success, or errno otherwise.
1484 static int __devinit
1485 fst_add_one ( struct pci_dev *pdev, const struct pci_device_id *ent )
1487 static int firsttime_done = 0;
1488 struct fst_card_info *card;
1492 if ( ! firsttime_done )
1494 printk ( KERN_INFO "FarSync X21 driver " FST_USER_VERSION
1495 " (c) 2001 FarSite Communications Ltd.\n");
1499 /* Allocate driver private data */
1500 card = kmalloc ( sizeof ( struct fst_card_info ), GFP_KERNEL);
1503 printk_err ("FarSync card found but insufficient memory for"
1504 " driver storage\n");
1507 memset ( card, 0, sizeof ( struct fst_card_info ));
1509 /* Try to enable the device */
1510 if (( err = pci_enable_device ( pdev )) != 0 )
1512 printk_err ("Failed to enable card. Err %d\n", -err );
1513 goto error_free_card;
1516 /* Record info we need*/
1517 card->irq = pdev->irq;
1518 card->pci_conf = pci_resource_start ( pdev, 1 );
1519 card->phys_mem = pci_resource_start ( pdev, 2 );
1520 card->phys_ctlmem = pci_resource_start ( pdev, 3 );
1522 card->type = ent->driver_data;
1523 card->nports = ( ent->driver_data == FST_TYPE_T2P ) ? 2 : 4;
1525 card->state = FST_UNINIT;
1527 spin_lock_init ( &card->card_lock );
1529 for ( i = 0 ; i < card->nports ; i++ ) {
1530 struct net_device *dev = alloc_hdlcdev(&card->ports[i]);
1534 free_netdev(card->ports[i].dev);
1535 printk_err ("FarSync: out of memory\n");
1536 goto error_free_card;
1538 card->ports[i].dev = dev;
1539 card->ports[i].card = card;
1540 card->ports[i].index = i;
1541 card->ports[i].run = 0;
1543 hdlc = dev_to_hdlc(dev);
1545 /* Fill in the net device info */
1546 /* Since this is a PCI setup this is purely
1547 * informational. Give them the buffer addresses
1548 * and basic card I/O.
1550 dev->mem_start = card->phys_mem
1551 + BUF_OFFSET ( txBuffer[i][0][0]);
1552 dev->mem_end = card->phys_mem
1553 + BUF_OFFSET ( txBuffer[i][NUM_TX_BUFFER][0]);
1554 dev->base_addr = card->pci_conf;
1555 dev->irq = card->irq;
1557 dev->tx_queue_len = FST_TX_QUEUE_LEN;
1558 dev->open = fst_open;
1559 dev->stop = fst_close;
1560 dev->do_ioctl = fst_ioctl;
1561 dev->watchdog_timeo = FST_TX_TIMEOUT;
1562 dev->tx_timeout = fst_tx_timeout;
1563 hdlc->attach = fst_attach;
1564 hdlc->xmit = fst_start_xmit;
1567 dbg ( DBG_PCI,"type %d nports %d irq %d\n", card->type,
1568 card->nports, card->irq );
1569 dbg ( DBG_PCI,"conf %04x mem %08x ctlmem %08x\n",
1570 card->pci_conf, card->phys_mem, card->phys_ctlmem );
1572 /* Check we can get access to the memory and I/O regions */
1573 if ( ! request_region ( card->pci_conf, 0x80,"PLX config regs"))
1575 printk_err ("Unable to get config I/O @ 0x%04X\n",
1578 goto error_free_ports;
1580 if ( ! request_mem_region ( card->phys_mem, FST_MEMSIZE,"Shared RAM"))
1582 printk_err ("Unable to get main memory @ 0x%08X\n",
1585 goto error_release_io;
1587 if ( ! request_mem_region ( card->phys_ctlmem, 0x10,"Control memory"))
1589 printk_err ("Unable to get control memory @ 0x%08X\n",
1590 card->phys_ctlmem );
1592 goto error_release_mem;
1596 /* Get virtual addresses of memory regions */
1597 if (( card->mem = ioremap ( card->phys_mem, FST_MEMSIZE )) == NULL )
1599 printk_err ("Physical memory remap failed\n");
1601 goto error_release_ctlmem;
1603 if (( card->ctlmem = ioremap ( card->phys_ctlmem, 0x10 )) == NULL )
1605 printk_err ("Control memory remap failed\n");
1607 goto error_unmap_mem;
1609 dbg ( DBG_PCI,"kernel mem %p, ctlmem %p\n", card->mem, card->ctlmem);
1611 /* Reset the card's processor */
1612 fst_cpureset ( card );
1613 card->state = FST_RESET;
1615 /* Register the interrupt handler */
1616 if ( request_irq ( card->irq, fst_intr, SA_SHIRQ, FST_DEV_NAME, card ))
1619 printk_err ("Unable to register interrupt %d\n", card->irq );
1621 goto error_unmap_ctlmem;
1624 /* Record driver data for later use */
1625 pci_set_drvdata(pdev, card);
1627 /* Remainder of card setup */
1628 fst_init_card ( card );
1630 return 0; /* Success */
1633 /* Failure. Release resources */
1635 iounmap ( card->ctlmem );
1638 iounmap ( card->mem );
1640 error_release_ctlmem:
1641 release_mem_region ( card->phys_ctlmem, 0x10 );
1644 release_mem_region ( card->phys_mem, FST_MEMSIZE );
1647 release_region ( card->pci_conf, 0x80 );
1650 for (i = 0; i < card->nports; i++)
1651 free_netdev(card->ports[i].dev);
1659 * Cleanup and close down a card
1661 static void __devexit
1662 fst_remove_one ( struct pci_dev *pdev )
1664 struct fst_card_info *card;
1667 card = pci_get_drvdata(pdev);
1669 for ( i = 0 ; i < card->nports ; i++ )
1671 struct net_device *dev = port_to_dev(&card->ports[i]);
1672 unregister_hdlc_device(dev);
1675 fst_disable_intr ( card );
1676 free_irq ( card->irq, card );
1678 iounmap ( card->ctlmem );
1679 iounmap ( card->mem );
1681 release_mem_region ( card->phys_ctlmem, 0x10 );
1682 release_mem_region ( card->phys_mem, FST_MEMSIZE );
1683 release_region ( card->pci_conf, 0x80 );
1685 for (i = 0; i < card->nports; i++)
1686 free_netdev(card->ports[i].dev);
1691 static struct pci_driver fst_driver = {
1693 .id_table = fst_pci_dev_id,
1694 .probe = fst_add_one,
1695 .remove = __devexit_p(fst_remove_one),
1703 return pci_module_init ( &fst_driver );
1707 fst_cleanup_module(void)
1709 pci_unregister_driver ( &fst_driver );
1712 module_init ( fst_init );
1713 module_exit ( fst_cleanup_module );