2 * linux/drivers/s390/misc/z90main.c
6 * Copyright (C) 2001, 2004 IBM Corporation
7 * Author(s): Robert Burroughs (burrough@us.ibm.com)
8 * Eric Rossman (edrossma@us.ibm.com)
10 * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 #include <asm/uaccess.h> // copy_(from|to)_user
28 #include <linux/compat.h>
29 #include <linux/compiler.h>
30 #include <linux/delay.h> // mdelay
31 #include <linux/init.h>
32 #include <linux/interrupt.h> // for tasklets
33 #include <linux/ioctl32.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/proc_fs.h>
37 #include <linux/syscalls.h>
38 #include <linux/version.h>
40 #include "z90common.h"
41 #ifndef Z90CRYPT_USE_HOTPLUG
42 #include <linux/miscdevice.h>
45 #define VERSION_CODE(vers, rel, seq) (((vers)<<16) | ((rel)<<8) | (seq))
46 #if LINUX_VERSION_CODE < VERSION_CODE(2,4,0) /* version < 2.4 */
47 # error "This kernel is too old: not supported"
49 #if LINUX_VERSION_CODE > VERSION_CODE(2,7,0) /* version > 2.6 */
50 # error "This kernel is too recent: not supported by this file"
53 #define VERSION_Z90MAIN_C "$Revision: 1.31 $"
55 static char z90cmain_version[] __initdata =
56 "z90main.o (" VERSION_Z90MAIN_C "/"
57 VERSION_Z90COMMON_H "/" VERSION_Z90CRYPT_H ")";
59 extern char z90chardware_version[];
62 * Defaults that may be modified.
65 #ifndef Z90CRYPT_USE_HOTPLUG
67 * You can specify a different minor at compile time.
69 #ifndef Z90CRYPT_MINOR
70 #define Z90CRYPT_MINOR MISC_DYNAMIC_MINOR
74 * You can specify a different major at compile time.
76 #ifndef Z90CRYPT_MAJOR
77 #define Z90CRYPT_MAJOR 0
82 * You can specify a different domain at compile time or on the insmod
86 #define DOMAIN_INDEX -1
90 * This is the name under which the device is registered in /proc/modules.
92 #define REG_NAME "z90crypt"
95 * Cleanup should run every CLEANUPTIME seconds and should clean up requests
96 * older than CLEANUPTIME seconds in the past.
99 #define CLEANUPTIME 15
103 * Config should run every CONFIGTIME seconds
106 #define CONFIGTIME 30
110 * The first execution of the config task should take place
111 * immediately after initialization
113 #ifndef INITIAL_CONFIGTIME
114 #define INITIAL_CONFIGTIME 1
118 * Reader should run every READERTIME milliseconds
125 * turn long device array index into device pointer
127 #define LONG2DEVPTR(ndx) (z90crypt.device_p[(ndx)])
130 * turn short device array index into long device array index
132 #define SHRT2LONG(ndx) (z90crypt.overall_device_x.device_index[(ndx)])
135 * turn short device array index into device pointer
137 #define SHRT2DEVPTR(ndx) LONG2DEVPTR(SHRT2LONG(ndx))
140 * Status for a work-element
142 #define STAT_DEFAULT 0x00 // request has not been processed
144 #define STAT_ROUTED 0x80 // bit 7: requests get routed to specific device
145 // else, device is determined each write
146 #define STAT_FAILED 0x40 // bit 6: this bit is set if the request failed
147 // before being sent to the hardware.
148 #define STAT_WRITTEN 0x30 // bits 5-4: work to be done, not sent to device
149 // 0x20 // UNUSED state
150 #define STAT_READPEND 0x10 // bits 5-4: work done, we're returning data now
151 #define STAT_NOWORK 0x00 // bits off: no work on any queue
152 #define STAT_RDWRMASK 0x30 // mask for bits 5-4
155 * Macros to check the status RDWRMASK
157 #define CHK_RDWRMASK(statbyte) ((statbyte) & STAT_RDWRMASK)
158 #define SET_RDWRMASK(statbyte, newval) \
159 {(statbyte) &= ~STAT_RDWRMASK; (statbyte) |= newval;}
162 * Audit Trail. Progress of a Work element
163 * audit[0]: Unless noted otherwise, these bits are all set by the process
165 #define FP_COPYFROM 0x80 // Caller's buffer has been copied to work element
166 #define FP_BUFFREQ 0x40 // Low Level buffer requested
167 #define FP_BUFFGOT 0x20 // Low Level buffer obtained
168 #define FP_SENT 0x10 // Work element sent to a crypto device
169 // (may be set by process or by reader task)
170 #define FP_PENDING 0x08 // Work element placed on pending queue
171 // (may be set by process or by reader task)
172 #define FP_REQUEST 0x04 // Work element placed on request queue
173 #define FP_ASLEEP 0x02 // Work element about to sleep
174 #define FP_AWAKE 0x01 // Work element has been awakened
177 * audit[1]: These bits are set by the reader task and/or the cleanup task
179 #define FP_NOTPENDING 0x80 // Work element removed from pending queue
180 #define FP_AWAKENING 0x40 // Caller about to be awakened
181 #define FP_TIMEDOUT 0x20 // Caller timed out
182 #define FP_RESPSIZESET 0x10 // Response size copied to work element
183 #define FP_RESPADDRCOPIED 0x08 // Response address copied to work element
184 #define FP_RESPBUFFCOPIED 0x04 // Response buffer copied to work element
185 #define FP_REMREQUEST 0x02 // Work element removed from request queue
186 #define FP_SIGNALED 0x01 // Work element was awakened by a signal
193 * state of the file handle in private_data.status
196 #define STAT_CLOSED 1
199 * PID() expands to the process ID of the current process
201 #define PID() (current->pid)
204 * Selected Constants. The number of APs and the number of devices
206 #ifndef Z90CRYPT_NUM_APS
207 #define Z90CRYPT_NUM_APS 64
209 #ifndef Z90CRYPT_NUM_DEVS
210 #define Z90CRYPT_NUM_DEVS Z90CRYPT_NUM_APS
212 #ifndef Z90CRYPT_NUM_TYPES
213 #define Z90CRYPT_NUM_TYPES 3
217 * Buffer size for receiving responses. The maximum Response Size
218 * is actually the maximum request size, since in an error condition
219 * the request itself may be returned unchanged.
221 #ifndef MAX_RESPONSE_SIZE
222 #define MAX_RESPONSE_SIZE 0x0000077C
226 * A count and status-byte mask
229 int st_count; // # of enabled devices
230 int disabled_count; // # of disabled devices
231 int user_disabled_count; // # of devices disabled via proc fs
232 unsigned char st_mask[Z90CRYPT_NUM_APS]; // current status mask
236 * The array of device indexes is a mechanism for fast indexing into
237 * a long (and sparse) array. For instance, if APs 3, 9 and 47 are
238 * installed, z90CDeviceIndex[0] is 3, z90CDeviceIndex[1] is 9, and
239 * z90CDeviceIndex[2] is 47.
242 int device_index[Z90CRYPT_NUM_DEVS];
246 * All devices are arranged in a single array: 64 APs
249 int dev_type; // PCICA, PCICC, or PCIXCC
250 enum devstat dev_stat; // current device status
251 int dev_self_x; // Index in array
252 int disabled; // Set when device is in error
253 int user_disabled; // Set when device is disabled by user
254 int dev_q_depth; // q depth
255 unsigned char * dev_resp_p; // Response buffer address
256 int dev_resp_l; // Response Buffer length
257 int dev_caller_count; // Number of callers
258 int dev_total_req_cnt; // # requests for device since load
259 struct list_head dev_caller_list; // List of callers
263 * There's a struct status and a struct device_x for each device type.
265 struct hdware_block {
266 struct status hdware_mask;
267 struct status type_mask[Z90CRYPT_NUM_TYPES];
268 struct device_x type_x_addr[Z90CRYPT_NUM_TYPES];
269 unsigned char device_type_array[Z90CRYPT_NUM_APS];
273 * z90crypt is the topmost data structure in the hierarchy.
276 int max_count; // Nr of possible crypto devices
278 int q_depth_array[Z90CRYPT_NUM_DEVS];
279 int dev_type_array[Z90CRYPT_NUM_DEVS];
280 struct device_x overall_device_x; // array device indexes
281 struct device * device_p[Z90CRYPT_NUM_DEVS];
283 int domain_established;// TRUE: domain has been found
284 int cdx; // Crypto Domain Index
285 int len; // Length of this data structure
286 struct hdware_block *hdware_info;
290 * An array of these structures is pointed to from dev_caller
291 * The length of the array depends on the device type. For APs,
294 * The caller buffer is allocated to the user at OPEN. At WRITE,
295 * it contains the request; at READ, the response. The function
296 * send_to_crypto_device converts the request to device-dependent
297 * form and use the caller's OPEN-allocated buffer for the response.
300 int caller_buf_l; // length of original request
301 unsigned char * caller_buf_p; // Original request on WRITE
302 int caller_dev_dep_req_l; // len device dependent request
303 unsigned char * caller_dev_dep_req_p; // Device dependent form
304 unsigned char caller_id[8]; // caller-supplied message id
305 struct list_head caller_liste;
306 unsigned char caller_dev_dep_req[MAX_RESPONSE_SIZE];
310 * Function prototypes from z90hardware.c
312 enum hdstat query_online(int, int, int, int *, int *);
313 enum devstat reset_device(int, int, int);
314 enum devstat send_to_AP(int, int, int, unsigned char *);
315 enum devstat receive_from_AP(int, int, int, unsigned char *, unsigned char *);
316 int convert_request(unsigned char *, int, short, int, int, int *,
318 int convert_response(unsigned char *, unsigned char *, int *, unsigned char *);
321 * Low level function prototypes
323 static int create_z90crypt(int *);
324 static int refresh_z90crypt(int *);
325 static int find_crypto_devices(struct status *);
326 static int create_crypto_device(int);
327 static int destroy_crypto_device(int);
328 static void destroy_z90crypt(void);
329 static int refresh_index_array(struct status *, struct device_x *);
330 static int probe_device_type(struct device *);
333 * proc fs definitions
335 static struct proc_dir_entry *z90crypt_entry;
342 * work_element.opener points back to this structure
346 unsigned char status; // 0: open 1: closed
350 * A work element is allocated for each request
352 struct work_element {
353 struct priv_data *priv_data;
355 int devindex; // index of device processing this w_e
356 // (If request did not specify device,
357 // -1 until placed onto a queue)
359 struct list_head liste; // used for requestq and pendingq
360 char buffer[128]; // local copy of user request
361 int buff_size; // size of the buffer for the request
362 char resp_buff[RESPBUFFSIZE];
364 char * resp_addr; // address of response in user space
365 unsigned int funccode; // function code of request
366 wait_queue_head_t waitq;
367 unsigned long requestsent; // time at which the request was sent
368 atomic_t alarmrung; // wake-up signal
369 unsigned char caller_id[8]; // pid + counter, for this w_e
370 unsigned char status[1]; // bits to mark status of the request
371 unsigned char audit[3]; // record of work element's progress
372 unsigned char * requestptr; // address of request buffer
373 int retcode; // return code of request
377 * High level function prototypes
379 static int z90crypt_open(struct inode *, struct file *);
380 static int z90crypt_release(struct inode *, struct file *);
381 static ssize_t z90crypt_read(struct file *, char *, size_t, loff_t *);
382 static ssize_t z90crypt_write(struct file *, const char *, size_t, loff_t *);
383 static int z90crypt_ioctl(struct inode *, struct file *,
384 unsigned int, unsigned long);
386 static void z90crypt_reader_task(unsigned long);
387 static void z90crypt_schedule_reader_task(unsigned long);
388 static void z90crypt_config_task(unsigned long);
389 static void z90crypt_cleanup_task(unsigned long);
391 static int z90crypt_status(char *, char **, off_t, int, int *, void *);
392 static int z90crypt_status_write(struct file *, const char *,
393 unsigned long, void *);
399 #ifdef Z90CRYPT_USE_HOTPLUG
400 #define Z90CRYPT_HOTPLUG_ADD 1
401 #define Z90CRYPT_HOTPLUG_REMOVE 2
403 static void z90crypt_hotplug_event(int, int, int);
407 * Storage allocated at initialization and used throughout the life of
410 #ifdef Z90CRYPT_USE_HOTPLUG
411 static int z90crypt_major = Z90CRYPT_MAJOR;
414 static int domain = DOMAIN_INDEX;
415 static struct z90crypt z90crypt;
416 static int quiesce_z90crypt;
417 static spinlock_t queuespinlock;
418 static struct list_head request_list;
419 static int requestq_count;
420 static struct list_head pending_list;
421 static int pendingq_count;
423 static struct tasklet_struct reader_tasklet;
424 static struct timer_list reader_timer;
425 static struct timer_list config_timer;
426 static struct timer_list cleanup_timer;
427 static atomic_t total_open;
428 static atomic_t z90crypt_step;
430 static struct file_operations z90crypt_fops = {
431 .owner = THIS_MODULE,
432 .read = z90crypt_read,
433 .write = z90crypt_write,
434 .ioctl = z90crypt_ioctl,
435 .open = z90crypt_open,
436 .release = z90crypt_release
439 #ifndef Z90CRYPT_USE_HOTPLUG
440 static struct miscdevice z90crypt_misc_device = {
441 .minor = Z90CRYPT_MINOR,
443 .fops = &z90crypt_fops,
444 .devfs_name = DEV_NAME
449 * Documentation values.
451 MODULE_AUTHOR("zLinux Crypto Team: Robert H. Burroughs, Eric D. Rossman"
452 "and Jochen Roehrig");
453 MODULE_DESCRIPTION("zLinux Cryptographic Coprocessor device driver, "
454 "Copyright 2001, 2004 IBM Corporation");
455 MODULE_LICENSE("GPL");
456 module_param(domain, int, 0);
457 MODULE_PARM_DESC(domain, "domain index for device");
461 * ioctl32 conversion routines
463 struct ica_rsa_modexpo_32 { // For 32-bit callers
464 compat_uptr_t inputdata;
465 unsigned int inputdatalength;
466 compat_uptr_t outputdata;
467 unsigned int outputdatalength;
469 compat_uptr_t n_modulus;
473 trans_modexpo32(unsigned int fd, unsigned int cmd, unsigned long arg,
476 struct ica_rsa_modexpo_32 *mex32u = compat_ptr(arg);
477 struct ica_rsa_modexpo_32 mex32k;
478 struct ica_rsa_modexpo *mex64;
482 if (!access_ok(VERIFY_WRITE, mex32u, sizeof(struct ica_rsa_modexpo_32)))
484 mex64 = compat_alloc_user_space(sizeof(struct ica_rsa_modexpo));
485 if (!access_ok(VERIFY_WRITE, mex64, sizeof(struct ica_rsa_modexpo)))
487 if (copy_from_user(&mex32k, mex32u, sizeof(struct ica_rsa_modexpo_32)))
489 if (__put_user(compat_ptr(mex32k.inputdata), &mex64->inputdata) ||
490 __put_user(mex32k.inputdatalength, &mex64->inputdatalength) ||
491 __put_user(compat_ptr(mex32k.outputdata), &mex64->outputdata) ||
492 __put_user(mex32k.outputdatalength, &mex64->outputdatalength) ||
493 __put_user(compat_ptr(mex32k.b_key), &mex64->b_key) ||
494 __put_user(compat_ptr(mex32k.n_modulus), &mex64->n_modulus))
496 ret = sys_ioctl(fd, cmd, (unsigned long)mex64);
498 if (__get_user(i, &mex64->outputdatalength) ||
499 __put_user(i, &mex32u->outputdatalength))
504 struct ica_rsa_modexpo_crt_32 { // For 32-bit callers
505 compat_uptr_t inputdata;
506 unsigned int inputdatalength;
507 compat_uptr_t outputdata;
508 unsigned int outputdatalength;
509 compat_uptr_t bp_key;
510 compat_uptr_t bq_key;
511 compat_uptr_t np_prime;
512 compat_uptr_t nq_prime;
513 compat_uptr_t u_mult_inv;
517 trans_modexpo_crt32(unsigned int fd, unsigned int cmd, unsigned long arg,
520 struct ica_rsa_modexpo_crt_32 *crt32u = compat_ptr(arg);
521 struct ica_rsa_modexpo_crt_32 crt32k;
522 struct ica_rsa_modexpo_crt *crt64;
526 if (!access_ok(VERIFY_WRITE, crt32u,
527 sizeof(struct ica_rsa_modexpo_crt_32)))
529 crt64 = compat_alloc_user_space(sizeof(struct ica_rsa_modexpo_crt));
530 if (!access_ok(VERIFY_WRITE, crt64, sizeof(struct ica_rsa_modexpo_crt)))
532 if (copy_from_user(&crt32k, crt32u,
533 sizeof(struct ica_rsa_modexpo_crt_32)))
535 if (__put_user(compat_ptr(crt32k.inputdata), &crt64->inputdata) ||
536 __put_user(crt32k.inputdatalength, &crt64->inputdatalength) ||
537 __put_user(compat_ptr(crt32k.outputdata), &crt64->outputdata) ||
538 __put_user(crt32k.outputdatalength, &crt64->outputdatalength) ||
539 __put_user(compat_ptr(crt32k.bp_key), &crt64->bp_key) ||
540 __put_user(compat_ptr(crt32k.bq_key), &crt64->bq_key) ||
541 __put_user(compat_ptr(crt32k.np_prime), &crt64->np_prime) ||
542 __put_user(compat_ptr(crt32k.nq_prime), &crt64->nq_prime) ||
543 __put_user(compat_ptr(crt32k.u_mult_inv), &crt64->u_mult_inv))
546 ret = sys_ioctl(fd, cmd, (unsigned long)crt64);
548 if (__get_user(i, &crt64->outputdatalength) ||
549 __put_user(i, &crt32u->outputdatalength))
554 static int compatible_ioctls[] = {
555 ICAZ90STATUS, Z90QUIESCE, Z90STAT_TOTALCOUNT, Z90STAT_PCICACOUNT,
556 Z90STAT_PCICCCOUNT, Z90STAT_PCIXCCCOUNT, Z90STAT_REQUESTQ_COUNT,
557 Z90STAT_PENDINGQ_COUNT, Z90STAT_TOTALOPEN_COUNT, Z90STAT_DOMAIN_INDEX,
558 Z90STAT_STATUS_MASK, Z90STAT_QDEPTH_MASK, Z90STAT_PERDEV_REQCNT,
561 static void z90_unregister_ioctl32s(void)
565 unregister_ioctl32_conversion(ICARSAMODEXPO);
566 unregister_ioctl32_conversion(ICARSACRT);
568 for(i = 0; i < ARRAY_SIZE(compatible_ioctls); i++)
569 unregister_ioctl32_conversion(compatible_ioctls[i]);
572 static int z90_register_ioctl32s(void)
576 result = register_ioctl32_conversion(ICARSAMODEXPO, trans_modexpo32);
579 result = register_ioctl32_conversion(ICARSACRT, trans_modexpo_crt32);
583 for(i = 0; i < ARRAY_SIZE(compatible_ioctls); i++) {
584 result = register_ioctl32_conversion(compatible_ioctls[i],NULL);
586 z90_unregister_ioctl32s();
592 #else // !CONFIG_COMPAT
593 static inline void z90_unregister_ioctl32s(void)
597 static inline int z90_register_ioctl32s(void)
604 * The module initialization code.
607 z90crypt_init_module(void)
610 struct proc_dir_entry *entry;
612 PDEBUG("PID %d\n", PID());
614 #ifndef Z90CRYPT_USE_HOTPLUG
615 /* Register as misc device with given minor (or get a dynamic one). */
616 result = misc_register(&z90crypt_misc_device);
618 PRINTKW(KERN_ERR "misc_register (minor %d) failed with %d\n",
619 z90crypt_misc_device.minor, result);
623 /* Register the major (or get a dynamic one). */
624 result = register_chrdev(z90crypt_major, REG_NAME, &z90crypt_fops);
626 PRINTKW("register_chrdev (major %d) failed with %d.\n",
627 z90crypt_major, result);
631 if (z90crypt_major == 0)
632 z90crypt_major = result;
635 PDEBUG("Registered " DEV_NAME " with result %d\n", result);
637 result = create_z90crypt(&domain);
639 PRINTKW("create_z90crypt (domain index %d) failed with %d.\n",
642 goto init_module_cleanup;
646 PRINTKN("Version %d.%d.%d loaded, built on %s %s\n",
647 z90crypt_VERSION, z90crypt_RELEASE, z90crypt_VARIANT,
649 PRINTKN("%s\n", z90cmain_version);
650 PRINTKN("%s\n", z90chardware_version);
651 PDEBUG("create_z90crypt (domain index %d) successful.\n",
654 PRINTK("No devices at startup\n");
656 #ifdef Z90CRYPT_USE_HOTPLUG
657 /* generate hotplug event for device node generation */
658 z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_ADD);
661 /* Initialize globals. */
662 spin_lock_init(&queuespinlock);
664 INIT_LIST_HEAD(&pending_list);
667 INIT_LIST_HEAD(&request_list);
670 quiesce_z90crypt = 0;
672 atomic_set(&total_open, 0);
673 atomic_set(&z90crypt_step, 0);
675 /* Set up the cleanup task. */
676 init_timer(&cleanup_timer);
677 cleanup_timer.function = z90crypt_cleanup_task;
678 cleanup_timer.data = 0;
679 cleanup_timer.expires = jiffies + (CLEANUPTIME * HZ);
680 add_timer(&cleanup_timer);
682 /* Set up the proc file system */
683 entry = create_proc_entry("driver/z90crypt", 0644, 0);
687 entry->read_proc = z90crypt_status;
688 entry->write_proc = z90crypt_status_write;
691 PRINTK("Couldn't create z90crypt proc entry\n");
692 z90crypt_entry = entry;
694 /* Set up the configuration task. */
695 init_timer(&config_timer);
696 config_timer.function = z90crypt_config_task;
697 config_timer.data = 0;
698 config_timer.expires = jiffies + (INITIAL_CONFIGTIME * HZ);
699 add_timer(&config_timer);
701 /* Set up the reader task */
702 tasklet_init(&reader_tasklet, z90crypt_reader_task, 0);
703 init_timer(&reader_timer);
704 reader_timer.function = z90crypt_schedule_reader_task;
705 reader_timer.data = 0;
706 reader_timer.expires = jiffies + (READERTIME * HZ / 1000);
707 add_timer(&reader_timer);
709 if ((result = z90_register_ioctl32s()))
710 goto init_module_cleanup;
715 z90_unregister_ioctl32s();
717 #ifndef Z90CRYPT_USE_HOTPLUG
718 if ((nresult = misc_deregister(&z90crypt_misc_device)))
719 PRINTK("misc_deregister failed with %d.\n", nresult);
721 PDEBUG("misc_deregister successful.\n");
723 if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME)))
724 PRINTK("unregister_chrdev failed with %d.\n", nresult);
726 PDEBUG("unregister_chrdev successful.\n");
729 return result; // failure
733 * The module termination code
736 z90crypt_cleanup_module(void)
740 PDEBUG("PID %d\n", PID());
742 z90_unregister_ioctl32s();
744 remove_proc_entry("driver/z90crypt", 0);
746 #ifndef Z90CRYPT_USE_HOTPLUG
747 if ((nresult = misc_deregister(&z90crypt_misc_device)))
748 PRINTK("misc_deregister failed with %d.\n", nresult);
750 PDEBUG("misc_deregister successful.\n");
752 z90crypt_hotplug_event(z90crypt_major, 0, Z90CRYPT_HOTPLUG_REMOVE);
754 if ((nresult = unregister_chrdev(z90crypt_major, REG_NAME)))
755 PRINTK("unregister_chrdev failed with %d.\n", nresult);
757 PDEBUG("unregister_chrdev successful.\n");
760 /* Remove the tasks */
761 tasklet_kill(&reader_tasklet);
762 del_timer(&reader_timer);
763 del_timer(&config_timer);
764 del_timer(&cleanup_timer);
768 PRINTKN("Unloaded.\n");
772 * Functions running under a process id
781 * z90crypt_status_write
791 * z90crypt_process_results
795 z90crypt_open(struct inode *inode, struct file *filp)
797 struct priv_data *private_data_p;
799 if (quiesce_z90crypt)
802 private_data_p = kmalloc(sizeof(struct priv_data), GFP_KERNEL);
803 if (!private_data_p) {
804 PRINTK("Memory allocate failed\n");
808 memset((void *)private_data_p, 0, sizeof(struct priv_data));
809 private_data_p->status = STAT_OPEN;
810 private_data_p->opener_pid = PID();
811 filp->private_data = private_data_p;
812 atomic_inc(&total_open);
818 z90crypt_release(struct inode *inode, struct file *filp)
820 struct priv_data *private_data_p = filp->private_data;
822 PDEBUG("PID %d (filp %p)\n", PID(), filp);
824 private_data_p->status = STAT_CLOSED;
825 memset(private_data_p, 0, sizeof(struct priv_data));
826 kfree(private_data_p);
827 atomic_dec(&total_open);
833 * there are two read functions, of which compile options will choose one
834 * without USE_GET_RANDOM_BYTES
835 * => read() always returns -EPERM;
837 * => read() uses get_random_bytes() kernel function
839 #ifndef USE_GET_RANDOM_BYTES
841 * z90crypt_read will not be supported beyond z90crypt 1.3.1
844 z90crypt_read(struct file *filp, char *buf, size_t count, loff_t *f_pos)
846 PDEBUG("filp %p (PID %d)\n", filp, PID());
849 #else // we want to use get_random_bytes
851 * read() just returns a string of random bytes. Since we have no way
852 * to generate these cryptographically, we just execute get_random_bytes
853 * for the length specified.
855 #include <linux/random.h>
857 z90crypt_read(struct file *filp, char *buf, size_t count, loff_t *f_pos)
859 unsigned char *temp_buff;
861 PDEBUG("filp %p (PID %d)\n", filp, PID());
863 if (quiesce_z90crypt)
866 PRINTK("Requested random byte count negative: %ld\n", count);
869 if (count > RESPBUFFSIZE) {
870 PDEBUG("count[%d] > RESPBUFFSIZE", count);
875 temp_buff = kmalloc(RESPBUFFSIZE, GFP_KERNEL);
877 PRINTK("Memory allocate failed\n");
880 get_random_bytes(temp_buff, count);
882 if (copy_to_user(buf, temp_buff, count) != 0) {
892 * Write is is not allowed
895 z90crypt_write(struct file *filp, const char *buf, size_t count, loff_t *f_pos)
897 PDEBUG("filp %p (PID %d)\n", filp, PID());
902 * New status functions
905 get_status_totalcount(void)
907 return z90crypt.hdware_info->hdware_mask.st_count;
911 get_status_PCICAcount(void)
913 return z90crypt.hdware_info->type_mask[PCICA].st_count;
917 get_status_PCICCcount(void)
919 return z90crypt.hdware_info->type_mask[PCICC].st_count;
923 get_status_PCIXCCcount(void)
925 return z90crypt.hdware_info->type_mask[PCIXCC].st_count;
929 get_status_requestq_count(void)
931 return requestq_count;
935 get_status_pendingq_count(void)
937 return pendingq_count;
941 get_status_totalopen_count(void)
943 return atomic_read(&total_open);
947 get_status_domain_index(void)
952 static inline unsigned char *
953 get_status_status_mask(unsigned char status[Z90CRYPT_NUM_APS])
957 memcpy(status, z90crypt.hdware_info->device_type_array,
960 for (i = 0; i < get_status_totalcount(); i++) {
962 if (LONG2DEVPTR(ix)->user_disabled)
969 static inline unsigned char *
970 get_status_qdepth_mask(unsigned char qdepth[Z90CRYPT_NUM_APS])
974 memset(qdepth, 0, Z90CRYPT_NUM_APS);
976 for (i = 0; i < get_status_totalcount(); i++) {
978 qdepth[ix] = LONG2DEVPTR(ix)->dev_caller_count;
984 static inline unsigned int *
985 get_status_perdevice_reqcnt(unsigned int reqcnt[Z90CRYPT_NUM_APS])
989 memset(reqcnt, 0, Z90CRYPT_NUM_APS * sizeof(int));
991 for (i = 0; i < get_status_totalcount(); i++) {
993 reqcnt[ix] = LONG2DEVPTR(ix)->dev_total_req_cnt;
1000 init_work_element(struct work_element *we_p,
1001 struct priv_data *priv_data, pid_t pid)
1005 we_p->requestptr = (unsigned char *)we_p + sizeof(struct work_element);
1006 /* Come up with a unique id for this caller. */
1007 step = atomic_inc_return(&z90crypt_step);
1008 memcpy(we_p->caller_id+0, (void *) &pid, sizeof(pid));
1009 memcpy(we_p->caller_id+4, (void *) &step, sizeof(step));
1011 we_p->priv_data = priv_data;
1012 we_p->status[0] = STAT_DEFAULT;
1013 we_p->audit[0] = 0x00;
1014 we_p->audit[1] = 0x00;
1015 we_p->audit[2] = 0x00;
1016 we_p->resp_buff_size = 0;
1018 we_p->devindex = -1; // send_to_crypto selects the device
1019 we_p->devtype = -1; // getCryptoBuffer selects the type
1020 atomic_set(&we_p->alarmrung, 0);
1021 init_waitqueue_head(&we_p->waitq);
1022 INIT_LIST_HEAD(&(we_p->liste));
1026 allocate_work_element(struct work_element **we_pp,
1027 struct priv_data *priv_data_p, pid_t pid)
1029 struct work_element *we_p;
1031 we_p = (struct work_element *) get_zeroed_page(GFP_KERNEL);
1034 init_work_element(we_p, priv_data_p, pid);
1040 remove_device(struct device *device_p)
1042 if (!device_p || device_p->disabled != 0)
1044 device_p->disabled = 1;
1045 z90crypt.hdware_info->type_mask[device_p->dev_type].disabled_count++;
1046 z90crypt.hdware_info->hdware_mask.disabled_count++;
1050 select_device_type(int *dev_type_p)
1052 struct status *stat;
1053 if ((*dev_type_p != PCICC) && (*dev_type_p != PCICA) &&
1054 (*dev_type_p != PCIXCC) && (*dev_type_p != ANYDEV))
1056 if (*dev_type_p != ANYDEV) {
1057 stat = &z90crypt.hdware_info->type_mask[*dev_type_p];
1058 if (stat->st_count >
1059 stat->disabled_count + stat->user_disabled_count)
1064 stat = &z90crypt.hdware_info->type_mask[PCICA];
1065 if (stat->st_count > stat->disabled_count + stat->user_disabled_count) {
1066 *dev_type_p = PCICA;
1070 stat = &z90crypt.hdware_info->type_mask[PCIXCC];
1071 if (stat->st_count > stat->disabled_count + stat->user_disabled_count) {
1072 *dev_type_p = PCIXCC;
1076 stat = &z90crypt.hdware_info->type_mask[PCICC];
1077 if (stat->st_count > stat->disabled_count + stat->user_disabled_count) {
1078 *dev_type_p = PCICC;
1086 * Try the selected number, then the selected type (can be ANYDEV)
1089 select_device(int *dev_type_p, int *device_nr_p)
1091 int i, indx, devTp, low_count, low_indx;
1092 struct device_x *index_p;
1093 struct device *dev_ptr;
1095 PDEBUG("device type = %d, index = %d\n", *dev_type_p, *device_nr_p);
1096 if ((*device_nr_p >= 0) && (*device_nr_p < Z90CRYPT_NUM_DEVS)) {
1097 PDEBUG("trying index = %d\n", *device_nr_p);
1098 dev_ptr = z90crypt.device_p[*device_nr_p];
1101 dev_ptr->dev_stat != DEV_GONE &&
1102 dev_ptr->disabled == 0 &&
1103 dev_ptr->user_disabled == 0) {
1104 PDEBUG("selected by number, index = %d\n",
1106 *dev_type_p = dev_ptr->dev_type;
1107 return *device_nr_p;
1111 PDEBUG("trying type = %d\n", *dev_type_p);
1112 devTp = *dev_type_p;
1113 if (select_device_type(&devTp) == -1) {
1114 PDEBUG("failed to select by type\n");
1117 PDEBUG("selected type = %d\n", devTp);
1118 index_p = &z90crypt.hdware_info->type_x_addr[devTp];
1119 low_count = 0x0000FFFF;
1121 for (i = 0; i < z90crypt.hdware_info->type_mask[devTp].st_count; i++) {
1122 indx = index_p->device_index[i];
1123 dev_ptr = z90crypt.device_p[indx];
1125 dev_ptr->dev_stat != DEV_GONE &&
1126 dev_ptr->disabled == 0 &&
1127 dev_ptr->user_disabled == 0 &&
1128 devTp == dev_ptr->dev_type &&
1129 low_count > dev_ptr->dev_caller_count) {
1130 low_count = dev_ptr->dev_caller_count;
1134 *device_nr_p = low_indx;
1139 send_to_crypto_device(struct work_element *we_p)
1141 struct caller *caller_p;
1142 struct device *device_p;
1145 if (!we_p->requestptr)
1146 return SEN_FATAL_ERROR;
1147 caller_p = (struct caller *)we_p->requestptr;
1148 dev_nr = we_p->devindex;
1149 if (select_device(&we_p->devtype, &dev_nr) == -1) {
1150 if (z90crypt.hdware_info->hdware_mask.st_count != 0)
1153 return SEN_NOT_AVAIL;
1155 we_p->devindex = dev_nr;
1156 device_p = z90crypt.device_p[dev_nr];
1158 return SEN_NOT_AVAIL;
1159 if (device_p->dev_type != we_p->devtype)
1161 if (device_p->dev_caller_count >= device_p->dev_q_depth)
1162 return SEN_QUEUE_FULL;
1163 PDEBUG("device number prior to send: %d\n", dev_nr);
1164 switch (send_to_AP(dev_nr, z90crypt.cdx,
1165 caller_p->caller_dev_dep_req_l,
1166 caller_p->caller_dev_dep_req_p)) {
1167 case DEV_SEN_EXCEPTION:
1168 PRINTKC("Exception during send to device %d\n", dev_nr);
1169 z90crypt.terminating = 1;
1170 return SEN_FATAL_ERROR;
1172 PRINTK("Device %d not available\n", dev_nr);
1173 remove_device(device_p);
1174 return SEN_NOT_AVAIL;
1176 return SEN_NOT_AVAIL;
1178 return SEN_FATAL_ERROR;
1179 case DEV_BAD_MESSAGE:
1180 return SEN_USER_ERROR;
1181 case DEV_QUEUE_FULL:
1182 return SEN_QUEUE_FULL;
1187 list_add_tail(&(caller_p->caller_liste), &(device_p->dev_caller_list));
1188 device_p->dev_caller_count++;
1193 * Send puts the user's work on one of two queues:
1194 * the pending queue if the send was successful
1195 * the request queue if the send failed because device full or busy
1198 z90crypt_send(struct work_element *we_p, const char *buf)
1202 PDEBUG("PID %d\n", PID());
1204 if (CHK_RDWRMASK(we_p->status[0]) != STAT_NOWORK) {
1205 PDEBUG("PID %d tried to send more work but has outstanding "
1209 we_p->devindex = -1; // Reset device number
1210 spin_lock_irq(&queuespinlock);
1211 rv = send_to_crypto_device(we_p);
1214 we_p->requestsent = jiffies;
1215 we_p->audit[0] |= FP_SENT;
1216 list_add_tail(&we_p->liste, &pending_list);
1218 we_p->audit[0] |= FP_PENDING;
1221 case SEN_QUEUE_FULL:
1223 we_p->devindex = -1; // any device will do
1224 we_p->requestsent = jiffies;
1225 list_add_tail(&we_p->liste, &request_list);
1227 we_p->audit[0] |= FP_REQUEST;
1233 PRINTK("*** No devices available.\n");
1234 rv = we_p->retcode = -ENODEV;
1235 we_p->status[0] |= STAT_FAILED;
1237 case REC_OPERAND_INV:
1238 case REC_OPERAND_SIZE:
1240 case REC_INVALID_PAD:
1241 rv = we_p->retcode = -EINVAL;
1242 we_p->status[0] |= STAT_FAILED;
1246 we_p->status[0] |= STAT_FAILED;
1249 if (rv != -ERESTARTSYS)
1250 SET_RDWRMASK(we_p->status[0], STAT_WRITTEN);
1251 spin_unlock_irq(&queuespinlock);
1253 tasklet_schedule(&reader_tasklet);
1258 * process_results copies the user's work from kernel space.
1261 z90crypt_process_results(struct work_element *we_p, char *buf)
1265 PDEBUG("we_p %p (PID %d)\n", we_p, PID());
1267 LONG2DEVPTR(we_p->devindex)->dev_total_req_cnt++;
1268 SET_RDWRMASK(we_p->status[0], STAT_READPEND);
1271 if (!we_p->buffer) {
1272 PRINTK("we_p %p PID %d in STAT_READPEND: buffer NULL.\n",
1278 if ((rv = copy_to_user(buf, we_p->buffer, we_p->buff_size))) {
1279 PDEBUG("copy_to_user failed: rv = %d\n", rv);
1286 if (we_p->resp_buff_size
1287 && copy_to_user(we_p->resp_addr, we_p->resp_buff,
1288 we_p->resp_buff_size))
1291 SET_RDWRMASK(we_p->status[0], STAT_NOWORK);
1295 static unsigned char NULL_psmid[8] =
1296 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
1299 * MIN_MOD_SIZE is a PCICC and PCIXCC limit.
1300 * MAX_PCICC_MOD_SIZE is a hard limit for the PCICC.
1301 * MAX_MOD_SIZE is a hard limit for the PCIXCC and PCICA.
1303 #define MIN_MOD_SIZE 64
1304 #define MAX_PCICC_MOD_SIZE 128
1305 #define MAX_MOD_SIZE 256
1308 * Used in device configuration functions
1310 #define MAX_RESET 90
1313 * This is used only for PCICC support
1316 is_PKCS11_padded(unsigned char *buffer, int length)
1319 if ((buffer[0] != 0x00) || (buffer[1] != 0x01))
1321 for (i = 2; i < length; i++)
1322 if (buffer[i] != 0xFF)
1324 if ((i < 10) || (i == length))
1326 if (buffer[i] != 0x00)
1332 * This is used only for PCICC support
1335 is_PKCS12_padded(unsigned char *buffer, int length)
1338 if ((buffer[0] != 0x00) || (buffer[1] != 0x02))
1340 for (i = 2; i < length; i++)
1341 if (buffer[i] == 0x00)
1343 if ((i < 10) || (i == length))
1345 if (buffer[i] != 0x00)
1351 * builds struct caller and converts message from generic format to
1352 * device-dependent format
1353 * func is ICARSAMODEXPO or ICARSACRT
1354 * function is PCI_FUNC_KEY_ENCRYPT or PCI_FUNC_KEY_DECRYPT
1357 build_caller(struct work_element *we_p, short function)
1360 struct caller *caller_p = (struct caller *)we_p->requestptr;
1362 if ((we_p->devtype != PCICC) && (we_p->devtype != PCICA) &&
1363 (we_p->devtype != PCIXCC))
1364 return SEN_NOT_AVAIL;
1366 memcpy(caller_p->caller_id, we_p->caller_id,
1367 sizeof(caller_p->caller_id));
1368 caller_p->caller_dev_dep_req_p = caller_p->caller_dev_dep_req;
1369 caller_p->caller_dev_dep_req_l = MAX_RESPONSE_SIZE;
1370 caller_p->caller_buf_p = we_p->buffer;
1371 INIT_LIST_HEAD(&(caller_p->caller_liste));
1373 rv = convert_request(we_p->buffer, we_p->funccode, function,
1374 z90crypt.cdx, we_p->devtype,
1375 &caller_p->caller_dev_dep_req_l,
1376 caller_p->caller_dev_dep_req_p);
1378 if (rv == SEN_NOT_AVAIL)
1379 PDEBUG("request can't be processed on hdwr avail\n");
1381 PRINTK("Error from convert_request: %d\n", rv);
1384 memcpy(&(caller_p->caller_dev_dep_req_p[4]), we_p->caller_id,8);
1389 unbuild_caller(struct device *device_p, struct caller *caller_p)
1393 if (caller_p->caller_liste.next && caller_p->caller_liste.prev)
1394 if (!list_empty(&caller_p->caller_liste)) {
1395 list_del(&caller_p->caller_liste);
1396 device_p->dev_caller_count--;
1397 INIT_LIST_HEAD(&caller_p->caller_liste);
1399 memset(caller_p->caller_id, 0, sizeof(caller_p->caller_id));
1403 get_crypto_request_buffer(struct work_element *we_p)
1405 struct ica_rsa_modexpo *mex_p;
1406 struct ica_rsa_modexpo_crt *crt_p;
1407 unsigned char *temp_buffer;
1411 mex_p = (struct ica_rsa_modexpo *) we_p->buffer;
1412 crt_p = (struct ica_rsa_modexpo_crt *) we_p->buffer;
1414 PDEBUG("device type input = %d\n", we_p->devtype);
1416 if (z90crypt.terminating)
1417 return REC_NO_RESPONSE;
1418 if (memcmp(we_p->caller_id, NULL_psmid, 8) == 0) {
1419 PRINTK("psmid zeroes\n");
1420 return SEN_FATAL_ERROR;
1422 if (!we_p->buffer) {
1423 PRINTK("buffer pointer NULL\n");
1424 return SEN_USER_ERROR;
1426 if (!we_p->requestptr) {
1427 PRINTK("caller pointer NULL\n");
1428 return SEN_USER_ERROR;
1431 if ((we_p->devtype != PCICA) && (we_p->devtype != PCICC) &&
1432 (we_p->devtype != PCIXCC) && (we_p->devtype != ANYDEV)) {
1433 PRINTK("invalid device type\n");
1434 return SEN_USER_ERROR;
1437 if ((mex_p->inputdatalength < 1) ||
1438 (mex_p->inputdatalength > MAX_MOD_SIZE)) {
1439 PRINTK("inputdatalength[%d] is not valid\n",
1440 mex_p->inputdatalength);
1441 return SEN_USER_ERROR;
1444 if (mex_p->outputdatalength < mex_p->inputdatalength) {
1445 PRINTK("outputdatalength[%d] < inputdatalength[%d]\n",
1446 mex_p->outputdatalength, mex_p->inputdatalength);
1447 return SEN_USER_ERROR;
1450 if (!mex_p->inputdata || !mex_p->outputdata) {
1451 PRINTK("inputdata[%p] or outputdata[%p] is NULL\n",
1452 mex_p->outputdata, mex_p->inputdata);
1453 return SEN_USER_ERROR;
1457 * As long as outputdatalength is big enough, we can set the
1458 * outputdatalength equal to the inputdatalength, since that is the
1459 * number of bytes we will copy in any case
1461 mex_p->outputdatalength = mex_p->inputdatalength;
1464 switch (we_p->funccode) {
1466 if (!mex_p->b_key || !mex_p->n_modulus)
1467 rv = SEN_USER_ERROR;
1470 if (!IS_EVEN(crt_p->inputdatalength)) {
1471 PRINTK("inputdatalength[%d] is odd, CRT form\n",
1472 crt_p->inputdatalength);
1473 rv = SEN_USER_ERROR;
1476 if (!crt_p->bp_key ||
1480 !crt_p->u_mult_inv) {
1481 PRINTK("CRT form, bad data: %p/%p/%p/%p/%p\n",
1482 crt_p->bp_key, crt_p->bq_key,
1483 crt_p->np_prime, crt_p->nq_prime,
1485 rv = SEN_USER_ERROR;
1489 PRINTK("bad func = %d\n", we_p->funccode);
1490 rv = SEN_USER_ERROR;
1496 if (select_device_type(&we_p->devtype) < 0)
1497 return SEN_NOT_AVAIL;
1499 temp_buffer = (unsigned char *)we_p + sizeof(struct work_element) +
1500 sizeof(struct caller);
1501 if (copy_from_user(temp_buffer, mex_p->inputdata,
1502 mex_p->inputdatalength) != 0)
1503 return SEN_RELEASED;
1505 function = PCI_FUNC_KEY_ENCRYPT;
1506 switch (we_p->devtype) {
1507 /* PCICA does everything with a simple RSA mod-expo operation */
1509 function = PCI_FUNC_KEY_ENCRYPT;
1512 * PCIXCC does all Mod-Expo form with a simple RSA mod-expo
1513 * operation, and all CRT forms with a PKCS-1.2 format decrypt.
1516 /* Anything less than MIN_MOD_SIZE MUST go to a PCICA */
1517 if (mex_p->inputdatalength < MIN_MOD_SIZE)
1518 return SEN_NOT_AVAIL;
1519 if (we_p->funccode == ICARSAMODEXPO)
1520 function = PCI_FUNC_KEY_ENCRYPT;
1522 function = PCI_FUNC_KEY_DECRYPT;
1525 * PCICC does everything as a PKCS-1.2 format request
1528 /* Anything less than MIN_MOD_SIZE MUST go to a PCICA */
1529 if (mex_p->inputdatalength < MIN_MOD_SIZE) {
1530 return SEN_NOT_AVAIL;
1532 /* Anythings over MAX_PCICC_MOD_SIZE MUST go to a PCICA */
1533 if (mex_p->inputdatalength > MAX_PCICC_MOD_SIZE) {
1534 return SEN_NOT_AVAIL;
1536 /* PCICC cannot handle input that is is PKCS#1.1 padded */
1537 if (is_PKCS11_padded(temp_buffer, mex_p->inputdatalength)) {
1538 return SEN_NOT_AVAIL;
1540 if (we_p->funccode == ICARSAMODEXPO) {
1541 if (is_PKCS12_padded(temp_buffer,
1542 mex_p->inputdatalength))
1543 function = PCI_FUNC_KEY_ENCRYPT;
1545 function = PCI_FUNC_KEY_DECRYPT;
1547 /* all CRT forms are decrypts */
1548 function = PCI_FUNC_KEY_DECRYPT;
1551 PDEBUG("function: %04x\n", function);
1552 rv = build_caller(we_p, function);
1553 PDEBUG("rv from build_caller = %d\n", rv);
1558 z90crypt_prepare(struct work_element *we_p, unsigned int funccode,
1563 we_p->devindex = -1;
1564 if (funccode == ICARSAMODEXPO)
1565 we_p->buff_size = sizeof(struct ica_rsa_modexpo);
1567 we_p->buff_size = sizeof(struct ica_rsa_modexpo_crt);
1569 if (copy_from_user(we_p->buffer, buffer, we_p->buff_size))
1572 we_p->audit[0] |= FP_COPYFROM;
1573 SET_RDWRMASK(we_p->status[0], STAT_WRITTEN);
1574 we_p->funccode = funccode;
1576 we_p->audit[0] |= FP_BUFFREQ;
1577 rv = get_crypto_request_buffer(we_p);
1580 we_p->audit[0] |= FP_BUFFGOT;
1582 case SEN_USER_ERROR:
1585 case SEN_QUEUE_FULL:
1591 case REC_NO_RESPONSE:
1598 PRINTK("rv = %d\n", rv);
1602 if (CHK_RDWRMASK(we_p->status[0]) == STAT_WRITTEN)
1603 SET_RDWRMASK(we_p->status[0], STAT_DEFAULT);
1608 purge_work_element(struct work_element *we_p)
1610 struct list_head *lptr;
1612 spin_lock_irq(&queuespinlock);
1613 list_for_each(lptr, &request_list) {
1614 if (lptr == &we_p->liste) {
1620 list_for_each(lptr, &pending_list) {
1621 if (lptr == &we_p->liste) {
1627 spin_unlock_irq(&queuespinlock);
1631 * Build the request and send it.
1634 z90crypt_rsa(struct priv_data *private_data_p, pid_t pid,
1635 unsigned int cmd, unsigned long arg)
1637 struct work_element *we_p;
1640 if ((rv = allocate_work_element(&we_p, private_data_p, pid))) {
1641 PDEBUG("PID %d: allocate_work_element returned ENOMEM\n", pid);
1644 if ((rv = z90crypt_prepare(we_p, cmd, (const char *)arg)))
1645 PDEBUG("PID %d: rv = %d from z90crypt_prepare\n", pid, rv);
1647 if ((rv = z90crypt_send(we_p, (const char *)arg)))
1648 PDEBUG("PID %d: rv %d from z90crypt_send.\n", pid, rv);
1650 we_p->audit[0] |= FP_ASLEEP;
1651 wait_event(we_p->waitq, atomic_read(&we_p->alarmrung));
1652 we_p->audit[0] |= FP_AWAKE;
1656 rv = z90crypt_process_results(we_p, (char *)arg);
1658 if ((we_p->status[0] & STAT_FAILED)) {
1661 * EINVAL *after* receive is almost always padding
1662 * error issued by a PCICC or PCIXCC. We convert this
1663 * return value to -EGETBUFF which should trigger a
1664 * fallback to software.
1667 if ((we_p->devtype == PCICC) ||
1668 (we_p->devtype == PCIXCC))
1672 if (z90crypt.mask.st_count > 0)
1673 rv = -ERESTARTSYS; // retry with another
1675 rv = -ENODEV; // no cards left
1676 /* fall through to clean up request queue */
1679 switch (CHK_RDWRMASK(we_p->status[0])) {
1681 purge_work_element(we_p);
1690 we_p->status[0] ^= STAT_FAILED;
1694 free_page((long)we_p);
1699 * This function is a little long, but it's really just one large switch
1703 z90crypt_ioctl(struct inode *inode, struct file *filp,
1704 unsigned int cmd, unsigned long arg)
1706 struct priv_data *private_data_p = filp->private_data;
1707 unsigned char *status;
1708 unsigned char *qdepth;
1709 unsigned int *reqcnt;
1710 struct ica_z90_status *pstat;
1711 int ret, i, loopLim, tempstat;
1712 static int deprecated_msg_count = 0;
1714 PDEBUG("filp %p (PID %d), cmd 0x%08X\n", filp, PID(), cmd);
1715 PDEBUG("cmd 0x%08X: dir %s, size 0x%04X, type 0x%02X, nr 0x%02X\n",
1717 !_IOC_DIR(cmd) ? "NO"
1718 : ((_IOC_DIR(cmd) == (_IOC_READ|_IOC_WRITE)) ? "RW"
1719 : ((_IOC_DIR(cmd) == _IOC_READ) ? "RD"
1721 _IOC_SIZE(cmd), _IOC_TYPE(cmd), _IOC_NR(cmd));
1723 if (_IOC_TYPE(cmd) != Z90_IOCTL_MAGIC) {
1724 PRINTK("cmd 0x%08X contains bad magic\n", cmd);
1732 if (quiesce_z90crypt) {
1736 ret = -ENODEV; // Default if no devices
1737 loopLim = z90crypt.hdware_info->hdware_mask.st_count -
1738 (z90crypt.hdware_info->hdware_mask.disabled_count +
1739 z90crypt.hdware_info->hdware_mask.user_disabled_count);
1740 for (i = 0; i < loopLim; i++) {
1741 ret = z90crypt_rsa(private_data_p, PID(), cmd, arg);
1742 if (ret != -ERESTARTSYS)
1745 if (ret == -ERESTARTSYS)
1749 case Z90STAT_TOTALCOUNT:
1750 tempstat = get_status_totalcount();
1751 if (copy_to_user((int *)arg, &tempstat,sizeof(int)) != 0)
1755 case Z90STAT_PCICACOUNT:
1756 tempstat = get_status_PCICAcount();
1757 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1761 case Z90STAT_PCICCCOUNT:
1762 tempstat = get_status_PCICCcount();
1763 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1767 case Z90STAT_PCIXCCCOUNT:
1768 tempstat = get_status_PCIXCCcount();
1769 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1773 case Z90STAT_REQUESTQ_COUNT:
1774 tempstat = get_status_requestq_count();
1775 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1779 case Z90STAT_PENDINGQ_COUNT:
1780 tempstat = get_status_pendingq_count();
1781 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1785 case Z90STAT_TOTALOPEN_COUNT:
1786 tempstat = get_status_totalopen_count();
1787 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1791 case Z90STAT_DOMAIN_INDEX:
1792 tempstat = get_status_domain_index();
1793 if (copy_to_user((int *)arg, &tempstat, sizeof(int)) != 0)
1797 case Z90STAT_STATUS_MASK:
1798 status = kmalloc(Z90CRYPT_NUM_APS, GFP_KERNEL);
1800 PRINTK("kmalloc for status failed!\n");
1804 get_status_status_mask(status);
1805 if (copy_to_user((char *) arg, status, Z90CRYPT_NUM_APS) != 0)
1810 case Z90STAT_QDEPTH_MASK:
1811 qdepth = kmalloc(Z90CRYPT_NUM_APS, GFP_KERNEL);
1813 PRINTK("kmalloc for qdepth failed!\n");
1817 get_status_qdepth_mask(qdepth);
1818 if (copy_to_user((char *) arg, qdepth, Z90CRYPT_NUM_APS) != 0)
1823 case Z90STAT_PERDEV_REQCNT:
1824 reqcnt = kmalloc(sizeof(int) * Z90CRYPT_NUM_APS, GFP_KERNEL);
1826 PRINTK("kmalloc for reqcnt failed!\n");
1830 get_status_perdevice_reqcnt(reqcnt);
1831 if (copy_to_user((char *) arg, reqcnt,
1832 Z90CRYPT_NUM_APS * sizeof(int)) != 0)
1837 /* THIS IS DEPRECATED. USE THE NEW STATUS CALLS */
1839 if (deprecated_msg_count < 100) {
1840 PRINTK("deprecated call to ioctl (ICAZ90STATUS)!\n");
1841 deprecated_msg_count++;
1842 if (deprecated_msg_count == 100)
1843 PRINTK("No longer issuing messages related to "
1844 "deprecated call to ICAZ90STATUS.\n");
1847 pstat = kmalloc(sizeof(struct ica_z90_status), GFP_KERNEL);
1849 PRINTK("kmalloc for pstat failed!\n");
1854 pstat->totalcount = get_status_totalcount();
1855 pstat->leedslitecount = get_status_PCICAcount();
1856 pstat->leeds2count = get_status_PCICCcount();
1857 pstat->requestqWaitCount = get_status_requestq_count();
1858 pstat->pendingqWaitCount = get_status_pendingq_count();
1859 pstat->totalOpenCount = get_status_totalopen_count();
1860 pstat->cryptoDomain = get_status_domain_index();
1861 get_status_status_mask(pstat->status);
1862 get_status_qdepth_mask(pstat->qdepth);
1864 if (copy_to_user((struct ica_z90_status *) arg, pstat,
1865 sizeof(struct ica_z90_status)) != 0)
1871 if (current->euid != 0) {
1872 PRINTK("QUIESCE fails: euid %d\n",
1876 PRINTK("QUIESCE device from PID %d\n", PID());
1877 quiesce_z90crypt = 1;
1882 /* user passed an invalid IOCTL number */
1883 PDEBUG("cmd 0x%08X contains invalid ioctl code\n", cmd);
1892 sprintcl(unsigned char *outaddr, unsigned char *addr, unsigned int len)
1897 for (i = 0; i < len; i++)
1898 hl += sprintf(outaddr+hl, "%01x", (unsigned int) addr[i]);
1899 hl += sprintf(outaddr+hl, " ");
1905 sprintrw(unsigned char *outaddr, unsigned char *addr, unsigned int len)
1909 hl = sprintf(outaddr, " ");
1911 for (c = 0; c < (len / 16); c++) {
1912 hl += sprintcl(outaddr+hl, addr+inl, 16);
1918 hl += sprintcl(outaddr+hl, addr+inl, cx);
1922 hl += sprintf(outaddr+hl, "\n");
1928 sprinthx(unsigned char *title, unsigned char *outaddr,
1929 unsigned char *addr, unsigned int len)
1933 hl = sprintf(outaddr, "\n%s\n", title);
1935 for (r = 0; r < (len / 64); r++) {
1936 hl += sprintrw(outaddr+hl, addr+inl, 64);
1941 hl += sprintrw(outaddr+hl, addr+inl, rx);
1945 hl += sprintf(outaddr+hl, "\n");
1951 sprinthx4(unsigned char *title, unsigned char *outaddr,
1952 unsigned int *array, unsigned int len)
1956 hl = sprintf(outaddr, "\n%s\n", title);
1958 for (r = 0; r < len; r++) {
1960 hl += sprintf(outaddr+hl, " ");
1961 hl += sprintf(outaddr+hl, "%08X ", array[r]);
1963 hl += sprintf(outaddr+hl, "\n");
1966 hl += sprintf(outaddr+hl, "\n");
1972 z90crypt_status(char *resp_buff, char **start, off_t offset,
1973 int count, int *eof, void *data)
1975 unsigned char *workarea;
1978 /* resp_buff is a page. Use the right half for a work area */
1979 workarea = resp_buff+2000;
1981 len += sprintf(resp_buff+len, "\nz90crypt version: %d.%d.%d\n",
1982 z90crypt_VERSION, z90crypt_RELEASE, z90crypt_VARIANT);
1983 len += sprintf(resp_buff+len, "Cryptographic domain: %d\n",
1984 get_status_domain_index());
1985 len += sprintf(resp_buff+len, "Total device count: %d\n",
1986 get_status_totalcount());
1987 len += sprintf(resp_buff+len, "PCICA count: %d\n",
1988 get_status_PCICAcount());
1989 len += sprintf(resp_buff+len, "PCICC count: %d\n",
1990 get_status_PCICCcount());
1991 len += sprintf(resp_buff+len, "PCIXCC count: %d\n",
1992 get_status_PCIXCCcount());
1993 len += sprintf(resp_buff+len, "requestq count: %d\n",
1994 get_status_requestq_count());
1995 len += sprintf(resp_buff+len, "pendingq count: %d\n",
1996 get_status_pendingq_count());
1997 len += sprintf(resp_buff+len, "Total open handles: %d\n\n",
1998 get_status_totalopen_count());
2000 "Online devices: 1 means PCICA, 2 means PCICC, 3 means PCIXCC",
2002 get_status_status_mask(workarea),
2004 len += sprinthx("Waiting work element counts",
2006 get_status_qdepth_mask(workarea),
2009 "Per-device successfully completed request counts",
2011 get_status_perdevice_reqcnt((unsigned int *)workarea),
2014 memset(workarea, 0, Z90CRYPT_NUM_APS * sizeof(unsigned int));
2019 disable_card(int card_index)
2021 struct device *devp;
2023 devp = LONG2DEVPTR(card_index);
2024 if (!devp || devp->user_disabled)
2026 devp->user_disabled = 1;
2027 z90crypt.hdware_info->hdware_mask.user_disabled_count++;
2028 if (devp->dev_type == -1)
2030 z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count++;
2034 enable_card(int card_index)
2036 struct device *devp;
2038 devp = LONG2DEVPTR(card_index);
2039 if (!devp || !devp->user_disabled)
2041 devp->user_disabled = 0;
2042 z90crypt.hdware_info->hdware_mask.user_disabled_count--;
2043 if (devp->dev_type == -1)
2045 z90crypt.hdware_info->type_mask[devp->dev_type].user_disabled_count--;
2049 scan_char(unsigned char *bf, unsigned int len,
2050 unsigned int *offs, unsigned int *p_eof, unsigned char c)
2052 unsigned int i, found;
2055 for (i = 0; i < len; i++) {
2060 if (bf[i] == '\0') {
2064 if (bf[i] == '\n') {
2073 scan_string(unsigned char *bf, unsigned int len,
2074 unsigned int *offs, unsigned int *p_eof, unsigned char *s)
2076 unsigned int temp_len, temp_offs, found, eof;
2078 temp_len = temp_offs = found = eof = 0;
2079 while (!eof && !found) {
2080 found = scan_char(bf+temp_len, len-temp_len,
2081 &temp_offs, &eof, *s);
2083 temp_len += temp_offs;
2090 if (len >= temp_offs+strlen(s)) {
2091 found = !strncmp(bf+temp_len-1, s, strlen(s));
2093 *offs = temp_len+strlen(s)-1;
2107 z90crypt_status_write(struct file *file, const char *buffer,
2108 unsigned long count, void *data)
2110 int i, j, len, offs, found, eof;
2111 unsigned char *lbuf;
2112 unsigned int local_count;
2114 #define LBUFSIZE 600
2115 lbuf = kmalloc(LBUFSIZE, GFP_KERNEL);
2117 PRINTK("kmalloc failed!\n");
2124 local_count = UMIN((unsigned int)count, LBUFSIZE-1);
2126 if (copy_from_user(lbuf, buffer, local_count) != 0) {
2131 lbuf[local_count-1] = '\0';
2137 found = scan_string(lbuf+len, local_count-len, &offs, &eof,
2150 found = scan_char(lbuf+len, local_count-len, &offs, &eof, '\n');
2152 if (!found || eof) {
2159 for (i = 0; i < 80; i++) {
2160 switch (*(lbuf+len+i)) {
2194 * Functions that run under a timer, with no process id
2196 * The task functions:
2197 * z90crypt_reader_task
2199 * helper_handle_work_element
2201 * z90crypt_config_task
2202 * z90crypt_cleanup_task
2205 * z90crypt_schedule_reader_timer
2206 * z90crypt_schedule_reader_task
2207 * z90crypt_schedule_config_task
2208 * z90crypt_schedule_cleanup_task
2211 receive_from_crypto_device(int index, unsigned char *psmid, int *buff_len_p,
2212 unsigned char *buff, unsigned char **dest_p_p)
2215 struct device *dev_ptr;
2216 struct caller *caller_p;
2217 struct ica_rsa_modexpo *icaMsg_p;
2218 struct list_head *ptr, *tptr;
2220 memcpy(psmid, NULL_psmid, sizeof(NULL_psmid));
2222 if (z90crypt.terminating)
2223 return REC_FATAL_ERROR;
2226 dev_ptr = z90crypt.device_p[index];
2229 PDEBUG("Dequeue called for device %d\n", index);
2230 if (!dev_ptr || dev_ptr->disabled) {
2231 rv = REC_NO_RESPONSE;
2234 if (dev_ptr->dev_self_x != index) {
2235 PRINTK("Corrupt dev ptr in receive_from_AP\n");
2236 z90crypt.terminating = 1;
2237 rv = REC_FATAL_ERROR;
2240 if (!dev_ptr->dev_resp_l || !dev_ptr->dev_resp_p) {
2241 dv = DEV_REC_EXCEPTION;
2242 PRINTK("dev_resp_l = %d, dev_resp_p = %p\n",
2243 dev_ptr->dev_resp_l, dev_ptr->dev_resp_p);
2245 dv = receive_from_AP(index, z90crypt.cdx,
2246 dev_ptr->dev_resp_l,
2247 dev_ptr->dev_resp_p, psmid);
2250 case DEV_REC_EXCEPTION:
2251 rv = REC_FATAL_ERROR;
2252 z90crypt.terminating = 1;
2253 PRINTKC("Exception in receive from device %d\n",
2265 case DEV_BAD_MESSAGE:
2267 case REC_HARDWAR_ERR:
2269 rv = REC_NO_RESPONSE;
2274 if (dev_ptr->dev_caller_count <= 0) {
2279 list_for_each_safe(ptr, tptr, &dev_ptr->dev_caller_list) {
2280 caller_p = list_entry(ptr, struct caller, caller_liste);
2281 if (!memcmp(caller_p->caller_id, psmid,
2282 sizeof(caller_p->caller_id))) {
2283 if (!list_empty(&caller_p->caller_liste)) {
2285 dev_ptr->dev_caller_count--;
2286 INIT_LIST_HEAD(&caller_p->caller_liste);
2297 PDEBUG("caller_p after successful receive: %p\n", caller_p);
2298 rv = convert_response(dev_ptr->dev_resp_p,
2299 caller_p->caller_buf_p, buff_len_p, buff);
2301 case REC_OPERAND_INV:
2302 PDEBUG("dev %d: user error %d\n", index, rv);
2304 case WRONG_DEVICE_TYPE:
2305 case REC_HARDWAR_ERR:
2306 case REC_BAD_MESSAGE:
2307 PRINTK("dev %d: hardware error %d\n",
2309 rv = REC_NO_RESPONSE;
2312 PDEBUG("dev %d: REC_RELEASED = %d\n",
2316 PDEBUG("dev %d: rv = %d\n", index, rv);
2323 PDEBUG("Successful receive from device %d\n", index);
2324 icaMsg_p = (struct ica_rsa_modexpo *)caller_p->caller_buf_p;
2325 *dest_p_p = icaMsg_p->outputdata;
2326 if (*buff_len_p == 0)
2327 PRINTK("Zero *buff_len_p\n");
2329 case REC_NO_RESPONSE:
2330 remove_device(dev_ptr);
2335 unbuild_caller(dev_ptr, caller_p);
2341 helper_send_work(int index)
2343 struct work_element *rq_p;
2346 if (list_empty(&request_list))
2349 rq_p = list_entry(request_list.next, struct work_element, liste);
2350 list_del(&rq_p->liste);
2351 rq_p->audit[1] |= FP_REMREQUEST;
2352 if (rq_p->devtype == SHRT2DEVPTR(index)->dev_type) {
2353 rq_p->devindex = SHRT2LONG(index);
2354 rv = send_to_crypto_device(rq_p);
2356 rq_p->requestsent = jiffies;
2357 rq_p->audit[0] |= FP_SENT;
2358 list_add_tail(&rq_p->liste, &pending_list);
2360 rq_p->audit[0] |= FP_PENDING;
2363 case REC_OPERAND_INV:
2364 case REC_OPERAND_SIZE:
2366 case REC_INVALID_PAD:
2367 rq_p->retcode = -EINVAL;
2371 case REC_NO_RESPONSE:
2373 if (z90crypt.mask.st_count > 1)
2377 rq_p->retcode = -ENODEV;
2380 rq_p->status[0] |= STAT_FAILED;
2381 rq_p->audit[1] |= FP_AWAKENING;
2382 atomic_set(&rq_p->alarmrung, 1);
2383 wake_up(&rq_p->waitq);
2386 if (z90crypt.mask.st_count > 1)
2387 rq_p->retcode = -ERESTARTSYS;
2389 rq_p->retcode = -ENODEV;
2390 rq_p->status[0] |= STAT_FAILED;
2391 rq_p->audit[1] |= FP_AWAKENING;
2392 atomic_set(&rq_p->alarmrung, 1);
2393 wake_up(&rq_p->waitq);
2398 helper_handle_work_element(int index, unsigned char psmid[8], int rc,
2399 int buff_len, unsigned char *buff,
2400 unsigned char *resp_addr)
2402 struct work_element *pq_p;
2403 struct list_head *lptr, *tptr;
2406 list_for_each_safe(lptr, tptr, &pending_list) {
2407 pq_p = list_entry(lptr, struct work_element, liste);
2408 if (!memcmp(pq_p->caller_id, psmid, sizeof(pq_p->caller_id))) {
2411 pq_p->audit[1] |= FP_NOTPENDING;
2418 PRINTK("device %d has work but no caller exists on pending Q\n",
2425 pq_p->resp_buff_size = buff_len;
2426 pq_p->audit[1] |= FP_RESPSIZESET;
2428 pq_p->resp_addr = resp_addr;
2429 pq_p->audit[1] |= FP_RESPADDRCOPIED;
2430 memcpy(pq_p->resp_buff, buff, buff_len);
2431 pq_p->audit[1] |= FP_RESPBUFFCOPIED;
2434 case REC_OPERAND_INV:
2435 case REC_OPERAND_SIZE:
2437 case REC_INVALID_PAD:
2438 PDEBUG("-EINVAL after application error %d\n", rc);
2439 pq_p->retcode = -EINVAL;
2440 pq_p->status[0] |= STAT_FAILED;
2442 case REC_NO_RESPONSE:
2444 if (z90crypt.mask.st_count > 1)
2445 pq_p->retcode = -ERESTARTSYS;
2447 pq_p->retcode = -ENODEV;
2448 pq_p->status[0] |= STAT_FAILED;
2451 if ((pq_p->status[0] != STAT_FAILED) || (pq_p->retcode != -ERELEASED)) {
2452 pq_p->audit[1] |= FP_AWAKENING;
2453 atomic_set(&pq_p->alarmrung, 1);
2454 wake_up(&pq_p->waitq);
2459 * return TRUE if the work element should be removed from the queue
2462 helper_receive_rc(int index, int *rc_p, int *workavail_p)
2466 case REC_OPERAND_INV:
2467 case REC_OPERAND_SIZE:
2469 case REC_INVALID_PAD:
2476 case REC_FATAL_ERROR:
2479 case REC_NO_RESPONSE:
2484 PRINTK("rc %d, device %d\n", *rc_p, SHRT2LONG(index));
2485 *rc_p = REC_NO_RESPONSE;
2493 z90crypt_schedule_reader_timer(void)
2495 if (timer_pending(&reader_timer))
2497 if (mod_timer(&reader_timer, jiffies+(READERTIME*HZ/1000)) != 0)
2498 PRINTK("Timer pending while modifying reader timer\n");
2502 z90crypt_reader_task(unsigned long ptr)
2504 int workavail, remaining, index, rc, buff_len;
2505 unsigned char psmid[8], *resp_addr;
2506 static unsigned char buff[1024];
2508 PDEBUG("jiffies %ld\n", jiffies);
2511 * we use workavail = 2 to ensure 2 passes with nothing dequeued before
2512 * exiting the loop. If remaining == 0 after the loop, there is no work
2513 * remaining on the queues.
2522 spin_lock_irq(&queuespinlock);
2523 memset(buff, 0x00, sizeof(buff));
2525 /* Dequeue once from each device in round robin. */
2526 for (index = 0; index < z90crypt.mask.st_count; index++) {
2527 PDEBUG("About to receive.\n");
2528 rc = receive_from_crypto_device(SHRT2LONG(index),
2533 PDEBUG("Dequeued: rc = %d.\n", rc);
2535 if (helper_receive_rc(index, &rc, &workavail)) {
2536 if (rc != REC_NO_RESPONSE) {
2537 helper_send_work(index);
2541 helper_handle_work_element(index, psmid, rc,
2546 if (rc == REC_FATAL_ERROR)
2548 else if (rc != REC_NO_RESPONSE)
2550 SHRT2DEVPTR(index)->dev_caller_count;
2552 spin_unlock_irq(&queuespinlock);
2556 spin_lock_irq(&queuespinlock);
2557 z90crypt_schedule_reader_timer();
2558 spin_unlock_irq(&queuespinlock);
2563 z90crypt_schedule_config_task(unsigned int expiration)
2565 if (timer_pending(&config_timer))
2567 if (mod_timer(&config_timer, jiffies+(expiration*HZ)) != 0)
2568 PRINTK("Timer pending while modifying config timer\n");
2572 z90crypt_config_task(unsigned long ptr)
2576 PDEBUG("jiffies %ld\n", jiffies);
2578 if ((rc = refresh_z90crypt(&z90crypt.cdx)))
2579 PRINTK("Error %d detected in refresh_z90crypt.\n", rc);
2580 /* If return was fatal, don't bother reconfiguring */
2581 if ((rc != TSQ_FATAL_ERROR) && (rc != RSQ_FATAL_ERROR))
2582 z90crypt_schedule_config_task(CONFIGTIME);
2586 z90crypt_schedule_cleanup_task(void)
2588 if (timer_pending(&cleanup_timer))
2590 if (mod_timer(&cleanup_timer, jiffies+(CLEANUPTIME*HZ)) != 0)
2591 PRINTK("Timer pending while modifying cleanup timer\n");
2595 helper_drain_queues(void)
2597 struct work_element *pq_p;
2598 struct list_head *lptr, *tptr;
2600 list_for_each_safe(lptr, tptr, &pending_list) {
2601 pq_p = list_entry(lptr, struct work_element, liste);
2602 pq_p->retcode = -ENODEV;
2603 pq_p->status[0] |= STAT_FAILED;
2604 unbuild_caller(LONG2DEVPTR(pq_p->devindex),
2605 (struct caller *)pq_p->requestptr);
2608 pq_p->audit[1] |= FP_NOTPENDING;
2609 pq_p->audit[1] |= FP_AWAKENING;
2610 atomic_set(&pq_p->alarmrung, 1);
2611 wake_up(&pq_p->waitq);
2614 list_for_each_safe(lptr, tptr, &request_list) {
2615 pq_p = list_entry(lptr, struct work_element, liste);
2616 pq_p->retcode = -ENODEV;
2617 pq_p->status[0] |= STAT_FAILED;
2620 pq_p->audit[1] |= FP_REMREQUEST;
2621 pq_p->audit[1] |= FP_AWAKENING;
2622 atomic_set(&pq_p->alarmrung, 1);
2623 wake_up(&pq_p->waitq);
2628 helper_timeout_requests(void)
2630 struct work_element *pq_p;
2631 struct list_head *lptr, *tptr;
2634 timelimit = jiffies - (CLEANUPTIME * HZ);
2635 /* The list is in strict chronological order */
2636 list_for_each_safe(lptr, tptr, &pending_list) {
2637 pq_p = list_entry(lptr, struct work_element, liste);
2638 if (pq_p->requestsent >= timelimit)
2640 pq_p->retcode = -ETIMEOUT;
2641 pq_p->status[0] |= STAT_FAILED;
2642 /* get this off any caller queue it may be on */
2643 unbuild_caller(LONG2DEVPTR(pq_p->devindex),
2644 (struct caller *) pq_p->requestptr);
2647 pq_p->audit[1] |= FP_TIMEDOUT;
2648 pq_p->audit[1] |= FP_NOTPENDING;
2649 pq_p->audit[1] |= FP_AWAKENING;
2650 atomic_set(&pq_p->alarmrung, 1);
2651 wake_up(&pq_p->waitq);
2655 * If pending count is zero, items left on the request queue may
2656 * never be processed.
2658 if (pendingq_count <= 0) {
2659 list_for_each_safe(lptr, tptr, &request_list) {
2660 pq_p = list_entry(lptr, struct work_element, liste);
2661 if (pq_p->requestsent >= timelimit)
2663 pq_p->retcode = -ETIMEOUT;
2664 pq_p->status[0] |= STAT_FAILED;
2667 pq_p->audit[1] |= FP_TIMEDOUT;
2668 pq_p->audit[1] |= FP_REMREQUEST;
2669 pq_p->audit[1] |= FP_AWAKENING;
2670 atomic_set(&pq_p->alarmrung, 1);
2671 wake_up(&pq_p->waitq);
2677 z90crypt_cleanup_task(unsigned long ptr)
2679 PDEBUG("jiffies %ld\n", jiffies);
2680 spin_lock_irq(&queuespinlock);
2681 if (z90crypt.mask.st_count <= 0) // no devices!
2682 helper_drain_queues();
2684 helper_timeout_requests();
2685 spin_unlock_irq(&queuespinlock);
2686 z90crypt_schedule_cleanup_task();
2690 z90crypt_schedule_reader_task(unsigned long ptr)
2692 tasklet_schedule(&reader_tasklet);
2696 * Lowlevel Functions:
2698 * create_z90crypt: creates and initializes basic data structures
2699 * refresh_z90crypt: re-initializes basic data structures
2700 * find_crypto_devices: returns a count and mask of hardware status
2701 * create_crypto_device: builds the descriptor for a device
2702 * destroy_crypto_device: unallocates the descriptor for a device
2703 * destroy_z90crypt: drains all work, unallocates structs
2707 * build the z90crypt root structure using the given domain index
2710 create_z90crypt(int *cdx_p)
2712 struct hdware_block *hdware_blk_p;
2714 memset(&z90crypt, 0x00, sizeof(struct z90crypt));
2715 z90crypt.domain_established = 0;
2716 z90crypt.len = sizeof(struct z90crypt);
2717 z90crypt.max_count = Z90CRYPT_NUM_DEVS;
2718 z90crypt.cdx = *cdx_p;
2720 hdware_blk_p = (struct hdware_block *)
2721 kmalloc(sizeof(struct hdware_block), GFP_ATOMIC);
2722 if (!hdware_blk_p) {
2723 PDEBUG("kmalloc for hardware block failed\n");
2726 memset(hdware_blk_p, 0x00, sizeof(struct hdware_block));
2727 z90crypt.hdware_info = hdware_blk_p;
2733 helper_scan_devices(int cdx_array[16], int *cdx_p, int *correct_cdx_found)
2735 enum hdstat hd_stat;
2736 int q_depth, dev_type;
2739 q_depth = dev_type = k = 0;
2740 for (i = 0; i < z90crypt.max_count; i++) {
2741 hd_stat = HD_NOT_THERE;
2742 for (j = 0; j <= 15; cdx_array[j++] = -1);
2744 for (j = 0; j <= 15; j++) {
2745 hd_stat = query_online(i, j, MAX_RESET,
2746 &q_depth, &dev_type);
2747 if (hd_stat == HD_TSQ_EXCEPTION) {
2748 z90crypt.terminating = 1;
2749 PRINTKC("exception taken!\n");
2752 if (hd_stat == HD_ONLINE) {
2755 *correct_cdx_found = 1;
2760 if ((*correct_cdx_found == 1) || (k != 0))
2762 if (z90crypt.terminating)
2769 probe_crypto_domain(int *cdx_p)
2772 int correct_cdx_found, k;
2774 correct_cdx_found = 0;
2775 k = helper_scan_devices(cdx_array, cdx_p, &correct_cdx_found);
2777 if (z90crypt.terminating)
2778 return TSQ_FATAL_ERROR;
2780 if (correct_cdx_found)
2789 if ((*cdx_p == -1) || !z90crypt.domain_established) {
2790 *cdx_p = cdx_array[0];
2793 if (*cdx_p != cdx_array[0]) {
2794 PRINTK("incorrect domain: specified = %d, found = %d\n",
2795 *cdx_p, cdx_array[0]);
2796 return Z90C_INCORRECT_DOMAIN;
2800 return Z90C_AMBIGUOUS_DOMAIN;
2804 refresh_z90crypt(int *cdx_p)
2807 struct status local_mask;
2808 struct device *devPtr;
2809 unsigned char oldStat, newStat;
2810 int return_unchanged;
2812 if (z90crypt.len != sizeof(z90crypt))
2814 if (z90crypt.terminating)
2815 return TSQ_FATAL_ERROR;
2817 if (!z90crypt.hdware_info->hdware_mask.st_count &&
2818 !z90crypt.domain_established)
2819 rv = probe_crypto_domain(cdx_p);
2820 if (z90crypt.terminating)
2821 return TSQ_FATAL_ERROR;
2824 case Z90C_AMBIGUOUS_DOMAIN:
2825 PRINTK("ambiguous domain detected\n");
2827 case Z90C_INCORRECT_DOMAIN:
2828 PRINTK("incorrect domain specified\n");
2831 PRINTK("probe domain returned %d\n", rv);
2837 z90crypt.cdx = *cdx_p;
2838 z90crypt.domain_established = 1;
2840 rv = find_crypto_devices(&local_mask);
2842 PRINTK("find crypto devices returned %d\n", rv);
2845 if (!memcmp(&local_mask, &z90crypt.hdware_info->hdware_mask,
2846 sizeof(struct status))) {
2847 return_unchanged = 1;
2848 for (i = 0; i < Z90CRYPT_NUM_TYPES; i++) {
2850 * Check for disabled cards. If any device is marked
2851 * disabled, destroy it.
2854 j < z90crypt.hdware_info->type_mask[i].st_count;
2856 indx = z90crypt.hdware_info->type_x_addr[i].
2858 devPtr = z90crypt.device_p[indx];
2859 if (devPtr && devPtr->disabled) {
2860 local_mask.st_mask[indx] = HD_NOT_THERE;
2861 return_unchanged = 0;
2865 if (return_unchanged == 1)
2869 spin_lock_irq(&queuespinlock);
2870 for (i = 0; i < z90crypt.max_count; i++) {
2871 oldStat = z90crypt.hdware_info->hdware_mask.st_mask[i];
2872 newStat = local_mask.st_mask[i];
2873 if ((oldStat == HD_ONLINE) && (newStat != HD_ONLINE))
2874 destroy_crypto_device(i);
2875 else if ((oldStat != HD_ONLINE) && (newStat == HD_ONLINE)) {
2876 rv = create_crypto_device(i);
2877 if (rv >= REC_FATAL_ERROR)
2880 local_mask.st_mask[i] = HD_NOT_THERE;
2881 local_mask.st_count--;
2885 memcpy(z90crypt.hdware_info->hdware_mask.st_mask, local_mask.st_mask,
2886 sizeof(local_mask.st_mask));
2887 z90crypt.hdware_info->hdware_mask.st_count = local_mask.st_count;
2888 z90crypt.hdware_info->hdware_mask.disabled_count =
2889 local_mask.disabled_count;
2890 refresh_index_array(&z90crypt.mask, &z90crypt.overall_device_x);
2891 for (i = 0; i < Z90CRYPT_NUM_TYPES; i++)
2892 refresh_index_array(&(z90crypt.hdware_info->type_mask[i]),
2893 &(z90crypt.hdware_info->type_x_addr[i]));
2894 spin_unlock_irq(&queuespinlock);
2900 find_crypto_devices(struct status *deviceMask)
2902 int i, q_depth, dev_type;
2903 enum hdstat hd_stat;
2905 deviceMask->st_count = 0;
2906 deviceMask->disabled_count = 0;
2907 deviceMask->user_disabled_count = 0;
2909 for (i = 0; i < z90crypt.max_count; i++) {
2910 hd_stat = query_online(i, z90crypt.cdx, MAX_RESET, &q_depth,
2912 if (hd_stat == HD_TSQ_EXCEPTION) {
2913 z90crypt.terminating = 1;
2914 PRINTKC("Exception during probe for crypto devices\n");
2915 return TSQ_FATAL_ERROR;
2917 deviceMask->st_mask[i] = hd_stat;
2918 if (hd_stat == HD_ONLINE) {
2919 PDEBUG("Got an online crypto!: %d\n", i);
2920 PDEBUG("Got a queue depth of %d\n", q_depth);
2921 PDEBUG("Got a device type of %d\n", dev_type);
2923 return TSQ_FATAL_ERROR;
2924 deviceMask->st_count++;
2925 z90crypt.q_depth_array[i] = q_depth;
2926 z90crypt.dev_type_array[i] = dev_type;
2934 refresh_index_array(struct status *status_str, struct device_x *index_array)
2942 stat = status_str->st_mask[++i];
2943 if (stat == DEV_ONLINE)
2944 index_array->device_index[count++] = i;
2945 } while ((i < Z90CRYPT_NUM_DEVS) && (count < status_str->st_count));
2951 create_crypto_device(int index)
2953 int rv, devstat, total_size;
2954 struct device *dev_ptr;
2955 struct status *type_str_p;
2958 dev_ptr = z90crypt.device_p[index];
2960 total_size = sizeof(struct device) +
2961 z90crypt.q_depth_array[index] * sizeof(int);
2963 dev_ptr = (struct device *) kmalloc(total_size, GFP_ATOMIC);
2965 PRINTK("kmalloc device %d failed\n", index);
2968 memset(dev_ptr, 0, total_size);
2969 dev_ptr->dev_resp_p = kmalloc(MAX_RESPONSE_SIZE, GFP_ATOMIC);
2970 if (!dev_ptr->dev_resp_p) {
2972 PRINTK("kmalloc device %d rec buffer failed\n", index);
2975 dev_ptr->dev_resp_l = MAX_RESPONSE_SIZE;
2976 INIT_LIST_HEAD(&(dev_ptr->dev_caller_list));
2979 devstat = reset_device(index, z90crypt.cdx, MAX_RESET);
2980 if (devstat == DEV_RSQ_EXCEPTION) {
2981 PRINTK("exception during reset device %d\n", index);
2982 kfree(dev_ptr->dev_resp_p);
2984 return RSQ_FATAL_ERROR;
2986 if (devstat == DEV_ONLINE) {
2987 dev_ptr->dev_self_x = index;
2988 dev_ptr->dev_type = z90crypt.dev_type_array[index];
2989 if (dev_ptr->dev_type == NILDEV) {
2990 rv = probe_device_type(dev_ptr);
2992 PRINTK("rv = %d from probe_device_type %d\n",
2994 kfree(dev_ptr->dev_resp_p);
2999 deviceType = dev_ptr->dev_type;
3000 z90crypt.dev_type_array[index] = deviceType;
3001 if (deviceType == PCICA)
3002 z90crypt.hdware_info->device_type_array[index] = 1;
3003 else if (deviceType == PCICC)
3004 z90crypt.hdware_info->device_type_array[index] = 2;
3005 else if (deviceType == PCIXCC)
3006 z90crypt.hdware_info->device_type_array[index] = 3;
3008 z90crypt.hdware_info->device_type_array[index] = -1;
3012 * 'q_depth' returned by the hardware is one less than
3015 dev_ptr->dev_q_depth = z90crypt.q_depth_array[index];
3016 dev_ptr->dev_type = z90crypt.dev_type_array[index];
3017 dev_ptr->dev_stat = devstat;
3018 dev_ptr->disabled = 0;
3019 z90crypt.device_p[index] = dev_ptr;
3021 if (devstat == DEV_ONLINE) {
3022 if (z90crypt.mask.st_mask[index] != DEV_ONLINE) {
3023 z90crypt.mask.st_mask[index] = DEV_ONLINE;
3024 z90crypt.mask.st_count++;
3026 deviceType = dev_ptr->dev_type;
3027 type_str_p = &z90crypt.hdware_info->type_mask[deviceType];
3028 if (type_str_p->st_mask[index] != DEV_ONLINE) {
3029 type_str_p->st_mask[index] = DEV_ONLINE;
3030 type_str_p->st_count++;
3038 destroy_crypto_device(int index)
3040 struct device *dev_ptr;
3041 int t, disabledFlag;
3043 dev_ptr = z90crypt.device_p[index];
3045 /* remember device type; get rid of device struct */
3047 disabledFlag = dev_ptr->disabled;
3048 t = dev_ptr->dev_type;
3049 if (dev_ptr->dev_resp_p)
3050 kfree(dev_ptr->dev_resp_p);
3056 z90crypt.device_p[index] = 0;
3058 /* if the type is valid, remove the device from the type_mask */
3059 if ((t != -1) && z90crypt.hdware_info->type_mask[t].st_mask[index]) {
3060 z90crypt.hdware_info->type_mask[t].st_mask[index] = 0x00;
3061 z90crypt.hdware_info->type_mask[t].st_count--;
3062 if (disabledFlag == 1)
3063 z90crypt.hdware_info->type_mask[t].disabled_count--;
3065 if (z90crypt.mask.st_mask[index] != DEV_GONE) {
3066 z90crypt.mask.st_mask[index] = DEV_GONE;
3067 z90crypt.mask.st_count--;
3069 z90crypt.hdware_info->device_type_array[index] = 0;
3075 destroy_z90crypt(void)
3078 for (i = 0; i < z90crypt.max_count; i++)
3079 if (z90crypt.device_p[i])
3080 destroy_crypto_device(i);
3081 if (z90crypt.hdware_info)
3082 kfree((void *)z90crypt.hdware_info);
3083 memset((void *)&z90crypt, 0, sizeof(z90crypt));
3086 static unsigned char static_testmsg[] = {
3087 0x00,0x00,0x00,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x00,0x06,0x00,0x00,
3088 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x58,
3089 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x43,0x43,
3090 0x41,0x2d,0x41,0x50,0x50,0x4c,0x20,0x20,0x20,0x01,0x01,0x01,0x00,0x00,0x00,0x00,
3091 0x50,0x4b,0x00,0x00,0x00,0x00,0x01,0x1c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3092 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0xb8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3093 0x00,0x00,0x00,0x00,0x70,0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x32,
3094 0x01,0x00,0xa0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3095 0xb8,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3096 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3097 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3098 0x00,0x00,0x00,0x00,0x00,0x00,0x0a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3099 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x49,0x43,0x53,0x46,
3100 0x20,0x20,0x20,0x20,0x50,0x4b,0x0a,0x00,0x50,0x4b,0x43,0x53,0x2d,0x31,0x2e,0x32,
3101 0x37,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,
3102 0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,
3103 0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x44,0x55,0x66,
3104 0x77,0x88,0x99,0x00,0x11,0x22,0x33,0x5d,0x00,0x5b,0x00,0x77,0x88,0x1e,0x00,0x00,
3105 0x57,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x4f,0x00,0x00,0x00,0x03,0x02,0x00,0x00,
3106 0x40,0x01,0x00,0x01,0xce,0x02,0x68,0x2d,0x5f,0xa9,0xde,0x0c,0xf6,0xd2,0x7b,0x58,
3107 0x4b,0xf9,0x28,0x68,0x3d,0xb4,0xf4,0xef,0x78,0xd5,0xbe,0x66,0x63,0x42,0xef,0xf8,
3108 0xfd,0xa4,0xf8,0xb0,0x8e,0x29,0xc2,0xc9,0x2e,0xd8,0x45,0xb8,0x53,0x8c,0x6f,0x4e,
3109 0x72,0x8f,0x6c,0x04,0x9c,0x88,0xfc,0x1e,0xc5,0x83,0x55,0x57,0xf7,0xdd,0xfd,0x4f,
3110 0x11,0x36,0x95,0x5d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
3114 probe_device_type(struct device *devPtr)
3116 int rv, dv, i, index, length;
3117 unsigned char psmid[8];
3118 static unsigned char loc_testmsg[384];
3120 index = devPtr->dev_self_x;
3123 memcpy(loc_testmsg, static_testmsg, sizeof(static_testmsg));
3124 length = sizeof(static_testmsg) - 24;
3125 /* the -24 allows for the header */
3126 dv = send_to_AP(index, z90crypt.cdx, length, loc_testmsg);
3128 PDEBUG("dv returned by send during probe: %d\n", dv);
3129 if (dv == DEV_SEN_EXCEPTION) {
3130 rv = SEN_FATAL_ERROR;
3131 PRINTKC("exception in send to AP %d\n", index);
3134 PDEBUG("return value from send_to_AP: %d\n", rv);
3137 PDEBUG("dev %d not available\n", index);
3147 rv = SEN_FATAL_ERROR;
3149 case DEV_BAD_MESSAGE:
3150 rv = SEN_USER_ERROR;
3152 case DEV_QUEUE_FULL:
3153 rv = SEN_QUEUE_FULL;
3156 PRINTK("unknown dv=%d for dev %d\n", dv, index);
3165 for (i = 0; i < 6; i++) {
3167 dv = receive_from_AP(index, z90crypt.cdx,
3169 devPtr->dev_resp_p, psmid);
3170 PDEBUG("dv returned by DQ = %d\n", dv);
3171 if (dv == DEV_REC_EXCEPTION) {
3172 rv = REC_FATAL_ERROR;
3173 PRINTKC("exception in dequeue %d\n",
3187 case DEV_BAD_MESSAGE:
3190 rv = REC_NO_RESPONSE;
3193 if ((rv != 0) && (rv != REC_NO_WORK))
3200 rv = (devPtr->dev_resp_p[0] == 0x00) &&
3201 (devPtr->dev_resp_p[1] == 0x86);
3203 devPtr->dev_type = PCICC;
3205 devPtr->dev_type = PCICA;
3208 /* In a general error case, the card is not marked online */
3212 #ifdef Z90CRYPT_USE_HOTPLUG
3214 z90crypt_hotplug_event(int dev_major, int dev_minor, int action)
3216 #ifdef CONFIG_HOTPLUG
3222 sprintf(major, "MAJOR=%d", dev_major);
3223 sprintf(minor, "MINOR=%d", dev_minor);
3225 argv[0] = hotplug_path;
3226 argv[1] = "z90crypt";
3230 envp[1] = "PATH=/sbin:/bin:/usr/sbin:/usr/bin";
3233 case Z90CRYPT_HOTPLUG_ADD:
3234 envp[2] = "ACTION=add";
3236 case Z90CRYPT_HOTPLUG_REMOVE:
3237 envp[2] = "ACTION=remove";
3246 call_usermodehelper(argv[0], argv, envp, 0);
3251 module_init(z90crypt_init_module);
3252 module_exit(z90crypt_cleanup_module);