1 #if (!defined(dprintk))
5 /*------------------------------------------------------------------------------
7 *----------------------------------------------------------------------------*/
9 #define MAXIMUM_NUM_CONTAINERS 32
10 #define MAXIMUM_NUM_ADAPTERS 8
12 #define AAC_NUM_FIB (256 + 64)
13 #define AAC_NUM_IO_FIB 100
15 #define AAC_MAX_LUN (8)
17 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
20 * These macros convert from physical channels to virtual channels
22 #define CONTAINER_CHANNEL (0)
23 #define ID_LUN_TO_CONTAINER(id, lun) (id)
24 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
25 #define CONTAINER_TO_ID(cont) (cont)
26 #define CONTAINER_TO_LUN(cont) (0)
28 #define aac_phys_to_logical(x) (x+1)
29 #define aac_logical_to_phys(x) (x?x-1:0)
31 #define AAC_DETAILED_STATUS_INFO
45 * DON'T CHANGE THE ORDER, this is set by the firmware
58 #define CT_RAID10 10 /* stripe of mirror */
59 #define CT_RAID00 11 /* stripe of stripe */
60 #define CT_VOLUME_OF_MIRRORS 12 /* volume of mirror */
61 #define CT_PSEUDO_RAID 13 /* really raid4 */
62 #define CT_LAST_VOLUME_TYPE 14
65 * Types of objects addressable in some fashion by the client.
66 * This is a superset of those objects handled just by the filesystem
67 * and includes "raw" objects that an administrator would use to
68 * configure containers and filesystems.
71 #define FT_REG 1 /* regular file */
72 #define FT_DIR 2 /* directory */
73 #define FT_BLK 3 /* "block" device - reserved */
74 #define FT_CHR 4 /* "character special" device - reserved */
75 #define FT_LNK 5 /* symbolic link */
76 #define FT_SOCK 6 /* socket */
77 #define FT_FIFO 7 /* fifo */
78 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
79 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */
80 #define FT_SLICE 10 /* virtual disk - raw volume - slice */
81 #define FT_PARTITION 11 /* FSA partition - carved out of a slice - building block for containers */
82 #define FT_VOLUME 12 /* Container - Volume Set */
83 #define FT_STRIPE 13 /* Container - Stripe Set */
84 #define FT_MIRROR 14 /* Container - Mirror Set */
85 #define FT_RAID5 15 /* Container - Raid 5 Set */
86 #define FT_DATABASE 16 /* Storage object with "foreign" content manager */
89 * Host side memory scatter gather list
90 * Used by the adapter for read, write, and readdirplus operations
91 * We have separate 32 and 64 bit version because even
92 * on 64 bit systems not all cards support the 64 bit version
95 u32 addr; /* 32-bit address. */
96 u32 count; /* Length. */
100 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
101 u32 count; /* Length. */
107 * This is the SGMAP structure for all commands that use
113 struct sgentry sg[1];
118 struct sgentry64 sg[1];
123 u8 buildnum; /* e.g., 588 */
124 u8 usec; /* e.g., 588 */
125 u8 via; /* e.g., 1 = FSU,
128 u8 year; /* e.g., 1997 = 97 */
130 * unsigned Month :4; // 1 - 12
131 * unsigned Day :6; // 1 - 32
132 * unsigned Hour :6; // 0 - 23
133 * unsigned Minute :6; // 0 - 60
134 * unsigned Second :6; // 0 - 60
136 u32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */
141 * Define all the constants needed for the communication interface
145 * Define how many queue entries each queue will have and the total
146 * number of entries for the entire communication interface. Also define
147 * how many queues we support.
149 * This has to match the controller
152 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response
153 #define HOST_HIGH_CMD_ENTRIES 4
154 #define HOST_NORM_CMD_ENTRIES 8
155 #define ADAP_HIGH_CMD_ENTRIES 4
156 #define ADAP_NORM_CMD_ENTRIES 512
157 #define HOST_HIGH_RESP_ENTRIES 4
158 #define HOST_NORM_RESP_ENTRIES 512
159 #define ADAP_HIGH_RESP_ENTRIES 4
160 #define ADAP_NORM_RESP_ENTRIES 8
162 #define TOTAL_QUEUE_ENTRIES \
163 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
164 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
168 * Set the queues on a 16 byte alignment
171 #define QUEUE_ALIGNMENT 16
174 * The queue headers define the Communication Region queues. These
175 * are physically contiguous and accessible by both the adapter and the
176 * host. Even though all queue headers are in the same contiguous block
177 * they will be represented as individual units in the data structures.
181 u32 size; /* Size in bytes of Fib which this QE points to */
182 u32 addr; /* Receiver address of the FIB */
186 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped
187 * adjacently and in that order.
191 u64 header_addr; /* Address to hand the adapter to access to this queue head */
192 u32 *producer; /* The producer index for this queue (host address) */
193 u32 *consumer; /* The consumer index for this queue (host address) */
197 * Define all the events which the adapter would like to notify
201 #define HostNormCmdQue 1 /* Change in host normal priority command queue */
202 #define HostHighCmdQue 2 /* Change in host high priority command queue */
203 #define HostNormRespQue 3 /* Change in host normal priority response queue */
204 #define HostHighRespQue 4 /* Change in host high priority response queue */
205 #define AdapNormRespNotFull 5
206 #define AdapHighRespNotFull 6
207 #define AdapNormCmdNotFull 7
208 #define AdapHighCmdNotFull 8
209 #define SynchCommandComplete 9
210 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */
213 * Define all the events the host wishes to notify the
214 * adapter of. The first four values much match the Qid the
215 * corresponding queue.
218 #define AdapNormCmdQue 2
219 #define AdapHighCmdQue 3
220 #define AdapNormRespQue 6
221 #define AdapHighRespQue 7
222 #define HostShutdown 8
223 #define HostPowerFail 9
224 #define FatalCommError 10
225 #define HostNormRespNotFull 11
226 #define HostHighRespNotFull 12
227 #define HostNormCmdNotFull 13
228 #define HostHighCmdNotFull 14
230 #define AdapPrintfDone 16
233 * Define all the queues that the adapter and host use to communicate
234 * Number them to match the physical queue layout.
237 enum aac_queue_types {
238 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */
239 HostHighCmdQueue, /* Adapter to host high priority command traffic */
240 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */
241 AdapHighCmdQueue, /* Host to adapter high priority command traffic */
242 HostNormRespQueue, /* Adapter to host normal priority response traffic */
243 HostHighRespQueue, /* Adapter to host high priority response traffic */
244 AdapNormRespQueue, /* Host to adapter normal priority response traffic */
245 AdapHighRespQueue /* Host to adapter high priority response traffic */
249 * Assign type values to the FSA communication data structures
252 #define FIB_MAGIC 0x0001
255 * Define the priority levels the FSA communication routines support.
262 * Define the FIB. The FIB is the where all the requested data and
263 * command information are put to the application on the FSA adapter.
267 u32 XferState; // Current transfer state for this CCB
268 u16 Command; // Routing information for the destination
269 u8 StructType; // Type FIB
270 u8 Flags; // Flags for FIB
271 u16 Size; // Size of this FIB in bytes
272 u16 SenderSize; // Size of the FIB in the sender (for response sizing)
273 u32 SenderFibAddress; // Host defined data in the FIB
274 u32 ReceiverFibAddress; // Logical address of this FIB for the adapter
275 u32 SenderData; // Place holder for the sender to store data
278 u32 _ReceiverTimeStart; // Timestamp for receipt of fib
279 u32 _ReceiverTimeDone; // Timestamp for completion of fib
284 #define FIB_DATA_SIZE_IN_BYTES (512 - sizeof(struct aac_fibhdr))
288 struct aac_fibhdr header;
289 u8 data[FIB_DATA_SIZE_IN_BYTES]; // Command specific data
296 #define TestCommandResponse 1
297 #define TestAdapterCommand 2
299 * Lowlevel and comm commands
301 #define LastTestCommand 100
302 #define ReinitHostNormCommandQueue 101
303 #define ReinitHostHighCommandQueue 102
304 #define ReinitHostHighRespQueue 103
305 #define ReinitHostNormRespQueue 104
306 #define ReinitAdapNormCommandQueue 105
307 #define ReinitAdapHighCommandQueue 107
308 #define ReinitAdapHighRespQueue 108
309 #define ReinitAdapNormRespQueue 109
310 #define InterfaceShutdown 110
311 #define DmaCommandFib 120
312 #define StartProfile 121
313 #define TermProfile 122
314 #define SpeedTest 123
315 #define TakeABreakPt 124
316 #define RequestPerfData 125
317 #define SetInterruptDefTimer 126
318 #define SetInterruptDefCount 127
319 #define GetInterruptDefStatus 128
320 #define LastCommCommand 129
322 * Filesystem commands
324 #define NuFileSystem 300
326 #define HostFileSystem 302
327 #define LastFileSystemCommand 303
331 #define ContainerCommand 500
332 #define ContainerCommand64 501
336 #define ClusterCommand 550
338 * Scsi Port commands (scsi passthrough)
340 #define ScsiPortCommand 600
341 #define ScsiPortCommand64 601
343 * Misc house keeping and generic adapter initiated commands
345 #define AifRequest 700
346 #define CheckRevision 701
347 #define FsaHostShutdown 702
348 #define RequestAdapterInfo 703
349 #define IsAdapterPaused 704
350 #define SendHostTime 705
351 #define LastMiscCommand 706
354 // Commands that will target the failover level on the FSA adapter
357 enum fib_xfer_state {
359 AdapterOwned = (1<<1),
360 FibInitialized = (1<<2),
362 AllocatedFromPool = (1<<4),
363 SentFromHost = (1<<5),
364 SentFromAdapter = (1<<6),
365 ResponseExpected = (1<<7),
366 NoResponseExpected = (1<<8),
367 AdapterProcessed = (1<<9),
368 HostProcessed = (1<<10),
369 HighPriority = (1<<11),
370 NormalPriority = (1<<12),
372 AsyncIo = (1<<13), // rpbfix: remove with new regime
373 PageFileIo = (1<<14), // rpbfix: remove with new regime
374 ShutdownRequest = (1<<15),
375 LazyWrite = (1<<16), // rpbfix: remove with new regime
376 AdapterMicroFib = (1<<17),
377 BIOSFibPath = (1<<18),
378 FastResponseCapable = (1<<19),
379 ApiFib = (1<<20) // Its an API Fib.
383 * The following defines needs to be updated any time there is an
384 * incompatible change made to the aac_init structure.
387 #define ADAPTER_INIT_STRUCT_REVISION 3
391 u32 InitStructRevision;
392 u32 MiniPortRevision;
394 u32 CommHeaderAddress;
395 u32 FastIoCommAreaAddress;
396 u32 AdapterFibsPhysicalAddress;
397 u32 AdapterFibsVirtualAddress;
402 u32 HostPhysMemPages; // number of 4k pages of host physical memory
403 u32 HostElapsedSeconds; // number of seconds since 1970.
408 LOG_INFORMATIONAL = 20,
411 LOG_MEDIUM_ERROR = 50,
415 LOG_WINDBG_PRINT = 90
418 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
419 #define FSAFS_NTC_FIB_CONTEXT 0x030c
425 void (*adapter_interrupt)(struct aac_dev *dev);
426 void (*adapter_notify)(struct aac_dev *dev, u32 event);
427 void (*adapter_enable_int)(struct aac_dev *dev, u32 event);
428 void (*adapter_disable_int)(struct aac_dev *dev, u32 event);
429 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 *status);
430 int (*adapter_check_health)(struct aac_dev *dev);
434 * Define which interrupt handler needs to be installed
437 struct aac_driver_ident
439 int (*init)(struct aac_dev *dev);
447 * Some adapter firmware needs communication memory
448 * below 2gig. This tells the init function to set the
449 * dma mask such that fib memory will be allocated where the
450 * adapter firmware can get to it.
452 #define AAC_QUIRK_31BIT 1
455 * The adapter interface specs all queues to be located in the same
456 * physically contigous block. The host structure that defines the
457 * commuication queues will assume they are each a separate physically
458 * contigous memory region that will support them all being one big
460 * There is a command and response queue for each level and direction of
461 * commuication. These regions are accessed by both the host and adapter.
465 u64 logical; /*address we give the adapter */
466 struct aac_entry *base; /*system virtual address */
467 struct aac_qhdr headers; /*producer,consumer q headers*/
468 u32 entries; /*Number of queue entries */
469 wait_queue_head_t qfull; /*Event to wait on if q full */
470 wait_queue_head_t cmdready; /*Cmd ready from the adapter */
471 /* This is only valid for adapter to host command queues. */
472 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
473 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
474 unsigned long SavedIrql; /* Previous IRQL when the spin lock is taken */
475 u32 padding; /* Padding - FIXME - can remove I believe */
476 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
477 /* only valid for command queues which receive entries from the adapter. */
478 struct list_head pendingq; /* A queue of outstanding fib's to the adapter. */
479 u32 numpending; /* Number of entries on outstanding queue. */
480 struct aac_dev * dev; /* Back pointer to adapter structure */
484 * Message queues. The order here is important, see also the
485 * queue type ordering
488 struct aac_queue_block
490 struct aac_queue queue[8];
494 * SaP1 Message Unit Registers
497 struct sa_drawbridge_CSR {
499 u32 reserved[10]; // 00h-27h | Reserved
500 u8 LUT_Offset; // 28h | Looup Table Offset
501 u8 reserved1[3]; // 29h-2bh | Reserved
502 u32 LUT_Data; // 2ch | Looup Table Data
503 u32 reserved2[26]; // 30h-97h | Reserved
504 u16 PRICLEARIRQ; // 98h | Primary Clear Irq
505 u16 SECCLEARIRQ; // 9ah | Secondary Clear Irq
506 u16 PRISETIRQ; // 9ch | Primary Set Irq
507 u16 SECSETIRQ; // 9eh | Secondary Set Irq
508 u16 PRICLEARIRQMASK; // a0h | Primary Clear Irq Mask
509 u16 SECCLEARIRQMASK; // a2h | Secondary Clear Irq Mask
510 u16 PRISETIRQMASK; // a4h | Primary Set Irq Mask
511 u16 SECSETIRQMASK; // a6h | Secondary Set Irq Mask
512 u32 MAILBOX0; // a8h | Scratchpad 0
513 u32 MAILBOX1; // ach | Scratchpad 1
514 u32 MAILBOX2; // b0h | Scratchpad 2
515 u32 MAILBOX3; // b4h | Scratchpad 3
516 u32 MAILBOX4; // b8h | Scratchpad 4
517 u32 MAILBOX5; // bch | Scratchpad 5
518 u32 MAILBOX6; // c0h | Scratchpad 6
519 u32 MAILBOX7; // c4h | Scratchpad 7
521 u32 ROM_Setup_Data; // c8h | Rom Setup and Data
522 u32 ROM_Control_Addr; // cch | Rom Control and Address
524 u32 reserved3[12]; // d0h-ffh | reserved
525 u32 LUT[64]; // 100h-1ffh| Lookup Table Entries
529 // need to add DMA, I2O, UART, etc registers form 80h to 364h
534 #define Mailbox0 SaDbCSR.MAILBOX0
535 #define Mailbox1 SaDbCSR.MAILBOX1
536 #define Mailbox2 SaDbCSR.MAILBOX2
537 #define Mailbox3 SaDbCSR.MAILBOX3
538 #define Mailbox4 SaDbCSR.MAILBOX4
539 #define Mailbox5 SaDbCSR.MAILBOX5
540 #define Mailbox7 SaDbCSR.MAILBOX7
542 #define DoorbellReg_p SaDbCSR.PRISETIRQ
543 #define DoorbellReg_s SaDbCSR.SECSETIRQ
544 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
547 #define DOORBELL_0 cpu_to_le16(0x0001)
548 #define DOORBELL_1 cpu_to_le16(0x0002)
549 #define DOORBELL_2 cpu_to_le16(0x0004)
550 #define DOORBELL_3 cpu_to_le16(0x0008)
551 #define DOORBELL_4 cpu_to_le16(0x0010)
552 #define DOORBELL_5 cpu_to_le16(0x0020)
553 #define DOORBELL_6 cpu_to_le16(0x0040)
556 #define PrintfReady DOORBELL_5
557 #define PrintfDone DOORBELL_5
559 struct sa_registers {
560 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
564 #define Sa_MINIPORT_REVISION 1
566 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
567 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
568 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
569 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
572 * Rx Message Unit Registers
575 struct rx_mu_registers {
576 // Local | PCI* | Name
578 u32 ARSR; // 1300h | 00h | APIC Register Select Register
579 u32 reserved0; // 1304h | 04h | Reserved
580 u32 AWR; // 1308h | 08h | APIC Window Register
581 u32 reserved1; // 130Ch | 0Ch | Reserved
582 u32 IMRx[2]; // 1310h | 10h | Inbound Message Registers
583 u32 OMRx[2]; // 1318h | 18h | Outbound Message Registers
584 u32 IDR; // 1320h | 20h | Inbound Doorbell Register
585 u32 IISR; // 1324h | 24h | Inbound Interrupt Status Register
586 u32 IIMR; // 1328h | 28h | Inbound Interrupt Mask Register
587 u32 ODR; // 132Ch | 2Ch | Outbound Doorbell Register
588 u32 OISR; // 1330h | 30h | Outbound Interrupt Status Register
589 u32 OIMR; // 1334h | 34h | Outbound Interrupt Mask Register
590 // * Must access through ATU Inbound Translation Window
597 #define InboundMailbox0 IndexRegs.Mailbox[0]
598 #define InboundMailbox1 IndexRegs.Mailbox[1]
599 #define InboundMailbox2 IndexRegs.Mailbox[2]
600 #define InboundMailbox3 IndexRegs.Mailbox[3]
601 #define InboundMailbox4 IndexRegs.Mailbox[4]
602 #define InboundMailbox5 IndexRegs.Mailbox[5]
603 #define InboundMailbox6 IndexRegs.Mailbox[6]
604 #define InboundMailbox7 IndexRegs.Mailbox[7]
606 #define INBOUNDDOORBELL_0 cpu_to_le32(0x00000001)
607 #define INBOUNDDOORBELL_1 cpu_to_le32(0x00000002)
608 #define INBOUNDDOORBELL_2 cpu_to_le32(0x00000004)
609 #define INBOUNDDOORBELL_3 cpu_to_le32(0x00000008)
610 #define INBOUNDDOORBELL_4 cpu_to_le32(0x00000010)
611 #define INBOUNDDOORBELL_5 cpu_to_le32(0x00000020)
612 #define INBOUNDDOORBELL_6 cpu_to_le32(0x00000040)
614 #define OUTBOUNDDOORBELL_0 cpu_to_le32(0x00000001)
615 #define OUTBOUNDDOORBELL_1 cpu_to_le32(0x00000002)
616 #define OUTBOUNDDOORBELL_2 cpu_to_le32(0x00000004)
617 #define OUTBOUNDDOORBELL_3 cpu_to_le32(0x00000008)
618 #define OUTBOUNDDOORBELL_4 cpu_to_le32(0x00000010)
620 #define InboundDoorbellReg MUnit.IDR
621 #define OutboundDoorbellReg MUnit.ODR
623 struct rx_registers {
624 struct rx_mu_registers MUnit; // 1300h - 1334h
625 u32 reserved1[6]; // 1338h - 134ch
626 struct rx_inbound IndexRegs;
629 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
630 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
631 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
632 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
635 * Rkt Message Unit Registers (same as Rx, except a larger reserve region)
638 #define rkt_mu_registers rx_mu_registers
639 #define rkt_inbound rx_inbound
641 struct rkt_registers {
642 struct rkt_mu_registers MUnit; /* 1300h - 1334h */
643 u32 reserved1[1010]; /* 1338h - 22fch */
644 struct rkt_inbound IndexRegs; /* 2300h - */
647 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
648 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
649 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
650 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
654 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
656 struct aac_fib_context {
657 s16 type; // used for verification of structure
659 u32 unique; // unique value representing this context
660 ulong jiffies; // used for cleanup - dmb changed to ulong
661 struct list_head next; // used to link context's into a linked list
662 struct semaphore wait_sem; // this is used to wait for the next fib to arrive.
663 int wait; // Set to true when thread is in WaitForSingleObject
664 unsigned long count; // total number of FIBs on FibList
665 struct list_head fib_list; // this holds fibs and their attachd hw_fibs
668 struct fsa_scsi_hba {
669 u32 size[MAXIMUM_NUM_CONTAINERS];
670 u32 type[MAXIMUM_NUM_CONTAINERS];
671 u8 valid[MAXIMUM_NUM_CONTAINERS];
672 u8 ro[MAXIMUM_NUM_CONTAINERS];
673 u8 locked[MAXIMUM_NUM_CONTAINERS];
674 u8 deleted[MAXIMUM_NUM_CONTAINERS];
675 char devname[MAXIMUM_NUM_CONTAINERS][8];
679 void *next; /* this is used by the allocator */
683 * The Adapter that this I/O is destined for.
687 * This is the event the sendfib routine will wait on if the
688 * caller did not pass one and this is synch io.
690 struct semaphore event_wait;
691 spinlock_t event_lock;
693 u32 done; /* gets set to 1 when fib is complete */
694 fib_callback callback;
696 u32 flags; // u32 dmb was ulong
698 * The following is used to put this fib context onto the
699 * Outstanding I/O queue.
701 struct list_head queue;
703 * And for the internal issue/reply queues (we may be able
704 * to merge these two)
706 struct list_head fiblink;
708 struct hw_fib *hw_fib; /* Actual shared object */
709 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/
713 * Adapter Information Block
715 * This is returned by the RequestAdapterInfo block
718 struct aac_adapter_info
736 u32 clusterchannelmask;
746 #define AAC_BAT_REQ_PRESENT (1)
747 #define AAC_BAT_REQ_NOTPRESENT (2)
748 #define AAC_BAT_OPT_PRESENT (3)
749 #define AAC_BAT_OPT_NOTPRESENT (4)
750 #define AAC_BAT_NOT_SUPPORTED (5)
754 #define AAC_CPU_SIMULATOR (1)
755 #define AAC_CPU_I960 (2)
756 #define AAC_CPU_STRONGARM (3)
761 #define AAC_OPT_SNAPSHOT cpu_to_le32(1)
762 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
763 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
764 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
765 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
766 #define AAC_OPT_RAID50 cpu_to_le32(1<<5)
767 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
768 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
769 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
770 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
771 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
772 #define AAC_OPT_ALARM cpu_to_le32(1<<11)
773 #define AAC_OPT_NONDASD cpu_to_le32(1<<12)
777 struct aac_dev *next;
783 * Map for 128 fib objects (64k)
785 dma_addr_t hw_fib_pa;
786 struct hw_fib *hw_fib_va;
787 struct hw_fib *aif_base_va;
793 struct fib *free_fib;
794 struct fib *timeout_fib;
797 struct aac_queue_block *queues;
799 * The user API will use an IOCTL to register itself to receive
800 * FIBs from the adapter. The following list is used to keep
801 * track of all the threads that have requested these FIBs. The
802 * mutex is used to synchronize access to all data associated
803 * with the adapter fibs.
805 struct list_head fib_list;
807 struct adapter_ops a_ops;
808 unsigned long fsrev; /* Main driver's revision number */
810 struct aac_init *init; /* Holds initialization info to communicate with adapter */
811 dma_addr_t init_pa; /* Holds physical address of the init struct */
813 struct pci_dev *pdev; /* Our PCI interface */
814 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
815 void * comm_addr; /* Base address of Comm area */
816 dma_addr_t comm_phys; /* Physical Address of Comm area */
819 struct Scsi_Host *scsi_host_ptr;
820 struct fsa_scsi_hba fsa_dev;
825 * The following is the device specific extension.
829 struct sa_registers *sa;
830 struct rx_registers *rx;
831 struct rkt_registers *rkt;
833 u32 OIMR; /* Mask Register Cache */
838 struct completion aif_completion;
839 struct aac_adapter_info adapter_info;
840 /* These are in adapter info but they are in the io flow so
841 * lets break them out so we don't have to do an AND to check them
847 #define AllocateAndMapFibSpace(dev, MapFibContext) \
848 (dev)->a_ops.AllocateAndMapFibSpace(dev, MapFibContext)
850 #define UnmapAndFreeFibSpace(dev, MapFibContext) \
851 (dev)->a_ops.UnmapAndFreeFibSpace(dev, MapFibContext)
853 #define aac_adapter_interrupt(dev) \
854 (dev)->a_ops.adapter_interrupt(dev)
856 #define aac_adapter_notify(dev, event) \
857 (dev)->a_ops.adapter_notify(dev, event)
859 #define aac_adapter_enable_int(dev, event) \
860 (dev)->a_ops.adapter_enable_int(dev, event)
862 #define aac_adapter_disable_int(dev, event) \
863 dev->a_ops.adapter_disable_int(dev, event)
865 #define aac_adapter_check_health(dev) \
866 (dev)->a_ops.adapter_check_health(dev)
869 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
872 * Define the command values
876 #define GetAttributes 1
877 #define SetAttributes 2
883 #define MakeDirectory 8
884 #define SymbolicLink 9
887 #define RemoveDirectoryx 12
890 #define ReadDirectory 15
891 #define ReadDirectoryPlus 16
892 #define FileSystemStatus 17
893 #define FileSystemInfo 18
894 #define PathConfigure 19
901 #define SimReadWrite 26
902 #define SetFileSystemStatus 27
904 #define BlockWrite 29
905 #define NvramIoctl 30
906 #define FsSyncWait 31
907 #define ClearArchiveBit 32
911 #define FaultInsertion 36 /* Fault Insertion Command */
912 #define CrazyCache 37 /* Crazycache */
914 #define MAX_FSACOMMAND_NUM 38
918 * Define the status returns. These are very unixlike although
919 * most are not in fact used
939 #define ST_WOULDBLOCK 35
940 #define ST_NAMETOOLONG 63
941 #define ST_NOTEMPTY 66
945 #define ST_BADHANDLE 10001
946 #define ST_NOT_SYNC 10002
947 #define ST_BAD_COOKIE 10003
948 #define ST_NOTSUPP 10004
949 #define ST_TOOSMALL 10005
950 #define ST_SERVERFAULT 10006
951 #define ST_BADTYPE 10007
952 #define ST_JUKEBOX 10008
953 #define ST_NOTMOUNTED 10009
954 #define ST_MAINTMODE 10010
955 #define ST_STALEACL 10011
958 * On writes how does the client want the data written.
961 #define CACHE_CSTABLE 1
962 #define CACHE_UNSTABLE 2
965 * Lets the client know at which level the data was commited on
969 #define CMFILE_SYNCH_NVRAM 1
970 #define CMDATA_SYNCH_NVRAM 2
971 #define CMFILE_SYNCH 3
972 #define CMDATA_SYNCH 4
981 struct sgmap sg; // Must be last in struct because it is variable
992 struct sgmap64 sg; // Must be last in struct because it is variable
995 struct aac_read_reply
1007 u32 stable; // Not used
1008 struct sgmap sg; // Must be last in struct because it is variable
1019 struct sgmap64 sg; // Must be last in struct because it is variable
1021 struct aac_write_reply
1036 u32 count; // Data xfer size
1045 #define AAC_SENSE_BUFFERSIZE 30
1047 struct aac_srb_reply
1052 u32 data_xfer_length;
1053 u32 sense_data_size;
1054 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1059 #define SRB_NoDataXfer 0x0000
1060 #define SRB_DisableDisconnect 0x0004
1061 #define SRB_DisableSynchTransfer 0x0008
1062 #define SRB_BypassFrozenQueue 0x0010
1063 #define SRB_DisableAutosense 0x0020
1064 #define SRB_DataIn 0x0040
1065 #define SRB_DataOut 0x0080
1068 * SRB Functions - set in aac_srb->function
1070 #define SRBF_ExecuteScsi 0x0000
1071 #define SRBF_ClaimDevice 0x0001
1072 #define SRBF_IO_Control 0x0002
1073 #define SRBF_ReceiveEvent 0x0003
1074 #define SRBF_ReleaseQueue 0x0004
1075 #define SRBF_AttachDevice 0x0005
1076 #define SRBF_ReleaseDevice 0x0006
1077 #define SRBF_Shutdown 0x0007
1078 #define SRBF_Flush 0x0008
1079 #define SRBF_AbortCommand 0x0010
1080 #define SRBF_ReleaseRecovery 0x0011
1081 #define SRBF_ResetBus 0x0012
1082 #define SRBF_ResetDevice 0x0013
1083 #define SRBF_TerminateIO 0x0014
1084 #define SRBF_FlushQueue 0x0015
1085 #define SRBF_RemoveDevice 0x0016
1086 #define SRBF_DomainValidation 0x0017
1089 * SRB SCSI Status - set in aac_srb->scsi_status
1091 #define SRB_STATUS_PENDING 0x00
1092 #define SRB_STATUS_SUCCESS 0x01
1093 #define SRB_STATUS_ABORTED 0x02
1094 #define SRB_STATUS_ABORT_FAILED 0x03
1095 #define SRB_STATUS_ERROR 0x04
1096 #define SRB_STATUS_BUSY 0x05
1097 #define SRB_STATUS_INVALID_REQUEST 0x06
1098 #define SRB_STATUS_INVALID_PATH_ID 0x07
1099 #define SRB_STATUS_NO_DEVICE 0x08
1100 #define SRB_STATUS_TIMEOUT 0x09
1101 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1102 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1103 #define SRB_STATUS_MESSAGE_REJECTED 0x0D
1104 #define SRB_STATUS_BUS_RESET 0x0E
1105 #define SRB_STATUS_PARITY_ERROR 0x0F
1106 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1107 #define SRB_STATUS_NO_HBA 0x11
1108 #define SRB_STATUS_DATA_OVERRUN 0x12
1109 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1110 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1111 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1112 #define SRB_STATUS_REQUEST_FLUSHED 0x16
1113 #define SRB_STATUS_DELAYED_RETRY 0x17
1114 #define SRB_STATUS_INVALID_LUN 0x20
1115 #define SRB_STATUS_INVALID_TARGET_ID 0x21
1116 #define SRB_STATUS_BAD_FUNCTION 0x22
1117 #define SRB_STATUS_ERROR_RECOVERY 0x23
1118 #define SRB_STATUS_NOT_STARTED 0x24
1119 #define SRB_STATUS_NOT_IN_USE 0x30
1120 #define SRB_STATUS_FORCE_ABORT 0x31
1121 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1124 * Object-Server / Volume-Manager Dispatch Classes
1128 #define VM_NameServe 1
1129 #define VM_ContainerConfig 2
1131 #define VM_FilesystemIoctl 4
1132 #define VM_CloseAll 5
1133 #define VM_CtBlockRead 6
1134 #define VM_CtBlockWrite 7
1135 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
1136 #define VM_SliceBlockWrite 9
1137 #define VM_DriveBlockRead 10 /* raw access to physical devices */
1138 #define VM_DriveBlockWrite 11
1139 #define VM_EnclosureMgt 12 /* enclosure management */
1140 #define VM_Unused 13 /* used to be diskset management */
1141 #define VM_CtBlockVerify 14
1142 #define VM_CtPerf 15 /* performance test */
1143 #define VM_CtBlockRead64 16
1144 #define VM_CtBlockWrite64 17
1145 #define VM_CtBlockVerify64 18
1146 #define VM_CtHostRead64 19
1147 #define VM_CtHostWrite64 20
1149 #define MAX_VMCOMMAND_NUM 21 /* used for sizing stats array - leave last */
1152 * Descriptive information (eg, vital stats)
1153 * that a content manager might report. The
1154 * FileArray filesystem component is one example
1155 * of a content manager. Raw mode might be
1160 u32 fsTotalSize; /* Consumed by fs, incl. metadata */
1163 u32 fsMaxExtendSize;
1168 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1170 union aac_contentinfo {
1171 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1175 * Query for "mountable" objects, ie, objects that are typically
1176 * associated with a drive letter on the client (host) side.
1181 u8 name[16]; // if applicable
1182 struct creation_info create_info; // if applicable
1184 u32 vol; // substrate structure
1185 u32 obj; // FT_FILESYS, FT_DATABASE, etc.
1186 u32 state; // unready for mounting, readonly, etc.
1187 union aac_contentinfo fileinfo; // Info specific to content manager (eg, filesystem)
1188 u32 altoid; // != oid <==> snapshot or broken mirror exists
1191 #define FSCS_NOTCLEAN 0x0001 /* fsck is neccessary before mounting */
1192 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */
1193 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
1195 struct aac_query_mount {
1203 u32 type; /* should be same as that requested */
1205 struct aac_mntent mnt[1];
1209 * The following command is sent to shut down each container.
1217 struct aac_query_disk
1231 struct aac_delete_disk {
1251 * Ugly - non Linux like ioctl coding for back compat.
1254 #define CTL_CODE(function, method) ( \
1255 (4<< 16) | ((function) << 2) | (method) \
1259 * Define the method codes for how buffers are passed for I/O and FS
1263 #define METHOD_BUFFERED 0
1264 #define METHOD_NEITHER 3
1270 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1271 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1272 #define FSACTL_DELETE_DISK 0x163
1273 #define FSACTL_QUERY_DISK 0x173
1274 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1275 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1276 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1277 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1278 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1279 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1280 #define FSACTL_GET_CONTAINERS 2131
1286 * If this value is set to 1 then interrupt moderation will occur
1287 * in the base commuication support.
1294 * Statistical counters in debug mode
1300 u32 NoResponseRecved;
1308 extern struct aac_common aac_config;
1312 * The following macro is used when sending and receiving FIBs. It is
1313 * only used for debugging.
1317 #define FIB_COUNTER_INCREMENT(counter) (counter)++
1319 #define FIB_COUNTER_INCREMENT(counter)
1323 * Adapter direct commands
1324 * Monitor/Kernel API
1327 #define BREAKPOINT_REQUEST cpu_to_le32(0x00000004)
1328 #define INIT_STRUCT_BASE_ADDRESS cpu_to_le32(0x00000005)
1329 #define READ_PERMANENT_PARAMETERS cpu_to_le32(0x0000000a)
1330 #define WRITE_PERMANENT_PARAMETERS cpu_to_le32(0x0000000b)
1331 #define HOST_CRASHING cpu_to_le32(0x0000000d)
1332 #define SEND_SYNCHRONOUS_FIB cpu_to_le32(0x0000000c)
1333 #define COMMAND_POST_RESULTS cpu_to_le32(0x00000014)
1334 #define GET_ADAPTER_PROPERTIES cpu_to_le32(0x00000019)
1335 #define RE_INIT_ADAPTER cpu_to_le32(0x000000ee)
1338 * Adapter Status Register
1340 * Phase Staus mailbox is 32bits:
1341 * <31:16> = Phase Status
1344 * The adapter reports is present state through the phase. Only
1345 * a single phase should be ever be set. Each phase can have multiple
1346 * phase status bits to provide more detailed information about the
1347 * state of the board. Care should be taken to ensure that any phase
1348 * status bits that are set when changing the phase are also valid
1349 * for the new phase or be cleared out. Adapter software (monitor,
1350 * iflash, kernel) is responsible for properly maintining the phase
1351 * status mailbox when it is running.
1355 * Phases are bit oriented. It is NOT valid to have multiple bits set
1358 #define SELF_TEST_FAILED (cpu_to_le32(0x00000004))
1359 #define MONITOR_PANIC (cpu_to_le32(0x00000020))
1360 #define KERNEL_UP_AND_RUNNING (cpu_to_le32(0x00000080))
1361 #define KERNEL_PANIC (cpu_to_le32(0x00000100))
1364 * Doorbell bit defines
1367 #define DoorBellSyncCmdAvailable cpu_to_le32(1<<0) // Host -> Adapter
1368 #define DoorBellPrintfDone cpu_to_le32(1<<5) // Host -> Adapter
1369 #define DoorBellAdapterNormCmdReady cpu_to_le32(1<<1) // Adapter -> Host
1370 #define DoorBellAdapterNormRespReady cpu_to_le32(1<<2) // Adapter -> Host
1371 #define DoorBellAdapterNormCmdNotFull cpu_to_le32(1<<3) // Adapter -> Host
1372 #define DoorBellAdapterNormRespNotFull cpu_to_le32(1<<4) // Adapter -> Host
1373 #define DoorBellPrintfReady cpu_to_le32(1<<5) // Adapter -> Host
1376 * For FIB communication, we need all of the following things
1377 * to send back to the user.
1380 #define AifCmdEventNotify 1 /* Notify of event */
1381 #define AifEnConfigChange 3 /* Adapter configuration change */
1382 #define AifEnContainerChange 4 /* Container configuration change */
1383 #define AifEnDeviceFailure 5 /* SCSI device failed */
1384 #define AifEnAddContainer 15 /* A new array was created */
1385 #define AifEnDeleteContainer 16 /* A container was deleted */
1386 #define AifEnExpEvent 23 /* Firmware Event Log */
1387 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */
1388 #define AifHighPriority 3 /* Highest Priority Event */
1390 #define AifCmdJobProgress 2 /* Progress report */
1391 #define AifJobCtrZero 101 /* Array Zero progress */
1392 #define AifJobStsSuccess 1 /* Job completes */
1393 #define AifCmdAPIReport 3 /* Report from other user of API */
1394 #define AifCmdDriverNotify 4 /* Notify host driver of event */
1395 #define AifDenMorphComplete 200 /* A morph operation completed */
1396 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */
1397 #define AifReqJobList 100 /* Gets back complete job list */
1398 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */
1399 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */
1400 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */
1401 #define AifReqTerminateJob 104 /* Terminates job */
1402 #define AifReqSuspendJob 105 /* Suspends a job */
1403 #define AifReqResumeJob 106 /* Resumes a job */
1404 #define AifReqSendAPIReport 107 /* API generic report requests */
1405 #define AifReqAPIJobStart 108 /* Start a job from the API */
1406 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */
1407 #define AifReqAPIJobFinish 110 /* Finish a job from the API */
1410 * Adapter Initiated FIB command structures. Start with the adapter
1411 * initiated FIBs that really come from the adapter, and get responded
1416 u32 command; /* Tell host what type of notify this is */
1417 u32 seqnum; /* To allow ordering of reports (if necessary) */
1418 u8 data[1]; /* Undefined length (from kernel viewpoint) */
1422 * Convert capacity to cylinders
1423 * accounting for the fact capacity could be a 64 bit value
1426 static inline u32 cap_to_cyls(sector_t capacity, u32 divisor)
1428 sector_div(capacity, divisor);
1429 return (u32)capacity;
1434 const char *aac_driverinfo(struct Scsi_Host *);
1435 struct fib *fib_alloc(struct aac_dev *dev);
1436 int fib_setup(struct aac_dev *dev);
1437 void fib_map_free(struct aac_dev *dev);
1438 void fib_free(struct fib * context);
1439 void fib_init(struct fib * context);
1440 void fib_dealloc(struct fib * context);
1441 void aac_printf(struct aac_dev *dev, u32 val);
1442 int fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1443 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1444 int aac_consumer_avail(struct aac_dev * dev, struct aac_queue * q);
1445 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1446 int fib_complete(struct fib * context);
1447 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib->data)
1448 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1449 int aac_get_containers(struct aac_dev *dev);
1450 int aac_scsi_cmd(struct scsi_cmnd *cmd);
1451 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
1452 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
1453 int aac_rx_init(struct aac_dev *dev);
1454 int aac_rkt_init(struct aac_dev *dev);
1455 int aac_sa_init(struct aac_dev *dev);
1456 unsigned int aac_response_normal(struct aac_queue * q);
1457 unsigned int aac_command_normal(struct aac_queue * q);
1458 int aac_command_thread(struct aac_dev * dev);
1459 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1460 int fib_adapter_complete(struct fib * fibptr, unsigned short size);
1461 struct aac_driver_ident* aac_get_driver_ident(int devtype);
1462 int aac_get_adapter_info(struct aac_dev* dev);
1463 int aac_send_shutdown(struct aac_dev *dev);