3 * Linux MegaRAID device driver
5 * Copyright (c) 2003-2004 LSI Logic Corporation.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * FILE : megaraid_mbox.h
19 #include "mega_common.h"
20 #include "mbox_defs.h"
21 #include "megaraid_ioctl.h"
24 #define MEGARAID_VERSION "2.20.4.1"
25 #define MEGARAID_EXT_VERSION "(Release Date: Thu Nov 4 17:44:59 EST 2004)"
29 * Define some PCI values here until they are put in the kernel
31 #define PCI_DEVICE_ID_PERC4_DI_DISCOVERY 0x000E
32 #define PCI_SUBSYS_ID_PERC4_DI_DISCOVERY 0x0123
34 #define PCI_DEVICE_ID_PERC4_SC 0x1960
35 #define PCI_SUBSYS_ID_PERC4_SC 0x0520
37 #define PCI_DEVICE_ID_PERC4_DC 0x1960
38 #define PCI_SUBSYS_ID_PERC4_DC 0x0518
40 #define PCI_DEVICE_ID_PERC4_QC 0x0407
41 #define PCI_SUBSYS_ID_PERC4_QC 0x0531
43 #define PCI_DEVICE_ID_PERC4_DI_EVERGLADES 0x000F
44 #define PCI_SUBSYS_ID_PERC4_DI_EVERGLADES 0x014A
46 #define PCI_DEVICE_ID_PERC4E_SI_BIGBEND 0x0013
47 #define PCI_SUBSYS_ID_PERC4E_SI_BIGBEND 0x016c
49 #define PCI_DEVICE_ID_PERC4E_DI_KOBUK 0x0013
50 #define PCI_SUBSYS_ID_PERC4E_DI_KOBUK 0x016d
52 #define PCI_DEVICE_ID_PERC4E_DI_CORVETTE 0x0013
53 #define PCI_SUBSYS_ID_PERC4E_DI_CORVETTE 0x016e
55 #define PCI_DEVICE_ID_PERC4E_DI_EXPEDITION 0x0013
56 #define PCI_SUBSYS_ID_PERC4E_DI_EXPEDITION 0x016f
58 #define PCI_DEVICE_ID_PERC4E_DI_GUADALUPE 0x0013
59 #define PCI_SUBSYS_ID_PERC4E_DI_GUADALUPE 0x0170
61 #define PCI_DEVICE_ID_PERC4E_DC_320_2E 0x0408
62 #define PCI_SUBSYS_ID_PERC4E_DC_320_2E 0x0002
64 #define PCI_DEVICE_ID_PERC4E_SC_320_1E 0x0408
65 #define PCI_SUBSYS_ID_PERC4E_SC_320_1E 0x0001
67 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_0 0x1960
68 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0 0xA520
70 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_1 0x1960
71 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1 0x0520
73 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2 0x1960
74 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2 0x0518
76 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_0x 0x0407
77 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0x 0x0530
79 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2x 0x0407
80 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2x 0x0532
82 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_4x 0x0407
83 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_4x 0x0531
85 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_1E 0x0408
86 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1E 0x0001
88 #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2E 0x0408
89 #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2E 0x0002
91 #define PCI_DEVICE_ID_MEGARAID_I4_133_RAID 0x1960
92 #define PCI_SUBSYS_ID_MEGARAID_I4_133_RAID 0x0522
94 #define PCI_DEVICE_ID_MEGARAID_SATA_150_4 0x1960
95 #define PCI_SUBSYS_ID_MEGARAID_SATA_150_4 0x4523
97 #define PCI_DEVICE_ID_MEGARAID_SATA_150_6 0x1960
98 #define PCI_SUBSYS_ID_MEGARAID_SATA_150_6 0x0523
100 #define PCI_DEVICE_ID_MEGARAID_SATA_300_4x 0x0409
101 #define PCI_SUBSYS_ID_MEGARAID_SATA_300_4x 0x3004
103 #define PCI_DEVICE_ID_MEGARAID_SATA_300_8x 0x0409
104 #define PCI_SUBSYS_ID_MEGARAID_SATA_300_8x 0x3008
106 #define PCI_DEVICE_ID_INTEL_RAID_SRCU42X 0x0407
107 #define PCI_SUBSYS_ID_INTEL_RAID_SRCU42X 0x0532
109 #define PCI_DEVICE_ID_INTEL_RAID_SRCS16 0x1960
110 #define PCI_SUBSYS_ID_INTEL_RAID_SRCS16 0x0523
112 #define PCI_DEVICE_ID_INTEL_RAID_SRCU42E 0x0408
113 #define PCI_SUBSYS_ID_INTEL_RAID_SRCU42E 0x0002
115 #define PCI_DEVICE_ID_INTEL_RAID_SRCZCRX 0x0407
116 #define PCI_SUBSYS_ID_INTEL_RAID_SRCZCRX 0x0530
118 #define PCI_DEVICE_ID_INTEL_RAID_SRCS28X 0x0409
119 #define PCI_SUBSYS_ID_INTEL_RAID_SRCS28X 0x3008
121 #define PCI_DEVICE_ID_INTEL_RAID_SROMBU42E_ALIEF 0x0408
122 #define PCI_SUBSYS_ID_INTEL_RAID_SROMBU42E_ALIEF 0x3431
124 #define PCI_DEVICE_ID_INTEL_RAID_SROMBU42E_HARWICH 0x0408
125 #define PCI_SUBSYS_ID_INTEL_RAID_SROMBU42E_HARWICH 0x3499
127 #define PCI_DEVICE_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x1960
128 #define PCI_SUBSYS_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x0520
130 #define PCI_DEVICE_ID_FSC_MEGARAID_PCI_EXPRESS_ROMB 0x0408
131 #define PCI_SUBSYS_ID_FSC_MEGARAID_PCI_EXPRESS_ROMB 0x1065
133 #define PCI_DEVICE_ID_MEGARAID_ACER_ROMB_2E 0x0408
134 #define PCI_SUBSYS_ID_MEGARAID_ACER_ROMB_2E 0x004D
136 #define PCI_SUBSYS_ID_PERC3_QC 0x0471
137 #define PCI_SUBSYS_ID_PERC3_DC 0x0493
138 #define PCI_SUBSYS_ID_PERC3_SC 0x0475
140 #ifndef PCI_SUBSYS_ID_FSC
141 #define PCI_SUBSYS_ID_FSC 0x1734
144 #define MBOX_MAX_SCSI_CMDS 128 // number of cmds reserved for kernel
145 #define MBOX_MAX_USER_CMDS 32 // number of cmds for applications
146 #define MBOX_DEF_CMD_PER_LUN 64 // default commands per lun
147 #define MBOX_DEFAULT_SG_SIZE 26 // default sg size supported by all fw
148 #define MBOX_MAX_SG_SIZE 32 // maximum scatter-gather list size
149 #define MBOX_MAX_SECTORS 128 // maximum sectors per IO
150 #define MBOX_TIMEOUT 30 // timeout value for internal cmds
151 #define MBOX_BUSY_WAIT 10 // max usec to wait for busy mailbox
152 #define MBOX_RESET_WAIT 180 // wait these many seconds in reset
153 #define MBOX_RESET_EXT_WAIT 120 // extended wait reset
156 * maximum transfer that can happen through the firmware commands issued
157 * internnaly from the driver.
159 #define MBOX_IBUF_SIZE 4096
163 * mbox_ccb_t - command control block specific to mailbox based controllers
164 * @raw_mbox : raw mailbox pointer
166 * @mbox64 : extended mailbox
167 * @mbox_dma_h : maibox dma address
168 * @sgl64 : 64-bit scatter-gather list
169 * @sgl32 : 32-bit scatter-gather list
170 * @sgl_dma_h : dma handle for the scatter-gather list
171 * @pthru : passthru structure
172 * @pthru_dma_h : dma handle for the passthru structure
173 * @epthru : extended passthru structure
174 * @epthru_dma_h : dma handle for extended passthru structure
175 * @buf_dma_h : dma handle for buffers w/o sg list
177 * command control block specific to the mailbox based controllers
183 dma_addr_t mbox_dma_h;
186 dma_addr_t sgl_dma_h;
187 mraid_passthru_t *pthru;
188 dma_addr_t pthru_dma_h;
189 mraid_epassthru_t *epthru;
190 dma_addr_t epthru_dma_h;
191 dma_addr_t buf_dma_h;
196 * mraid_device_t - adapter soft state structure for mailbox controllers
197 * @param una_mbox64 : 64-bit mbox - unaligned
198 * @param una_mbox64_dma : mbox dma addr - unaligned
199 * @param mbox : 32-bit mbox - aligned
200 * @param mbox64 : 64-bit mbox - aligned
201 * @param mbox_dma : mbox dma addr - aligned
202 * @param mailbox_lock : exclusion lock for the mailbox
203 * @param baseport : base port of hba memory
204 * @param baseaddr : mapped addr of hba memory
205 * @param mbox_pool : pool of mailboxes
206 * @param mbox_pool_handle : handle for the mailbox pool memory
207 * @param epthru_pool : a pool for extended passthru commands
208 * @param epthru_pool_handle : handle to the pool above
209 * @param sg_pool : pool of scatter-gather lists for this driver
210 * @param sg_pool_handle : handle to the pool above
211 * @param ccb_list : list of our command control blocks
212 * @param uccb_list : list of cmd control blocks for mgmt module
213 * @param umbox64 : array of mailbox for user commands (cmm)
214 * @param pdrv_state : array for state of each physical drive.
215 * @param last_disp : flag used to show device scanning
216 * @param hw_error : set if FW not responding
217 * @param fast_load : If set, skip physical device scanning
218 * @channel_class : channel class, RAID or SCSI
220 * Initialization structure for mailbox controllers: memory based and IO based
221 * All the fields in this structure are LLD specific and may be discovered at
222 * init() or start() time.
224 * NOTE: The fields of this structures are placed to minimize cache misses
227 mbox64_t *una_mbox64;
228 dma_addr_t una_mbox64_dma;
232 spinlock_t mailbox_lock;
233 unsigned long baseport;
234 void __iomem * baseaddr;
235 struct mraid_pci_blk mbox_pool[MBOX_MAX_SCSI_CMDS];
236 struct dma_pool *mbox_pool_handle;
237 struct mraid_pci_blk epthru_pool[MBOX_MAX_SCSI_CMDS];
238 struct dma_pool *epthru_pool_handle;
239 struct mraid_pci_blk sg_pool[MBOX_MAX_SCSI_CMDS];
240 struct dma_pool *sg_pool_handle;
241 mbox_ccb_t ccb_list[MBOX_MAX_SCSI_CMDS];
242 mbox_ccb_t uccb_list[MBOX_MAX_USER_CMDS];
243 mbox64_t umbox64[MBOX_MAX_USER_CMDS];
245 uint8_t pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
249 uint8_t channel_class;
252 // route to raid device from adapter
253 #define ADAP2RAIDDEV(adp) ((mraid_device_t *)((adp)->raid_device))
255 #define MAILBOX_LOCK(rdev) (&(rdev)->mailbox_lock)
257 // Find out if this channel is a RAID or SCSI
258 #define IS_RAID_CH(rdev, ch) (((rdev)->channel_class >> (ch)) & 0x01)
261 #define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20)
262 #define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C)
263 #define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20)
264 #define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C)
266 #endif // _MEGARAID_H_
268 // vim: set ts=8 sw=8 tw=78: