2 * UART driver for 68360 CPM SCC or SMC
3 * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
7 * I used the serial.c driver as the framework for this driver.
8 * Give credit to those guys.
9 * The original code was written for the MBX860 board. I tried to make
10 * it generic, but there may be some assumptions in the structures that
11 * have to be fixed later.
12 * To save porting time, I did not bother to change any object names
13 * that are not accessed outside of this file.
14 * It still needs lots of work........When it was easy, I included code
15 * to support the SCCs, but this has never been tested, nor is it complete.
16 * Only the SCCs support modem control, so that is not complete either.
18 * This module exports the following rs232 io functions:
20 * int rs_360_init(void);
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/serialP.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
42 #include <asm/m68360.h>
43 #include <asm/commproc.h>
47 extern void breakpoint(void);
48 extern void set_debug_traps(void);
49 extern int kgdb_output_string (const char* s, unsigned int count);
53 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
54 #include <linux/console.h>
56 /* this defines the index into rs_table for the port to use
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT 2
71 #define TX_WAKEUP ASYNC_SHARE_IRQ
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
80 * Serial driver configuration section. Here are the various options:
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
86 /* Set of debugging defines */
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
93 #define _INLINE_ inline
97 /* We overload some of the items in the data structure to meet our
98 * needs. For example, the port address is the CPM parameter ram
99 * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
100 * 2 SMCs. The "hub6" field is used to indicate the channel number, with
101 * a flag indicating SCC or SMC, and the number is used as an index into
102 * the CPM parameter area for this device.
103 * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
104 * not currently used. I should probably use it to indicate the port
105 * type of SMC or SCC.
106 * The SMCs do not support any modem control signals.
108 #define smc_scc_num hub6
109 #define NUM_IS_SCC ((int)0x00010000)
110 #define PORT_NUM(P) ((P) & 0x0000ffff)
113 #if defined (CONFIG_UCQUICC)
115 volatile extern void *_periph_base;
117 * mode bits for are on pins
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
125 static uint sipex_mode_bits = 0x00000000;
129 /* There is no `serial_state' defined back here in 2.0.
130 * Try to get by with serial_struct
132 /* #define serial_state serial_struct */
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
138 struct async_icount_24 {
139 __u32 cts, dsr, rng, dcd, tx, rx;
140 __u32 frame, parity, overrun, brk;
147 struct serial_state {
156 int revision; /* Chip revision (950) */
162 unsigned short close_delay;
163 unsigned short closing_wait; /* time to wait before closing */
164 struct async_icount_24 icount;
166 struct async_struct *info;
170 #define SSTATE_MAGIC 0x5302
174 /* SMC2 is sometimes used for low performance TDM interfaces. Define
175 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176 * Define this as 0 if you wish to use SMC2 for something else.
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
184 /* Define which SCC is the first one to use for a serial port. These
185 * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186 * for Ethernet, and the first available SCC for serial UART is SCC2.
187 * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188 * interrupt vectors in the table below to match.
190 #define SCC_IDX_BASE 1 /* table index */
194 /* Processors other than the 860 only get SMCs configured by default.
195 * Either they don't have SCCs or they are allocated somewhere else.
196 * Of course, there are now 860s without some SCCs, so we will need to
197 * address that someday.
198 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199 * stereo codec parts, and we use SMC2 to help support that.
201 static struct serial_state rs_table[] = {
202 /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
203 { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
205 ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
208 #if defined(CONFIG_SERIAL_68360_SCC)
209 ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
210 ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
211 ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
215 #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
217 /* The number of buffer descriptors and their sizes.
219 #define RX_NUM_FIFO 4
220 #define RX_BUF_SIZE 32
221 #define TX_NUM_FIFO 4
222 #define TX_BUF_SIZE 32
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
229 /* The async_struct in serial.h does not really give us what we
230 * need, so define our own here.
232 typedef struct serial_info {
236 struct serial_state *state;
237 /* struct serial_struct *state; */
238 /* struct async_struct *state; */
240 struct tty_struct *tty;
241 int read_status_mask;
242 int ignore_status_mask;
245 int x_char; /* xon/xoff character */
247 unsigned short closing_wait;
248 unsigned short closing_wait2;
250 unsigned long last_active;
251 int blocked_open; /* # of blocked opens */
252 struct work_struct tqueue;
253 struct work_struct tqueue_hangup;
254 wait_queue_head_t open_wait;
255 wait_queue_head_t close_wait;
258 /* CPM Buffer Descriptor pointers.
260 QUICC_BD *rx_bd_base;
262 QUICC_BD *tx_bd_base;
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
275 static inline int serial_paranoia_check(ser_info_t *info,
276 char *name, const char *routine)
278 #ifdef SERIAL_PARANOIA_CHECK
279 static const char *badmagic =
280 "Warning: bad magic number for serial struct (%s) in %s\n";
281 static const char *badinfo =
282 "Warning: null async_struct for (%s) in %s\n";
285 printk(badinfo, name, routine);
288 if (info->magic != SERIAL_MAGIC) {
289 printk(badmagic, name, routine);
297 * This is used to figure out the divisor speeds and the timeouts,
298 * indexed by the termio value. The generic CPM functions are responsible
299 * for setting and assigning baud rate generators for us.
301 static int baud_table[] = {
302 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307 #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309 #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311 #define CONSOLE_BAUDRATE 115200
313 #warning "console baud rate undefined"
314 #define CONSOLE_BAUDRATE 9600
318 * ------------------------------------------------------------
319 * rs_stop() and rs_start()
321 * This routines are called before setting or resetting tty->stopped.
322 * They enable or disable transmitter interrupts, as necessary.
323 * ------------------------------------------------------------
325 static void rs_360_stop(struct tty_struct *tty)
327 ser_info_t *info = (ser_info_t *)tty->driver_data;
330 volatile struct scc_regs *sccp;
331 volatile struct smc_regs *smcp;
333 if (serial_paranoia_check(info, tty->name, "rs_stop"))
336 local_irq_save(flags);
337 idx = PORT_NUM(info->state->smc_scc_num);
338 if (info->state->smc_scc_num & NUM_IS_SCC) {
339 sccp = &pquicc->scc_regs[idx];
340 sccp->scc_sccm &= ~UART_SCCM_TX;
342 /* smcp = &cpmp->cp_smc[idx]; */
343 smcp = &pquicc->smc_regs[idx];
344 smcp->smc_smcm &= ~SMCM_TX;
346 local_irq_restore(flags);
350 static void rs_360_start(struct tty_struct *tty)
352 ser_info_t *info = (ser_info_t *)tty->driver_data;
355 volatile struct scc_regs *sccp;
356 volatile struct smc_regs *smcp;
358 if (serial_paranoia_check(info, tty->name, "rs_stop"))
361 local_irq_save(flags);
362 idx = PORT_NUM(info->state->smc_scc_num);
363 if (info->state->smc_scc_num & NUM_IS_SCC) {
364 sccp = &pquicc->scc_regs[idx];
365 sccp->scc_sccm |= UART_SCCM_TX;
367 smcp = &pquicc->smc_regs[idx];
368 smcp->smc_smcm |= SMCM_TX;
370 local_irq_restore(flags);
374 * ----------------------------------------------------------------------
376 * Here starts the interrupt handling routines. All of the following
377 * subroutines are declared as inline and are folded into
378 * rs_interrupt(). They were separated out for readability's sake.
380 * Note: rs_interrupt() is a "fast" interrupt, which means that it
381 * runs with interrupts turned off. People who may want to modify
382 * rs_interrupt() should try to keep the interrupt handler as fast as
383 * possible. After you are done making modifications, it is not a bad
386 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
388 * and look at the resulting assemble code in serial.s.
390 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391 * -----------------------------------------------------------------------
394 static _INLINE_ void receive_chars(ser_info_t *info)
396 struct tty_struct *tty = info->tty;
397 unsigned char ch, *cp;
401 struct async_icount *icount;
402 /* struct async_icount_24 *icount; */
403 volatile QUICC_BD *bdp;
405 icount = &info->state->icount;
407 /* Just loop through the closed BDs and copy the characters into
412 if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
413 break; /* we are all done */
415 /* The read status mask tell us what we should do with
416 * incoming characters, especially if errors occur.
417 * One special case is the use of BD_SC_EMPTY. If
418 * this is not set, we are supposed to be ignoring
419 * inputs. In this case, just mark the buffer empty and
422 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423 bdp->status |= BD_SC_EMPTY;
425 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
427 if (bdp->status & BD_SC_WRAP)
428 bdp = info->rx_bd_base;
434 /* Get the number of characters and the buffer pointer.
437 /* cp = (unsigned char *)__va(bdp->buf); */
438 cp = (char *)bdp->buf;
439 status = bdp->status;
441 /* Check to see if there is room in the tty buffer for
442 * the characters in our BD buffer. If not, we exit
443 * now, leaving the BD with the characters. We'll pick
444 * them up again on the next receive interrupt (which could
447 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
452 *tty->flip.char_buf_ptr = ch;
455 #ifdef SERIAL_DEBUG_INTR
456 printk("DR%02x:%02x...", ch, status);
458 *tty->flip.flag_buf_ptr = 0;
459 if (status & (BD_SC_BR | BD_SC_FR |
460 BD_SC_PR | BD_SC_OV)) {
462 * For statistics only
464 if (status & BD_SC_BR)
466 else if (status & BD_SC_PR)
468 else if (status & BD_SC_FR)
470 if (status & BD_SC_OV)
474 * Now check to see if character should be
475 * ignored, and mask off conditions which
477 if (status & info->ignore_status_mask) {
483 status &= info->read_status_mask;
485 if (status & (BD_SC_BR)) {
486 #ifdef SERIAL_DEBUG_INTR
487 printk("handling break....");
489 *tty->flip.flag_buf_ptr = TTY_BREAK;
490 if (info->flags & ASYNC_SAK)
492 } else if (status & BD_SC_PR)
493 *tty->flip.flag_buf_ptr = TTY_PARITY;
494 else if (status & BD_SC_FR)
495 *tty->flip.flag_buf_ptr = TTY_FRAME;
496 if (status & BD_SC_OV) {
498 * Overrun is special, since it's
499 * reported immediately, and doesn't
500 * affect the current character
502 if (tty->flip.count < TTY_FLIPBUF_SIZE) {
504 tty->flip.flag_buf_ptr++;
505 tty->flip.char_buf_ptr++;
506 *tty->flip.flag_buf_ptr =
511 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
514 tty->flip.flag_buf_ptr++;
515 tty->flip.char_buf_ptr++;
519 /* This BD is ready to be used again. Clear status.
522 bdp->status |= BD_SC_EMPTY;
523 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
525 if (bdp->status & BD_SC_WRAP)
526 bdp = info->rx_bd_base;
531 info->rx_cur = (QUICC_BD *)bdp;
533 schedule_work(&tty->flip.work);
536 static _INLINE_ void receive_break(ser_info_t *info)
538 struct tty_struct *tty = info->tty;
540 info->state->icount.brk++;
541 /* Check to see if there is room in the tty buffer for
542 * the break. If not, we exit now, losing the break. FIXME
544 if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
546 *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
547 *(tty->flip.char_buf_ptr++) = 0;
550 schedule_work(&tty->flip.work);
553 static _INLINE_ void transmit_chars(ser_info_t *info)
556 if ((info->flags & TX_WAKEUP) ||
557 (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
558 schedule_work(&info->tqueue);
561 #ifdef SERIAL_DEBUG_INTR
567 /* I need to do this for the SCCs, so it is left as a reminder.
569 static _INLINE_ void check_modem_status(struct async_struct *info)
572 /* struct async_icount *icount; */
573 struct async_icount_24 *icount;
575 status = serial_in(info, UART_MSR);
577 if (status & UART_MSR_ANY_DELTA) {
578 icount = &info->state->icount;
579 /* update input line counters */
580 if (status & UART_MSR_TERI)
582 if (status & UART_MSR_DDSR)
584 if (status & UART_MSR_DDCD) {
586 #ifdef CONFIG_HARD_PPS
587 if ((info->flags & ASYNC_HARDPPS_CD) &&
588 (status & UART_MSR_DCD))
592 if (status & UART_MSR_DCTS)
594 wake_up_interruptible(&info->delta_msr_wait);
597 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
598 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
599 printk("ttys%d CD now %s...", info->line,
600 (status & UART_MSR_DCD) ? "on" : "off");
602 if (status & UART_MSR_DCD)
603 wake_up_interruptible(&info->open_wait);
605 #ifdef SERIAL_DEBUG_OPEN
606 printk("scheduling hangup...");
608 queue_task(&info->tqueue_hangup,
612 if (info->flags & ASYNC_CTS_FLOW) {
613 if (info->tty->hw_stopped) {
614 if (status & UART_MSR_CTS) {
615 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
616 printk("CTS tx start...");
618 info->tty->hw_stopped = 0;
619 info->IER |= UART_IER_THRI;
620 serial_out(info, UART_IER, info->IER);
621 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
625 if (!(status & UART_MSR_CTS)) {
626 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
627 printk("CTS tx stop...");
629 info->tty->hw_stopped = 1;
630 info->IER &= ~UART_IER_THRI;
631 serial_out(info, UART_IER, info->IER);
639 * This is the serial driver's interrupt routine for a single port
641 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
642 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
647 volatile struct smc_regs *smcp;
648 volatile struct scc_regs *sccp;
650 info = (ser_info_t *)dev_id;
652 idx = PORT_NUM(info->state->smc_scc_num);
653 if (info->state->smc_scc_num & NUM_IS_SCC) {
654 sccp = &pquicc->scc_regs[idx];
655 events = sccp->scc_scce;
656 if (events & SCCM_RX)
658 if (events & SCCM_TX)
659 transmit_chars(info);
660 sccp->scc_scce = events;
662 smcp = &pquicc->smc_regs[idx];
663 events = smcp->smc_smce;
664 if (events & SMCM_BRKE)
666 if (events & SMCM_RX)
668 if (events & SMCM_TX)
669 transmit_chars(info);
670 smcp->smc_smce = events;
673 #ifdef SERIAL_DEBUG_INTR
674 printk("rs_interrupt_single(%d, %x)...",
675 info->state->smc_scc_num, events);
678 check_modem_status(info);
680 info->last_active = jiffies;
681 #ifdef SERIAL_DEBUG_INTR
688 * -------------------------------------------------------------------
689 * Here ends the serial interrupt routines.
690 * -------------------------------------------------------------------
694 static void do_softint(void *private_)
696 ser_info_t *info = (ser_info_t *) private_;
697 struct tty_struct *tty;
703 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
704 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
705 tty->ldisc.write_wakeup)
706 (tty->ldisc.write_wakeup)(tty);
707 wake_up_interruptible(&tty->write_wait);
713 * This routine is called from the scheduler tqueue when the interrupt
714 * routine has signalled that a hangup has occurred. The path of
715 * hangup processing is:
717 * serial interrupt routine -> (scheduler tqueue) ->
718 * do_serial_hangup() -> tty->hangup() -> rs_hangup()
721 static void do_serial_hangup(void *private_)
723 struct async_struct *info = (struct async_struct *) private_;
724 struct tty_struct *tty;
734 static int startup(ser_info_t *info)
739 /*struct serial_state *state = info->state;*/
740 volatile struct smc_regs *smcp;
741 volatile struct scc_regs *sccp;
742 volatile struct smc_uart_pram *up;
743 volatile struct uart_pram *scup;
746 local_irq_save(flags);
748 if (info->flags & ASYNC_INITIALIZED) {
753 if (!state->port || !state->type) {
755 set_bit(TTY_IO_ERROR, &info->tty->flags);
760 #ifdef SERIAL_DEBUG_OPEN
761 printk("starting up ttys%d (irq %d)...", info->line, state->irq);
767 if (info->tty->termios->c_cflag & CBAUD)
768 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
772 clear_bit(TTY_IO_ERROR, &info->tty->flags);
775 * and set the speed of the serial port
779 idx = PORT_NUM(info->state->smc_scc_num);
780 if (info->state->smc_scc_num & NUM_IS_SCC) {
781 sccp = &pquicc->scc_regs[idx];
782 scup = &pquicc->pram[info->state->port].scc.pscc.u;
784 scup->mrblr = RX_BUF_SIZE;
785 scup->max_idl = RX_BUF_SIZE;
787 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
788 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
791 smcp = &pquicc->smc_regs[idx];
793 /* Enable interrupts and I/O.
795 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
796 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
798 /* We can tune the buffer length and idle characters
799 * to take advantage of the entire incoming buffer size.
800 * If mrblr is something other than 1, maxidl has to be
801 * non-zero or we never get an interrupt. The maxidl
802 * is the number of character times we wait after reception
803 * of the last character before we decide no more characters
806 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
807 /* holy unionized structures, Batman: */
808 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
810 up->mrblr = RX_BUF_SIZE;
811 up->max_idl = RX_BUF_SIZE;
813 up->brkcr = 1; /* number of break chars */
816 info->flags |= ASYNC_INITIALIZED;
817 local_irq_restore(flags);
821 local_irq_restore(flags);
826 * This routine will shutdown a serial port; interrupts are disabled, and
827 * DTR is dropped if the hangup on close termio flag is on.
829 static void shutdown(ser_info_t *info)
832 struct serial_state *state;
834 volatile struct smc_regs *smcp;
835 volatile struct scc_regs *sccp;
837 if (!(info->flags & ASYNC_INITIALIZED))
842 #ifdef SERIAL_DEBUG_OPEN
843 printk("Shutting down serial port %d (irq %d)....", info->line,
847 local_irq_save(flags);
849 idx = PORT_NUM(state->smc_scc_num);
850 if (state->smc_scc_num & NUM_IS_SCC) {
851 sccp = &pquicc->scc_regs[idx];
852 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
853 #ifdef CONFIG_SERIAL_CONSOLE
854 /* We can't disable the transmitter if this is the
857 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
859 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
861 smcp = &pquicc->smc_regs[idx];
863 /* Disable interrupts and I/O.
865 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
866 #ifdef CONFIG_SERIAL_CONSOLE
867 /* We can't disable the transmitter if this is the
870 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
872 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
876 set_bit(TTY_IO_ERROR, &info->tty->flags);
878 info->flags &= ~ASYNC_INITIALIZED;
879 local_irq_restore(flags);
883 * This routine is called to set the UART divisor registers to match
884 * the specified baud rate for a serial port.
886 static void change_speed(ser_info_t *info)
889 unsigned cflag, cval, scval, prev_mode;
890 int i, bits, sbits, idx;
892 struct serial_state *state;
893 volatile struct smc_regs *smcp;
894 volatile struct scc_regs *sccp;
896 if (!info->tty || !info->tty->termios)
898 cflag = info->tty->termios->c_cflag;
902 /* Character length programmed into the mode register is the
903 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
904 * 1 or 2 stop bits, minus 1.
905 * The value 'bits' counts this for us.
910 /* byte size and parity */
911 switch (cflag & CSIZE) {
912 case CS5: bits = 5; break;
913 case CS6: bits = 6; break;
914 case CS7: bits = 7; break;
915 case CS8: bits = 8; break;
916 /* Never happens, but GCC is too dumb to figure it out */
917 default: bits = 8; break;
921 if (cflag & CSTOPB) {
922 cval |= SMCMR_SL; /* Two stops */
923 scval |= SCU_PMSR_SL;
926 if (cflag & PARENB) {
928 scval |= SCU_PMSR_PEN;
931 if (!(cflag & PARODD)) {
932 cval |= SMCMR_PM_EVEN;
933 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
936 /* Determine divisor based on baud rate */
938 if (i >= (sizeof(baud_table)/sizeof(int)))
941 baud_rate = baud_table[i];
943 info->timeout = (TX_BUF_SIZE*HZ*bits);
944 info->timeout += HZ/50; /* Add .02 seconds of slop */
947 /* CTS flow control flag and modem status interrupts */
948 info->IER &= ~UART_IER_MSI;
949 if (info->flags & ASYNC_HARDPPS_CD)
950 info->IER |= UART_IER_MSI;
951 if (cflag & CRTSCTS) {
952 info->flags |= ASYNC_CTS_FLOW;
953 info->IER |= UART_IER_MSI;
955 info->flags &= ~ASYNC_CTS_FLOW;
957 info->flags &= ~ASYNC_CHECK_CD;
959 info->flags |= ASYNC_CHECK_CD;
960 info->IER |= UART_IER_MSI;
962 serial_out(info, UART_IER, info->IER);
966 * Set up parity check flag
968 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
970 info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
971 if (I_INPCK(info->tty))
972 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
973 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
974 info->read_status_mask |= BD_SC_BR;
977 * Characters to ignore
979 info->ignore_status_mask = 0;
980 if (I_IGNPAR(info->tty))
981 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
982 if (I_IGNBRK(info->tty)) {
983 info->ignore_status_mask |= BD_SC_BR;
985 * If we're ignore parity and break indicators, ignore
986 * overruns too. (For real raw support).
988 if (I_IGNPAR(info->tty))
989 info->ignore_status_mask |= BD_SC_OV;
992 * !!! ignore all characters if CREAD is not set
994 if ((cflag & CREAD) == 0)
995 info->read_status_mask &= ~BD_SC_EMPTY;
996 local_irq_save(flags);
998 /* Start bit has not been added (so don't, because we would just
999 * subtract it later), and we need to add one for the number of
1000 * stops bits (there is always at least one).
1003 idx = PORT_NUM(state->smc_scc_num);
1004 if (state->smc_scc_num & NUM_IS_SCC) {
1005 sccp = &pquicc->scc_regs[idx];
1006 sccp->scc_psmr = (sbits << 12) | scval;
1008 smcp = &pquicc->smc_regs[idx];
1010 /* Set the mode register. We want to keep a copy of the
1011 * enables, because we want to put them back if they were
1014 prev_mode = smcp->smc_smcmr;
1015 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
1016 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
1019 m360_cpm_setbrg((state - rs_table), baud_rate);
1021 local_irq_restore(flags);
1024 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
1026 ser_info_t *info = (ser_info_t *)tty->driver_data;
1027 volatile QUICC_BD *bdp;
1029 if (serial_paranoia_check(info, tty->name, "rs_put_char"))
1036 while (bdp->status & BD_SC_READY);
1038 /* *((char *)__va(bdp->buf)) = ch; */
1039 *((char *)bdp->buf) = ch;
1041 bdp->status |= BD_SC_READY;
1045 if (bdp->status & BD_SC_WRAP)
1046 bdp = info->tx_bd_base;
1050 info->tx_cur = (QUICC_BD *)bdp;
1054 static int rs_360_write(struct tty_struct * tty, int from_user,
1055 const unsigned char *buf, int count)
1058 ser_info_t *info = (ser_info_t *)tty->driver_data;
1059 volatile QUICC_BD *bdp;
1062 /* Try to let stub handle output. Returns true if it did. */
1063 if (kgdb_output_string(buf, count))
1067 if (serial_paranoia_check(info, tty->name, "rs_write"))
1076 c = min(count, TX_BUF_SIZE);
1081 if (bdp->status & BD_SC_READY) {
1082 info->flags |= TX_WAKEUP;
1087 if (copy_from_user((void *)bdp->buf, buf, c)) {
1093 /* memcpy(__va(bdp->buf), buf, c); */
1094 memcpy((void *)bdp->buf, buf, c);
1098 bdp->status |= BD_SC_READY;
1106 if (bdp->status & BD_SC_WRAP)
1107 bdp = info->tx_bd_base;
1110 info->tx_cur = (QUICC_BD *)bdp;
1115 static int rs_360_write_room(struct tty_struct *tty)
1117 ser_info_t *info = (ser_info_t *)tty->driver_data;
1120 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1123 if ((info->tx_cur->status & BD_SC_READY) == 0) {
1124 info->flags &= ~TX_WAKEUP;
1128 info->flags |= TX_WAKEUP;
1134 /* I could track this with transmit counters....maybe later.
1136 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1138 ser_info_t *info = (ser_info_t *)tty->driver_data;
1140 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1145 static void rs_360_flush_buffer(struct tty_struct *tty)
1147 ser_info_t *info = (ser_info_t *)tty->driver_data;
1149 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1152 /* There is nothing to "flush", whatever we gave the CPM
1153 * is on its way out.
1155 wake_up_interruptible(&tty->write_wait);
1156 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
1157 tty->ldisc.write_wakeup)
1158 (tty->ldisc.write_wakeup)(tty);
1159 info->flags &= ~TX_WAKEUP;
1163 * This function is used to send a high-priority XON/XOFF character to
1166 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1168 volatile QUICC_BD *bdp;
1170 ser_info_t *info = (ser_info_t *)tty->driver_data;
1172 if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1176 while (bdp->status & BD_SC_READY);
1178 /* *((char *)__va(bdp->buf)) = ch; */
1179 *((char *)bdp->buf) = ch;
1181 bdp->status |= BD_SC_READY;
1185 if (bdp->status & BD_SC_WRAP)
1186 bdp = info->tx_bd_base;
1190 info->tx_cur = (QUICC_BD *)bdp;
1194 * ------------------------------------------------------------
1197 * This routine is called by the upper-layer tty layer to signal that
1198 * incoming characters should be throttled.
1199 * ------------------------------------------------------------
1201 static void rs_360_throttle(struct tty_struct * tty)
1203 ser_info_t *info = (ser_info_t *)tty->driver_data;
1204 #ifdef SERIAL_DEBUG_THROTTLE
1207 printk("throttle %s: %d....\n", _tty_name(tty, buf),
1208 tty->ldisc.chars_in_buffer(tty));
1211 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1215 rs_360_send_xchar(tty, STOP_CHAR(tty));
1217 #ifdef modem_control
1218 if (tty->termios->c_cflag & CRTSCTS)
1219 info->MCR &= ~UART_MCR_RTS;
1221 local_irq_disable();
1222 serial_out(info, UART_MCR, info->MCR);
1227 static void rs_360_unthrottle(struct tty_struct * tty)
1229 ser_info_t *info = (ser_info_t *)tty->driver_data;
1230 #ifdef SERIAL_DEBUG_THROTTLE
1233 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1234 tty->ldisc.chars_in_buffer(tty));
1237 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1244 rs_360_send_xchar(tty, START_CHAR(tty));
1246 #ifdef modem_control
1247 if (tty->termios->c_cflag & CRTSCTS)
1248 info->MCR |= UART_MCR_RTS;
1249 local_irq_disable();
1250 serial_out(info, UART_MCR, info->MCR);
1256 * ------------------------------------------------------------
1257 * rs_ioctl() and friends
1258 * ------------------------------------------------------------
1263 * get_lsr_info - get line status register info
1265 * Purpose: Let user call ioctl() to get info when the UART physically
1266 * is emptied. On bus types like RS485, the transmitter must
1267 * release the bus after transmitting. This must be done when
1268 * the transmit shift register is empty, not be done when the
1269 * transmit holding register is empty. This functionality
1270 * allows an RS485 driver to be written in user space.
1272 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1274 unsigned char status;
1275 unsigned int result;
1277 local_irq_disable();
1278 status = serial_in(info, UART_LSR);
1280 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1281 return put_user(result,value);
1285 static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
1287 ser_info_t *info = (ser_info_t *)tty->driver_data;
1288 unsigned int result = 0;
1289 #ifdef modem_control
1290 unsigned char control, status;
1292 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1295 if (tty->flags & (1 << TTY_IO_ERROR))
1298 control = info->MCR;
1299 local_irq_disable();
1300 status = serial_in(info, UART_MSR);
1302 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1303 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1305 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1306 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1308 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
1309 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
1310 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
1311 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1316 static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
1317 unsigned int set, unsigned int clear)
1319 #ifdef modem_control
1320 ser_info_t *info = (ser_info_t *)tty->driver_data;
1323 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1326 if (tty->flags & (1 << TTY_IO_ERROR))
1329 if (set & TIOCM_RTS)
1330 info->mcr |= UART_MCR_RTS;
1331 if (set & TIOCM_DTR)
1332 info->mcr |= UART_MCR_DTR;
1333 if (clear & TIOCM_RTS)
1334 info->MCR &= ~UART_MCR_RTS;
1335 if (clear & TIOCM_DTR)
1336 info->MCR &= ~UART_MCR_DTR;
1339 if (set & TIOCM_OUT1)
1340 info->MCR |= UART_MCR_OUT1;
1341 if (set & TIOCM_OUT2)
1342 info->MCR |= UART_MCR_OUT2;
1343 if (clear & TIOCM_OUT1)
1344 info->MCR &= ~UART_MCR_OUT1;
1345 if (clear & TIOCM_OUT2)
1346 info->MCR &= ~UART_MCR_OUT2;
1349 local_irq_disable();
1350 serial_out(info, UART_MCR, info->MCR);
1356 /* Sending a break is a two step process on the SMC/SCC. It is accomplished
1357 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1358 * command. We take advantage of the begin/end functions to make this
1361 static ushort smc_chan_map[] = {
1366 static ushort scc_chan_map[] = {
1373 static void begin_break(ser_info_t *info)
1381 idx = PORT_NUM(info->state->smc_scc_num);
1382 if (info->state->smc_scc_num & NUM_IS_SCC)
1383 chan = scc_chan_map[idx];
1385 chan = smc_chan_map[idx];
1387 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1388 while (cp->cp_cr & CPM_CR_FLG);
1391 static void end_break(ser_info_t *info)
1399 idx = PORT_NUM(info->state->smc_scc_num);
1400 if (info->state->smc_scc_num & NUM_IS_SCC)
1401 chan = scc_chan_map[idx];
1403 chan = smc_chan_map[idx];
1405 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1406 while (cp->cp_cr & CPM_CR_FLG);
1410 * This routine sends a break character out the serial port.
1412 static void send_break(ser_info_t *info, int duration)
1414 current->state = TASK_INTERRUPTIBLE;
1415 #ifdef SERIAL_DEBUG_SEND_BREAK
1416 printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1419 schedule_timeout(duration);
1421 #ifdef SERIAL_DEBUG_SEND_BREAK
1422 printk("done jiffies=%lu\n", jiffies);
1427 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1428 unsigned int cmd, unsigned long arg)
1431 ser_info_t *info = (ser_info_t *)tty->driver_data;
1433 struct async_icount cnow;
1434 /* struct async_icount_24 cnow;*/ /* kernel counter temps */
1435 struct serial_icounter_struct *p_cuser; /* user space */
1437 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1440 if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1441 if (tty->flags & (1 << TTY_IO_ERROR))
1446 case TCSBRK: /* SVID version: non-zero arg --> no break */
1447 retval = tty_check_change(tty);
1450 tty_wait_until_sent(tty, 0);
1451 if (signal_pending(current))
1454 send_break(info, HZ/4); /* 1/4 second */
1455 if (signal_pending(current))
1459 case TCSBRKP: /* support for POSIX tcsendbreak() */
1460 retval = tty_check_change(tty);
1463 tty_wait_until_sent(tty, 0);
1464 if (signal_pending(current))
1466 send_break(info, arg ? arg*(HZ/10) : HZ/4);
1467 if (signal_pending(current))
1471 retval = tty_check_change(tty);
1474 tty_wait_until_sent(tty, 0);
1478 retval = tty_check_change(tty);
1484 /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1485 put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1488 error = get_user(arg, (unsigned int *) arg);
1491 tty->termios->c_cflag =
1492 ((tty->termios->c_cflag & ~CLOCAL) |
1493 (arg ? CLOCAL : 0));
1496 case TIOCSERGETLSR: /* Get line status register */
1497 return get_lsr_info(info, (unsigned int *) arg);
1500 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1501 * - mask passed in arg for lines of interest
1502 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1503 * Caller should use TIOCGICOUNT to see which one it was
1506 #ifdef modem_control
1507 local_irq_disable();
1508 /* note the counters on entry */
1509 cprev = info->state->icount;
1512 interruptible_sleep_on(&info->delta_msr_wait);
1513 /* see if a signal did it */
1514 if (signal_pending(current))
1515 return -ERESTARTSYS;
1516 local_irq_disable();
1517 cnow = info->state->icount; /* atomic copy */
1519 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1520 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1521 return -EIO; /* no change => error */
1522 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1523 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1524 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1525 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1536 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1537 * Return: write counters to the user passed counter struct
1538 * NB: both 1->0 and 0->1 transitions are counted except for
1539 * RI where only 0->1 is counted.
1542 local_irq_disable();
1543 cnow = info->state->icount;
1545 p_cuser = (struct serial_icounter_struct *) arg;
1546 /* error = put_user(cnow.cts, &p_cuser->cts); */
1547 /* if (error) return error; */
1548 /* error = put_user(cnow.dsr, &p_cuser->dsr); */
1549 /* if (error) return error; */
1550 /* error = put_user(cnow.rng, &p_cuser->rng); */
1551 /* if (error) return error; */
1552 /* error = put_user(cnow.dcd, &p_cuser->dcd); */
1553 /* if (error) return error; */
1555 put_user(cnow.cts, &p_cuser->cts);
1556 put_user(cnow.dsr, &p_cuser->dsr);
1557 put_user(cnow.rng, &p_cuser->rng);
1558 put_user(cnow.dcd, &p_cuser->dcd);
1562 return -ENOIOCTLCMD;
1567 /* FIX UP modem control here someday......
1569 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1571 ser_info_t *info = (ser_info_t *)tty->driver_data;
1573 if ( (tty->termios->c_cflag == old_termios->c_cflag)
1574 && ( RELEVANT_IFLAG(tty->termios->c_iflag)
1575 == RELEVANT_IFLAG(old_termios->c_iflag)))
1580 #ifdef modem_control
1581 /* Handle transition to B0 status */
1582 if ((old_termios->c_cflag & CBAUD) &&
1583 !(tty->termios->c_cflag & CBAUD)) {
1584 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1585 local_irq_disable();
1586 serial_out(info, UART_MCR, info->MCR);
1590 /* Handle transition away from B0 status */
1591 if (!(old_termios->c_cflag & CBAUD) &&
1592 (tty->termios->c_cflag & CBAUD)) {
1593 info->MCR |= UART_MCR_DTR;
1594 if (!tty->hw_stopped ||
1595 !(tty->termios->c_cflag & CRTSCTS)) {
1596 info->MCR |= UART_MCR_RTS;
1598 local_irq_disable();
1599 serial_out(info, UART_MCR, info->MCR);
1603 /* Handle turning off CRTSCTS */
1604 if ((old_termios->c_cflag & CRTSCTS) &&
1605 !(tty->termios->c_cflag & CRTSCTS)) {
1606 tty->hw_stopped = 0;
1613 * No need to wake up processes in open wait, since they
1614 * sample the CLOCAL flag once, and don't recheck it.
1615 * XXX It's not clear whether the current behavior is correct
1616 * or not. Hence, this may change.....
1618 if (!(old_termios->c_cflag & CLOCAL) &&
1619 (tty->termios->c_cflag & CLOCAL))
1620 wake_up_interruptible(&info->open_wait);
1625 * ------------------------------------------------------------
1628 * This routine is called when the serial port gets closed. First, we
1629 * wait for the last remaining data to be sent. Then, we unlink its
1630 * async structure from the interrupt chain if necessary, and we free
1631 * that IRQ if nothing is left in the chain.
1632 * ------------------------------------------------------------
1634 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1636 ser_info_t *info = (ser_info_t *)tty->driver_data;
1637 /* struct async_state *state; */
1638 struct serial_state *state;
1639 unsigned long flags;
1641 volatile struct smc_regs *smcp;
1642 volatile struct scc_regs *sccp;
1644 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1647 state = info->state;
1649 local_irq_save(flags);
1651 if (tty_hung_up_p(filp)) {
1652 DBG_CNT("before DEC-hung");
1654 local_irq_restore(flags);
1658 #ifdef SERIAL_DEBUG_OPEN
1659 printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1661 if ((tty->count == 1) && (state->count != 1)) {
1663 * Uh, oh. tty->count is 1, which means that the tty
1664 * structure will be freed. state->count should always
1665 * be one in these conditions. If it's greater than
1666 * one, we've got real problems, since it means the
1667 * serial port won't be shutdown.
1669 printk("rs_close: bad serial port count; tty->count is 1, "
1670 "state->count is %d\n", state->count);
1673 if (--state->count < 0) {
1674 printk("rs_close: bad serial port count for ttys%d: %d\n",
1675 info->line, state->count);
1679 DBG_CNT("before DEC-2");
1681 local_irq_restore(flags);
1684 info->flags |= ASYNC_CLOSING;
1686 * Now we wait for the transmit buffer to clear; and we notify
1687 * the line discipline to only process XON/XOFF characters.
1690 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1691 tty_wait_until_sent(tty, info->closing_wait);
1693 * At this point we stop accepting input. To do this, we
1694 * disable the receive line status interrupts, and tell the
1695 * interrupt driver to stop checking the data ready bit in the
1696 * line status register.
1698 info->read_status_mask &= ~BD_SC_EMPTY;
1699 if (info->flags & ASYNC_INITIALIZED) {
1701 idx = PORT_NUM(info->state->smc_scc_num);
1702 if (info->state->smc_scc_num & NUM_IS_SCC) {
1703 sccp = &pquicc->scc_regs[idx];
1704 sccp->scc_sccm &= ~UART_SCCM_RX;
1705 sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1707 smcp = &pquicc->smc_regs[idx];
1708 smcp->smc_smcm &= ~SMCM_RX;
1709 smcp->smc_smcmr &= ~SMCMR_REN;
1712 * Before we drop DTR, make sure the UART transmitter
1713 * has completely drained; this is especially
1714 * important if there is a transmit FIFO!
1716 rs_360_wait_until_sent(tty, info->timeout);
1719 if (tty->driver->flush_buffer)
1720 tty->driver->flush_buffer(tty);
1721 if (tty->ldisc.flush_buffer)
1722 tty->ldisc.flush_buffer(tty);
1726 if (info->blocked_open) {
1727 if (info->close_delay) {
1728 current->state = TASK_INTERRUPTIBLE;
1729 schedule_timeout(info->close_delay);
1731 wake_up_interruptible(&info->open_wait);
1733 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1734 wake_up_interruptible(&info->close_wait);
1736 local_irq_restore(flags);
1740 * rs_wait_until_sent() --- wait until the transmitter is empty
1742 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1744 ser_info_t *info = (ser_info_t *)tty->driver_data;
1745 unsigned long orig_jiffies, char_time;
1747 volatile QUICC_BD *bdp;
1749 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1753 if (info->state->type == PORT_UNKNOWN)
1757 orig_jiffies = jiffies;
1759 * Set the check interval to be 1/5 of the estimated time to
1760 * send a single character, and make it at least 1. The check
1761 * interval should also be less than the timeout.
1763 * Note: we have to use pretty tight timings here to satisfy
1768 char_time = min(char_time, (unsigned long)timeout);
1769 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1770 printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1771 printk("jiff=%lu...", jiffies);
1774 /* We go through the loop at least once because we can't tell
1775 * exactly when the last character exits the shifter. There can
1776 * be at least two characters waiting to be sent after the buffers
1780 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1781 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1783 current->state = TASK_INTERRUPTIBLE;
1784 /* current->counter = 0; make us low-priority */
1785 schedule_timeout(char_time);
1786 if (signal_pending(current))
1788 if (timeout && ((orig_jiffies + timeout) < jiffies))
1790 /* The 'tx_cur' is really the next buffer to send. We
1791 * have to back up to the previous BD and wait for it
1792 * to go. This isn't perfect, because all this indicates
1793 * is the buffer is available. There are still characters
1797 if (bdp == info->tx_bd_base)
1798 bdp += (TX_NUM_FIFO-1);
1801 } while (bdp->status & BD_SC_READY);
1802 current->state = TASK_RUNNING;
1803 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1804 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1809 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1811 static void rs_360_hangup(struct tty_struct *tty)
1813 ser_info_t *info = (ser_info_t *)tty->driver_data;
1814 struct serial_state *state = info->state;
1816 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1819 state = info->state;
1821 rs_360_flush_buffer(tty);
1825 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1827 wake_up_interruptible(&info->open_wait);
1831 * ------------------------------------------------------------
1832 * rs_open() and friends
1833 * ------------------------------------------------------------
1835 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1838 #ifdef DO_THIS_LATER
1839 DECLARE_WAITQUEUE(wait, current);
1841 struct serial_state *state = info->state;
1846 * If the device is in the middle of being closed, then block
1847 * until it's done, and then try again.
1849 if (tty_hung_up_p(filp) ||
1850 (info->flags & ASYNC_CLOSING)) {
1851 if (info->flags & ASYNC_CLOSING)
1852 interruptible_sleep_on(&info->close_wait);
1853 #ifdef SERIAL_DO_RESTART
1854 if (info->flags & ASYNC_HUP_NOTIFY)
1857 return -ERESTARTSYS;
1864 * If non-blocking mode is set, or the port is not enabled,
1865 * then make the check up front and then exit.
1866 * If this is an SMC port, we don't have modem control to wait
1867 * for, so just get out here.
1869 if ((filp->f_flags & O_NONBLOCK) ||
1870 (tty->flags & (1 << TTY_IO_ERROR)) ||
1871 !(info->state->smc_scc_num & NUM_IS_SCC)) {
1872 info->flags |= ASYNC_NORMAL_ACTIVE;
1876 if (tty->termios->c_cflag & CLOCAL)
1880 * Block waiting for the carrier detect and the line to become
1881 * free (i.e., not in use by the callout). While we are in
1882 * this loop, state->count is dropped by one, so that
1883 * rs_close() knows when to free things. We restore it upon
1884 * exit, either normal or abnormal.
1887 #ifdef DO_THIS_LATER
1888 add_wait_queue(&info->open_wait, &wait);
1889 #ifdef SERIAL_DEBUG_OPEN
1890 printk("block_til_ready before block: ttys%d, count = %d\n",
1891 state->line, state->count);
1893 local_irq_disable();
1894 if (!tty_hung_up_p(filp))
1897 info->blocked_open++;
1899 local_irq_disable();
1900 if (tty->termios->c_cflag & CBAUD)
1901 serial_out(info, UART_MCR,
1902 serial_inp(info, UART_MCR) |
1903 (UART_MCR_DTR | UART_MCR_RTS));
1905 set_current_state(TASK_INTERRUPTIBLE);
1906 if (tty_hung_up_p(filp) ||
1907 !(info->flags & ASYNC_INITIALIZED)) {
1908 #ifdef SERIAL_DO_RESTART
1909 if (info->flags & ASYNC_HUP_NOTIFY)
1912 retval = -ERESTARTSYS;
1918 if (!(info->flags & ASYNC_CLOSING) &&
1919 (do_clocal || (serial_in(info, UART_MSR) &
1922 if (signal_pending(current)) {
1923 retval = -ERESTARTSYS;
1926 #ifdef SERIAL_DEBUG_OPEN
1927 printk("block_til_ready blocking: ttys%d, count = %d\n",
1928 info->line, state->count);
1932 current->state = TASK_RUNNING;
1933 remove_wait_queue(&info->open_wait, &wait);
1934 if (!tty_hung_up_p(filp))
1936 info->blocked_open--;
1937 #ifdef SERIAL_DEBUG_OPEN
1938 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1939 info->line, state->count);
1941 #endif /* DO_THIS_LATER */
1944 info->flags |= ASYNC_NORMAL_ACTIVE;
1948 static int get_async_struct(int line, ser_info_t **ret_info)
1950 struct serial_state *sstate;
1952 sstate = rs_table + line;
1955 *ret_info = (ser_info_t *)sstate->info;
1964 * This routine is called whenever a serial port is opened. It
1965 * enables interrupts for a serial port, linking in its async structure into
1966 * the IRQ chain. It also performs the serial-specific
1967 * initialization for the tty structure.
1969 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1975 if ((line < 0) || (line >= NR_PORTS))
1977 retval = get_async_struct(line, &info);
1980 if (serial_paranoia_check(info, tty->name, "rs_open"))
1983 #ifdef SERIAL_DEBUG_OPEN
1984 printk("rs_open %s, count = %d\n", tty->name, info->state->count);
1986 tty->driver_data = info;
1990 * Start up serial port
1992 retval = startup(info);
1997 retval = block_til_ready(tty, filp, info);
1999 #ifdef SERIAL_DEBUG_OPEN
2000 printk("rs_open returning after block_til_ready with %d\n",
2007 #ifdef SERIAL_DEBUG_OPEN
2008 printk("rs_open %s successful...", tty->name);
2014 * /proc fs routines....
2017 static inline int line_info(char *buf, struct serial_state *state)
2020 struct async_struct *info = state->info, scr_info;
2021 char stat_buf[30], control, status;
2025 ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
2027 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
2028 (unsigned int)(state->port), state->irq);
2030 if (!state->port || (state->type == PORT_UNKNOWN)) {
2031 ret += sprintf(buf+ret, "\n");
2037 * Figure out the current RS-232 lines
2040 info = &scr_info; /* This is just for serial_{in,out} */
2042 info->magic = SERIAL_MAGIC;
2043 info->port = state->port;
2044 info->flags = state->flags;
2048 local_irq_disable();
2049 status = serial_in(info, UART_MSR);
2050 control = info ? info->MCR : serial_in(info, UART_MCR);
2055 if (control & UART_MCR_RTS)
2056 strcat(stat_buf, "|RTS");
2057 if (status & UART_MSR_CTS)
2058 strcat(stat_buf, "|CTS");
2059 if (control & UART_MCR_DTR)
2060 strcat(stat_buf, "|DTR");
2061 if (status & UART_MSR_DSR)
2062 strcat(stat_buf, "|DSR");
2063 if (status & UART_MSR_DCD)
2064 strcat(stat_buf, "|CD");
2065 if (status & UART_MSR_RI)
2066 strcat(stat_buf, "|RI");
2069 ret += sprintf(buf+ret, " baud:%d",
2070 state->baud_base / info->quot);
2073 ret += sprintf(buf+ret, " tx:%d rx:%d",
2074 state->icount.tx, state->icount.rx);
2076 if (state->icount.frame)
2077 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2079 if (state->icount.parity)
2080 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2082 if (state->icount.brk)
2083 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
2085 if (state->icount.overrun)
2086 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2089 * Last thing is the RS-232 status lines
2091 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2096 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2097 int *eof, void *data)
2102 len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2103 for (i = 0; i < NR_PORTS && len < 4000; i++) {
2104 len += line_info(page + len, &rs_table[i]);
2105 if (len+begin > off+count)
2107 if (len+begin < off) {
2114 if (off >= len+begin)
2116 *start = page + (begin-off);
2117 return ((count < begin+len-off) ? count : begin+len-off);
2121 * ---------------------------------------------------------------------
2122 * rs_init() and friends
2124 * rs_init() is called at boot-time to initialize the serial driver.
2125 * ---------------------------------------------------------------------
2129 * This routine prints out the appropriate serial driver version
2130 * number, and identifies which options were configured into this
2133 static _INLINE_ void show_serial_version(void)
2135 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2140 * The serial console driver used during boot. Note that these names
2141 * clash with those found in "serial.c", so we currently can't support
2142 * the 16xxx uarts and these at the same time. I will fix this to become
2143 * an indirect function call from tty_io.c (or something).
2146 #ifdef CONFIG_SERIAL_CONSOLE
2149 * Print a string to the serial port trying not to disturb any possible
2150 * real use of the port...
2152 static void my_console_write(int idx, const char *s,
2155 struct serial_state *ser;
2158 QUICC_BD *bdp, *bdbase;
2159 volatile struct smc_uart_pram *up;
2160 volatile u_char *cp;
2162 ser = rs_table + idx;
2165 /* If the port has been initialized for general use, we have
2166 * to use the buffer descriptors allocated there. Otherwise,
2167 * we simply use the single buffer allocated.
2169 if ((info = (ser_info_t *)ser->info) != NULL) {
2171 bdbase = info->tx_bd_base;
2174 /* Pointer to UART in parameter ram.
2176 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2177 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2179 /* Get the address of the host memory buffer.
2181 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2185 * We need to gracefully shut down the transmitter, disable
2186 * interrupts, then send our bytes out.
2190 * Now, do each character. This is not as bad as it looks
2191 * since this is a holding FIFO and not a transmitting FIFO.
2192 * We could add the complexity of filling the entire transmit
2193 * buffer, but we would just wait longer between accesses......
2195 for (i = 0; i < count; i++, s++) {
2196 /* Wait for transmitter fifo to empty.
2197 * Ready indicates output is ready, and xmt is doing
2198 * that, not that it is ready for us to send.
2200 while (bdp->status & BD_SC_READY);
2202 /* Send the character out.
2208 bdp->status |= BD_SC_READY;
2210 if (bdp->status & BD_SC_WRAP)
2215 /* if a LF, also do CR... */
2217 while (bdp->status & BD_SC_READY);
2218 /* cp = __va(bdp->buf); */
2222 bdp->status |= BD_SC_READY;
2224 if (bdp->status & BD_SC_WRAP) {
2234 * Finally, Wait for transmitter & holding register to empty
2235 * and restore the IER
2237 while (bdp->status & BD_SC_READY);
2240 info->tx_cur = (QUICC_BD *)bdp;
2243 static void serial_console_write(struct console *c, const char *s,
2247 /* Try to let stub handle output. Returns true if it did. */
2248 if (kgdb_output_string(s, count))
2251 my_console_write(c->index, s, count);
2256 /*void console_print_68360(const char *p)
2261 for (i=0;cp[i]!=0;i++);
2263 serial_console_write (p, i);
2265 //Comment this if you want to have a strict interrupt-driven output
2278 xmon_360_write(const char *s, unsigned count)
2280 my_console_write(0, s, count);
2287 putDebugChar(char ch)
2289 my_console_write(0, &ch, 1);
2294 * Receive character from the serial port. This only works well
2295 * before the port is initialized for real use.
2297 static int my_console_wait_key(int idx, int xmon, char *obuf)
2299 struct serial_state *ser;
2303 volatile struct smc_uart_pram *up;
2306 ser = rs_table + idx;
2308 /* Get the address of the host memory buffer.
2309 * If the port has been initialized for general use, we must
2310 * use information from the port structure.
2312 if ((info = (ser_info_t *)ser->info))
2315 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2316 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2318 /* Pointer to UART in parameter ram.
2320 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2321 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2324 * We need to gracefully shut down the receiver, disable
2325 * interrupts, then read the input.
2326 * XMON just wants a poll. If no character, return -1, else
2327 * return the character.
2330 while (bdp->status & BD_SC_EMPTY);
2333 if (bdp->status & BD_SC_EMPTY)
2337 cp = (char *)bdp->buf;
2340 i = c = bdp->length;
2347 bdp->status |= BD_SC_EMPTY;
2350 if (bdp->status & BD_SC_WRAP) {
2351 bdp = info->rx_bd_base;
2356 info->rx_cur = (QUICC_BD *)bdp;
2362 static int serial_console_wait_key(struct console *co)
2364 return(my_console_wait_key(co->index, 0, NULL));
2369 xmon_360_read_poll(void)
2371 return(my_console_wait_key(0, 1, NULL));
2375 xmon_360_read_char(void)
2377 return(my_console_wait_key(0, 0, NULL));
2382 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2383 static int kgdb_chars;
2388 if (kgdb_chars <= 0) {
2389 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2397 void kgdb_interruptible(int state)
2400 void kgdb_map_scc(void)
2402 struct serial_state *ser;
2404 volatile QUICC_BD *bdp;
2405 volatile smc_uart_t *up;
2407 cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2409 /* To avoid data cache CPM DMA coherency problems, allocate a
2410 * buffer in the CPM DPRAM. This will work until the CPM and
2411 * serial ports are initialized. At that time a memory buffer
2412 * will be allocated.
2413 * The port is already initialized from the boot procedure, all
2414 * we do here is give it a different buffer and make it a FIFO.
2419 /* Right now, assume we are using SMCs.
2421 up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2423 /* Allocate space for an input FIFO, plus a few bytes for output.
2424 * Allocate bytes to maintain word alignment.
2426 mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2428 /* Set the physical address of the host memory buffers in
2429 * the buffer descriptors.
2431 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2432 bdp->buf = mem_addr;
2434 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2435 bdp->buf = mem_addr+RX_BUF_SIZE;
2437 up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
2438 up->smc_maxidl = RX_BUF_SIZE;
2442 static struct tty_struct *serial_console_device(struct console *c, int *index)
2445 return serial_driver;
2449 struct console sercons = {
2451 .write = serial_console_write,
2452 .device = serial_console_device,
2453 .wait_key = serial_console_wait_key,
2454 .setup = serial_console_setup,
2455 .flags = CON_PRINTBUFFER,
2456 .index = CONFIG_SERIAL_CONSOLE_PORT,
2464 long console_360_init(long kmem_start, long kmem_end)
2466 register_console(&sercons);
2467 /*register_console (console_print_68360); - 2.0.38 only required a write
2468 function pointer. */
2474 /* Index in baud rate table of the default console baud rate.
2476 static int baud_idx;
2478 static struct tty_operations rs_360_ops = {
2479 .open = rs_360_open,
2480 .close = rs_360_close,
2481 .write = rs_360_write,
2482 .put_char = rs_360_put_char,
2483 .write_room = rs_360_write_room,
2484 .chars_in_buffer = rs_360_chars_in_buffer,
2485 .flush_buffer = rs_360_flush_buffer,
2486 .ioctl = rs_360_ioctl,
2487 .throttle = rs_360_throttle,
2488 .unthrottle = rs_360_unthrottle,
2489 /* .send_xchar = rs_360_send_xchar, */
2490 .set_termios = rs_360_set_termios,
2491 .stop = rs_360_stop,
2492 .start = rs_360_start,
2493 .hangup = rs_360_hangup,
2494 /* .wait_until_sent = rs_360_wait_until_sent, */
2495 /* .read_proc = rs_360_read_proc, */
2496 .tiocmget = rs_360_tiocmget,
2497 .tiocmset = rs_360_tiocmset,
2500 /* int __init rs_360_init(void) */
2501 int rs_360_init(void)
2503 struct serial_state * state;
2506 uint dp_addr, iobits;
2511 volatile struct smc_regs *sp;
2512 volatile struct smc_uart_pram *up;
2513 volatile struct scc_regs *scp;
2514 volatile struct uart_pram *sup;
2515 /* volatile immap_t *immap; */
2517 serial_driver = alloc_tty_driver(NR_PORTS);
2521 show_serial_version();
2523 serial_driver->name = "ttyS";
2524 serial_driver->major = TTY_MAJOR;
2525 serial_driver->minor_start = 64;
2526 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2527 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2528 serial_driver->init_termios = tty_std_termios;
2529 serial_driver->init_termios.c_cflag =
2530 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2531 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2532 tty_set_operations(serial_driver, &rs_360_ops);
2534 if (tty_register_driver(serial_driver))
2535 panic("Couldn't register serial driver\n");
2537 cp = pquicc; /* Get pointer to Communication Processor */
2538 /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
2541 /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2543 /* The "standard" configuration through the 860.
2545 /* immap->im_ioport.iop_papar |= 0x00fc; */
2546 /* immap->im_ioport.iop_padir &= ~0x00fc; */
2547 /* immap->im_ioport.iop_paodr &= ~0x00fc; */
2548 cp->pio_papar |= 0x00fc;
2549 cp->pio_padir &= ~0x00fc;
2550 /* cp->pio_paodr &= ~0x00fc; */
2553 /* Since we don't yet do modem control, connect the port C pins
2554 * as general purpose I/O. This will assert CTS and CD for the
2557 /* FIXME: see 360um p.7-365 and 860um p.34-12
2558 * I can't make sense of these bits - mleslie*/
2559 /* immap->im_ioport.iop_pcdir |= 0x03c6; */
2560 /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
2562 /* cp->pio_pcdir |= 0x03c6; */
2563 /* cp->pio_pcpar &= ~0x03c6; */
2567 /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
2570 cp->si_sicr &= ~0x00ffff00;
2571 cp->si_sicr |= 0x001b1200;
2574 /* Frequentis PP04 forced to RS-232 until we know better.
2575 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2577 immap->im_ioport.iop_pcdir |= 0x000c;
2578 immap->im_ioport.iop_pcpar &= ~0x000c;
2579 immap->im_ioport.iop_pcdat &= ~0x000c;
2581 /* This enables the TX driver.
2583 cp->cp_pbpar &= ~0x6000;
2584 cp->cp_pbdat &= ~0x6000;
2587 for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2588 state->magic = SSTATE_MAGIC;
2590 state->type = PORT_UNKNOWN;
2591 state->custom_divisor = 0;
2592 state->close_delay = 5*HZ/10;
2593 state->closing_wait = 30*HZ;
2594 state->icount.cts = state->icount.dsr =
2595 state->icount.rng = state->icount.dcd = 0;
2596 state->icount.rx = state->icount.tx = 0;
2597 state->icount.frame = state->icount.parity = 0;
2598 state->icount.overrun = state->icount.brk = 0;
2599 printk(KERN_INFO "ttyS%02d at irq 0x%02x is an %s\n",
2600 i, (unsigned int)(state->irq),
2601 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2603 #ifdef CONFIG_SERIAL_CONSOLE
2604 /* If we just printed the message on the console port, and
2605 * we are about to initialize it for general use, we have
2606 * to wait a couple of character times for the CR/NL to
2607 * make it out of the transmit buffer.
2609 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2613 /* idx = PORT_NUM(info->state->smc_scc_num); */
2614 /* if (info->state->smc_scc_num & NUM_IS_SCC) */
2615 /* chan = scc_chan_map[idx]; */
2617 /* chan = smc_chan_map[idx]; */
2619 /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2620 /* while (cp->cp_cr & CPM_CR_FLG); */
2623 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2624 info = &quicc_ser_info[i];
2626 memset (info, 0, sizeof(ser_info_t));
2627 info->magic = SERIAL_MAGIC;
2629 info->flags = state->flags;
2630 INIT_WORK(&info->tqueue, do_softint, info);
2631 INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2632 init_waitqueue_head(&info->open_wait);
2633 init_waitqueue_head(&info->close_wait);
2634 info->state = state;
2635 state->info = (struct async_struct *)info;
2637 /* We need to allocate a transmit and receive buffer
2638 * descriptors from dual port ram, and a character
2639 * buffer area from host mem.
2641 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2643 /* Allocate space for FIFOs in the host memory.
2644 * (for now this is from a static array of buffers :(
2646 /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2647 /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2648 mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2650 /* Set the physical address of the host memory
2651 * buffers in the buffer descriptors, and the
2652 * virtual address for us to work with.
2654 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2655 info->rx_cur = info->rx_bd_base = bdp;
2657 /* initialize rx buffer descriptors */
2658 for (j=0; j<(RX_NUM_FIFO-1); j++) {
2659 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2660 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2661 mem_addr += RX_BUF_SIZE;
2664 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2665 bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2668 idx = PORT_NUM(info->state->smc_scc_num);
2669 if (info->state->smc_scc_num & NUM_IS_SCC) {
2671 #if defined (CONFIG_UCQUICC) && 1
2672 /* set the transceiver mode to RS232 */
2673 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2674 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2675 *(uint *)_periph_base = sipex_mode_bits;
2676 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2680 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2682 /* Allocate space for FIFOs in the host memory.
2684 /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2685 /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2686 mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2688 /* Set the physical address of the host memory
2689 * buffers in the buffer descriptors, and the
2690 * virtual address for us to work with.
2692 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2693 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2694 info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2696 /* initialize tx buffer descriptors */
2697 for (j=0; j<(TX_NUM_FIFO-1); j++) {
2698 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2699 bdp->status = BD_SC_INTRPT;
2700 mem_addr += TX_BUF_SIZE;
2703 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2704 bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2706 if (info->state->smc_scc_num & NUM_IS_SCC) {
2707 scp = &pquicc->scc_regs[idx];
2708 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2709 sup->rbase = dp_addr;
2710 sup->tbase = dp_addr;
2712 /* Set up the uart parameters in the
2718 /* Set this to 1 for now, so we get single
2719 * character interrupts. Using idle charater
2720 * time requires some additional tuning.
2735 sup->cc[i] = 0x8000;
2739 /* Send the CPM an initialize command.
2741 chan = scc_chan_map[idx];
2743 /* execute the INIT RX & TX PARAMS command for this channel. */
2744 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2745 while (cp->cp_cr & CPM_CR_FLG);
2747 /* Set UART mode, 8 bit, no parity, one stop.
2748 * Enable receive and transmit.
2750 scp->scc_gsmr.w.high = 0;
2751 scp->scc_gsmr.w.low =
2752 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2754 /* Disable all interrupts and clear all pending
2758 scp->scc_scce = 0xffff;
2759 scp->scc_dsr = 0x7e7e;
2760 scp->scc_psmr = 0x3000;
2762 /* If the port is the console, enable Rx and Tx.
2764 #ifdef CONFIG_SERIAL_CONSOLE
2765 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2766 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2770 /* Configure SMCs Tx/Rx instead of port B
2773 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2774 up->rbase = dp_addr;
2776 iobits = 0xc0 << (idx * 4);
2777 cp->pip_pbpar |= iobits;
2778 cp->pip_pbdir &= ~iobits;
2779 cp->pip_pbodr &= ~iobits;
2782 /* Connect the baud rate generator to the
2783 * SMC based upon index in rs_table. Also
2784 * make sure it is connected to NMSI.
2786 cp->si_simode &= ~(0xffff << (idx * 16));
2787 cp->si_simode |= (i << ((idx * 16) + 12));
2789 up->tbase = dp_addr;
2791 /* Set up the uart parameters in the
2797 /* Set this to 1 for now, so we get single
2798 * character interrupts. Using idle charater
2799 * time requires some additional tuning.
2805 /* Send the CPM an initialize command.
2807 chan = smc_chan_map[idx];
2809 cp->cp_cr = mk_cr_cmd(chan,
2810 CPM_CR_INIT_TRX) | CPM_CR_FLG;
2811 #ifdef CONFIG_SERIAL_CONSOLE
2812 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2815 while (cp->cp_cr & CPM_CR_FLG);
2817 /* Set UART mode, 8 bit, no parity, one stop.
2818 * Enable receive and transmit.
2820 sp = &cp->smc_regs[idx];
2821 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2823 /* Disable all interrupts and clear all pending
2827 sp->smc_smce = 0xff;
2829 /* If the port is the console, enable Rx and Tx.
2831 #ifdef CONFIG_SERIAL_CONSOLE
2832 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2833 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2837 /* Install interrupt handler.
2839 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2840 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2841 request_irq(state->irq, rs_360_interrupt,
2842 IRQ_FLG_LOCK, "ttyS", (void *)info);
2844 /* Set up the baud rate generator.
2846 m360_cpm_setbrg(i, baud_table[baud_idx]);
2858 /* This must always be called before the rs_360_init() function, otherwise
2859 * it blows away the port control information.
2861 //static int __init serial_console_setup( struct console *co, char *options)
2862 int serial_console_setup( struct console *co, char *options)
2864 struct serial_state *ser;
2865 uint mem_addr, dp_addr, bidx, idx, iobits;
2869 volatile struct smc_regs *sp;
2870 volatile struct scc_regs *scp;
2871 volatile struct smc_uart_pram *up;
2872 volatile struct uart_pram *sup;
2875 * add something to the 68k bootloader to store a desired initial console baud rate */
2877 /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
2878 /* bd = (bd_t *)__res; */
2880 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2881 /* if (bd->bi_baudrate == baud_table[bidx]) */
2882 if (CONSOLE_BAUDRATE == baud_table[bidx])
2885 /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2888 ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2890 cp = pquicc; /* Get pointer to Communication Processor */
2892 idx = PORT_NUM(ser->smc_scc_num);
2893 if (ser->smc_scc_num & NUM_IS_SCC) {
2895 /* TODO: need to set up SCC pin assignment etc. here */
2899 iobits = 0xc0 << (idx * 4);
2900 cp->pip_pbpar |= iobits;
2901 cp->pip_pbdir &= ~iobits;
2902 cp->pip_pbodr &= ~iobits;
2904 /* Connect the baud rate generator to the
2905 * SMC based upon index in rs_table. Also
2906 * make sure it is connected to NMSI.
2908 cp->si_simode &= ~(0xffff << (idx * 16));
2909 cp->si_simode |= (idx << ((idx * 16) + 12));
2912 /* When we get here, the CPM has been reset, so we need
2913 * to configure the port.
2914 * We need to allocate a transmit and receive buffer descriptor
2915 * from dual port ram, and a character buffer area from host mem.
2918 /* Allocate space for two buffer descriptors in the DP ram.
2920 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2922 /* Allocate space for two 2 byte FIFOs in the host memory.
2924 /* mem_addr = m360_cpm_hostalloc(8); */
2925 mem_addr = (uint)console_fifos;
2928 /* Set the physical address of the host memory buffers in
2929 * the buffer descriptors.
2931 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2932 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2933 bdp->buf = (char *)mem_addr;
2934 (bdp+1)->buf = (char *)(mem_addr+4);
2936 /* For the receive, set empty and wrap.
2937 * For transmit, set wrap.
2939 bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2940 (bdp+1)->status = BD_SC_WRAP;
2942 /* Set up the uart parameters in the parameter ram.
2944 if (ser->smc_scc_num & NUM_IS_SCC) {
2945 scp = &cp->scc_regs[idx];
2946 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2947 sup = &pquicc->pram[ser->port].scc.pscc.u;
2949 sup->rbase = dp_addr;
2950 sup->tbase = dp_addr + sizeof(QUICC_BD);
2952 /* Set up the uart parameters in the
2958 /* Set this to 1 for now, so we get single
2959 * character interrupts. Using idle charater
2960 * time requires some additional tuning.
2975 sup->cc[i] = 0x8000;
2979 /* Send the CPM an initialize command.
2981 chan = scc_chan_map[idx];
2983 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2984 while (cp->cp_cr & CPM_CR_FLG);
2986 /* Set UART mode, 8 bit, no parity, one stop.
2987 * Enable receive and transmit.
2989 scp->scc_gsmr.w.high = 0;
2990 scp->scc_gsmr.w.low =
2991 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2993 /* Disable all interrupts and clear all pending
2997 scp->scc_scce = 0xffff;
2998 scp->scc_dsr = 0x7e7e;
2999 scp->scc_psmr = 0x3000;
3001 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
3005 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
3006 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
3008 up->rbase = dp_addr; /* Base of receive buffer desc. */
3009 up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
3013 /* Set this to 1 for now, so we get single character interrupts.
3015 up->mrblr = 1; /* receive buffer length */
3016 up->max_idl = 0; /* wait forever for next char */
3018 /* Send the CPM an initialize command.
3020 chan = smc_chan_map[idx];
3021 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
3022 while (cp->cp_cr & CPM_CR_FLG);
3024 /* Set UART mode, 8 bit, no parity, one stop.
3025 * Enable receive and transmit.
3027 sp = &cp->smc_regs[idx];
3028 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
3030 /* And finally, enable Rx and Tx.
3032 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
3035 /* Set up the baud rate generator.
3037 /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
3038 m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);