2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/tty.h>
26 #include <linux/ioport.h>
27 #include <linux/init.h>
28 #include <linux/console.h>
29 #include <linux/sysrq.h>
30 #include <linux/serial_reg.h>
31 #include <linux/serial.h>
32 #include <linux/serialP.h>
33 #include <linux/delay.h>
34 #include <linux/device.h>
39 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
43 #include <linux/serial_core.h>
48 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
49 * is unsafe when used on edge-triggered interrupts.
51 unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
57 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
59 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
63 #define DEBUG_INTR(fmt...) printk(fmt)
65 #define DEBUG_INTR(fmt...) do { } while (0)
68 #define PASS_LIMIT 256
71 * We default to IRQ0 for the "no irq" hack. Some
72 * machine types want others as well - they're free
73 * to redefine this in their header file.
75 #define is_real_interrupt(irq) ((irq) != 0)
78 * This converts from our new CONFIG_ symbols to the symbols
79 * that asm/serial.h expects. You _NEED_ to comment out the
80 * linux/config.h include contained inside asm/serial.h for
83 #undef CONFIG_SERIAL_MANY_PORTS
84 #undef CONFIG_SERIAL_DETECT_IRQ
85 #undef CONFIG_SERIAL_MULTIPORT
88 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
89 #define CONFIG_SERIAL_DETECT_IRQ 1
91 #ifdef CONFIG_SERIAL_8250_MULTIPORT
92 #define CONFIG_SERIAL_MULTIPORT 1
94 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
95 #define CONFIG_SERIAL_MANY_PORTS 1
99 * HUB6 is always on. This will be removed once the header
100 * files have been cleaned.
102 #define CONFIG_HUB6 1
104 #include <asm/serial.h>
107 * SERIAL_PORT_DFNS tells us about built-in ports that have no
108 * standard enumeration mechanism. Platforms that can find all
109 * serial ports via mechanisms like ACPI or PCI need not supply it.
111 #ifndef SERIAL_PORT_DFNS
112 #define SERIAL_PORT_DFNS
115 static struct old_serial_port old_serial_port[] = {
116 SERIAL_PORT_DFNS /* defined in asm/serial.h */
119 #define UART_NR (ARRAY_SIZE(old_serial_port) + CONFIG_SERIAL_8250_NR_UARTS)
121 #ifdef CONFIG_SERIAL_8250_RSA
123 #define PORT_RSA_MAX 4
124 static unsigned long probe_rsa[PORT_RSA_MAX];
125 static unsigned int probe_rsa_count;
126 #endif /* CONFIG_SERIAL_8250_RSA */
128 struct uart_8250_port {
129 struct uart_port port;
130 struct timer_list timer; /* "no irq" timer */
131 struct list_head list; /* ports on this IRQ */
132 unsigned int capabilities; /* port capabilities */
138 unsigned char mcr_mask; /* mask of user bits */
139 unsigned char mcr_force; /* mask of forced bits */
140 unsigned char lsr_break_flag;
143 * We provide a per-port pm hook.
145 void (*pm)(struct uart_port *port,
146 unsigned int state, unsigned int old);
151 struct list_head *head;
154 static struct irq_info irq_lists[NR_IRQS];
157 * Here we define the default xmit fifo size used for each type of UART.
159 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
164 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
166 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
167 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
168 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
169 { "Startech", 1, 0 },
170 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
171 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
172 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
173 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO },
174 { "NS16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO | UART_NATSEMI },
175 { "XScale", 32, UART_CLEAR_FIFO | UART_USE_FIFO },
178 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
180 offset <<= up->port.regshift;
182 switch (up->port.iotype) {
184 outb(up->port.hub6 - 1 + offset, up->port.iobase);
185 return inb(up->port.iobase + 1);
188 return readb(up->port.membase + offset);
191 return inb(up->port.iobase + offset);
196 serial_out(struct uart_8250_port *up, int offset, int value)
198 offset <<= up->port.regshift;
200 switch (up->port.iotype) {
202 outb(up->port.hub6 - 1 + offset, up->port.iobase);
203 outb(value, up->port.iobase + 1);
207 writeb(value, up->port.membase + offset);
211 outb(value, up->port.iobase + offset);
216 * We used to support using pause I/O for certain machines. We
217 * haven't supported this for a while, but just in case it's badly
218 * needed for certain old 386 machines, I've left these #define's
221 #define serial_inp(up, offset) serial_in(up, offset)
222 #define serial_outp(up, offset, value) serial_out(up, offset, value)
228 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
230 serial_out(up, UART_SCR, offset);
231 serial_out(up, UART_ICR, value);
234 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
238 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
239 serial_out(up, UART_SCR, offset);
240 value = serial_in(up, UART_ICR);
241 serial_icr_write(up, UART_ACR, up->acr);
246 #ifdef CONFIG_SERIAL_8250_RSA
248 * Attempts to turn on the RSA FIFO. Returns zero on failure.
249 * We set the port uart clock rate if we succeed.
251 static int __enable_rsa(struct uart_8250_port *up)
256 mode = serial_inp(up, UART_RSA_MSR);
257 result = mode & UART_RSA_MSR_FIFO;
260 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
261 mode = serial_inp(up, UART_RSA_MSR);
262 result = mode & UART_RSA_MSR_FIFO;
266 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
271 static void enable_rsa(struct uart_8250_port *up)
273 if (up->port.type == PORT_RSA) {
274 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
275 spin_lock_irq(&up->port.lock);
277 spin_unlock_irq(&up->port.lock);
279 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
280 serial_outp(up, UART_RSA_FRR, 0);
285 * Attempts to turn off the RSA FIFO. Returns zero on failure.
286 * It is unknown why interrupts were disabled in here. However,
287 * the caller is expected to preserve this behaviour by grabbing
288 * the spinlock before calling this function.
290 static void disable_rsa(struct uart_8250_port *up)
295 if (up->port.type == PORT_RSA &&
296 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
297 spin_lock_irq(&up->port.lock);
299 mode = serial_inp(up, UART_RSA_MSR);
300 result = !(mode & UART_RSA_MSR_FIFO);
303 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
304 mode = serial_inp(up, UART_RSA_MSR);
305 result = !(mode & UART_RSA_MSR_FIFO);
309 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
310 spin_unlock_irq(&up->port.lock);
313 #endif /* CONFIG_SERIAL_8250_RSA */
316 * This is a quickie test to see how big the FIFO is.
317 * It doesn't work at all the time, more's the pity.
319 static int size_fifo(struct uart_8250_port *up)
321 unsigned char old_fcr, old_mcr, old_dll, old_dlm;
324 old_fcr = serial_inp(up, UART_FCR);
325 old_mcr = serial_inp(up, UART_MCR);
326 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
327 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
328 serial_outp(up, UART_MCR, UART_MCR_LOOP);
329 serial_outp(up, UART_LCR, UART_LCR_DLAB);
330 old_dll = serial_inp(up, UART_DLL);
331 old_dlm = serial_inp(up, UART_DLM);
332 serial_outp(up, UART_DLL, 0x01);
333 serial_outp(up, UART_DLM, 0x00);
334 serial_outp(up, UART_LCR, 0x03);
335 for (count = 0; count < 256; count++)
336 serial_outp(up, UART_TX, count);
337 mdelay(20);/* FIXME - schedule_timeout */
338 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
339 (count < 256); count++)
340 serial_inp(up, UART_RX);
341 serial_outp(up, UART_FCR, old_fcr);
342 serial_outp(up, UART_MCR, old_mcr);
343 serial_outp(up, UART_LCR, UART_LCR_DLAB);
344 serial_outp(up, UART_DLL, old_dll);
345 serial_outp(up, UART_DLM, old_dlm);
351 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
352 * When this function is called we know it is at least a StarTech
353 * 16650 V2, but it might be one of several StarTech UARTs, or one of
354 * its clones. (We treat the broken original StarTech 16650 V1 as a
355 * 16550, and why not? Startech doesn't seem to even acknowledge its
358 * What evil have men's minds wrought...
360 static void autoconfig_has_efr(struct uart_8250_port *up)
362 unsigned char id1, id2, id3, rev, saved_dll, saved_dlm;
365 * First we check to see if it's an Oxford Semiconductor UART.
367 * If we have to do this here because some non-National
368 * Semiconductor clone chips lock up if you try writing to the
369 * LSR register (which serial_icr_read does)
373 * Check for Oxford Semiconductor 16C950.
375 * EFR [4] must be set else this test fails.
377 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
378 * claims that it's needed for 952 dual UART's (which are not
379 * recommended for new designs).
382 serial_out(up, UART_LCR, 0xBF);
383 serial_out(up, UART_EFR, UART_EFR_ECB);
384 serial_out(up, UART_LCR, 0x00);
385 id1 = serial_icr_read(up, UART_ID1);
386 id2 = serial_icr_read(up, UART_ID2);
387 id3 = serial_icr_read(up, UART_ID3);
388 rev = serial_icr_read(up, UART_REV);
390 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
392 if (id1 == 0x16 && id2 == 0xC9 &&
393 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
394 up->port.type = PORT_16C950;
395 up->rev = rev | (id3 << 8);
400 * We check for a XR16C850 by setting DLL and DLM to 0, and then
401 * reading back DLL and DLM. The chip type depends on the DLM
403 * 0x10 - XR16C850 and the DLL contains the chip revision.
407 serial_outp(up, UART_LCR, UART_LCR_DLAB);
408 saved_dll = serial_inp(up, UART_DLL);
409 saved_dlm = serial_inp(up, UART_DLM);
410 serial_outp(up, UART_DLL, 0);
411 serial_outp(up, UART_DLM, 0);
412 id2 = serial_inp(up, UART_DLL);
413 id1 = serial_inp(up, UART_DLM);
414 serial_outp(up, UART_DLL, saved_dll);
415 serial_outp(up, UART_DLM, saved_dlm);
417 DEBUG_AUTOCONF("850id=%02x:%02x ", id1, id2);
419 if (id1 == 0x10 || id1 == 0x12 || id1 == 0x14) {
422 up->port.type = PORT_16850;
427 * It wasn't an XR16C850.
429 * We distinguish between the '654 and the '650 by counting
430 * how many bytes are in the FIFO. I'm using this for now,
431 * since that's the technique that was sent to me in the
432 * serial driver update, but I'm not convinced this works.
433 * I've had problems doing this in the past. -TYT
435 if (size_fifo(up) == 64)
436 up->port.type = PORT_16654;
438 up->port.type = PORT_16650V2;
442 * We detected a chip without a FIFO. Only two fall into
443 * this category - the original 8250 and the 16450. The
444 * 16450 has a scratch register (accessible with LCR=0)
446 static void autoconfig_8250(struct uart_8250_port *up)
448 unsigned char scratch, status1, status2;
450 up->port.type = PORT_8250;
452 scratch = serial_in(up, UART_SCR);
453 serial_outp(up, UART_SCR, 0xa5);
454 status1 = serial_in(up, UART_SCR);
455 serial_outp(up, UART_SCR, 0x5a);
456 status2 = serial_in(up, UART_SCR);
457 serial_outp(up, UART_SCR, scratch);
459 if (status1 == 0xa5 && status2 == 0x5a)
460 up->port.type = PORT_16450;
464 * We know that the chip has FIFOs. Does it have an EFR? The
465 * EFR is located in the same register position as the IIR and
466 * we know the top two bits of the IIR are currently set. The
467 * EFR should contain zero. Try to read the EFR.
469 static void autoconfig_16550a(struct uart_8250_port *up)
471 unsigned char status1, status2;
473 up->port.type = PORT_16550A;
476 * Check for presence of the EFR when DLAB is set.
477 * Only ST16C650V1 UARTs pass this test.
479 serial_outp(up, UART_LCR, UART_LCR_DLAB);
480 if (serial_in(up, UART_EFR) == 0) {
481 serial_outp(up, UART_EFR, 0xA8);
482 if (serial_in(up, UART_EFR) != 0) {
483 DEBUG_AUTOCONF("EFRv1 ");
484 up->port.type = PORT_16650;
486 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
488 serial_outp(up, UART_EFR, 0);
493 * Maybe it requires 0xbf to be written to the LCR.
494 * (other ST16C650V2 UARTs, TI16C752A, etc)
496 serial_outp(up, UART_LCR, 0xBF);
497 if (serial_in(up, UART_EFR) == 0) {
498 DEBUG_AUTOCONF("EFRv2 ");
499 autoconfig_has_efr(up);
504 * Check for a National Semiconductor SuperIO chip.
505 * Attempt to switch to bank 2, read the value of the LOOP bit
506 * from EXCR1. Switch back to bank 0, change it in MCR. Then
507 * switch back to bank 2, read it from EXCR1 again and check
508 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
509 * On PowerPC we don't want to change baud_base, as we have
510 * a number of different divisors. -- Tom Rini
512 serial_outp(up, UART_LCR, 0);
513 status1 = serial_in(up, UART_MCR);
514 serial_outp(up, UART_LCR, 0xE0);
515 status2 = serial_in(up, 0x02); /* EXCR1 */
517 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
518 serial_outp(up, UART_LCR, 0);
519 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
520 serial_outp(up, UART_LCR, 0xE0);
521 status2 = serial_in(up, 0x02); /* EXCR1 */
522 serial_outp(up, UART_LCR, 0);
523 serial_outp(up, UART_MCR, status1);
525 if ((status2 ^ status1) & UART_MCR_LOOP) {
527 serial_outp(up, UART_LCR, 0xE0);
528 status1 = serial_in(up, 0x04); /* EXCR1 */
529 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
530 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
531 serial_outp(up, 0x04, status1);
532 serial_outp(up, UART_LCR, 0);
533 up->port.uartclk = 921600*16;
536 up->port.type = PORT_NS16550A;
542 * No EFR. Try to detect a TI16750, which only sets bit 5 of
543 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
544 * Try setting it with and without DLAB set. Cheap clones
545 * set bit 5 without DLAB set.
547 serial_outp(up, UART_LCR, 0);
548 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
549 status1 = serial_in(up, UART_IIR) >> 5;
550 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
551 serial_outp(up, UART_LCR, UART_LCR_DLAB);
552 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
553 status2 = serial_in(up, UART_IIR) >> 5;
554 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
556 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
558 if (status1 == 6 && status2 == 7) {
559 up->port.type = PORT_16750;
565 * This routine is called by rs_init() to initialize a specific serial
566 * port. It determines what type of UART chip this serial port is
567 * using: 8250, 16450, 16550, 16550A. The important question is
568 * whether or not this UART is a 16550A or not, since this will
569 * determine whether or not we can use its FIFO features or not.
571 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
573 unsigned char status1, scratch, scratch2, scratch3;
574 unsigned char save_lcr, save_mcr;
577 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
580 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
581 up->port.line, up->port.iobase, up->port.membase);
584 * We really do need global IRQs disabled here - we're going to
585 * be frobbing the chips IRQ enable register to see if it exists.
587 spin_lock_irqsave(&up->port.lock, flags);
588 // save_flags(flags); cli();
590 if (!(up->port.flags & UPF_BUGGY_UART)) {
592 * Do a simple existence test first; if we fail this,
593 * there's no point trying anything else.
595 * 0x80 is used as a nonsense port to prevent against
596 * false positives due to ISA bus float. The
597 * assumption is that 0x80 is a non-existent port;
598 * which should be safe since include/asm/io.h also
599 * makes this assumption.
601 * Note: this is safe as long as MCR bit 4 is clear
602 * and the device is in "PC" mode.
604 scratch = serial_inp(up, UART_IER);
605 serial_outp(up, UART_IER, 0);
609 scratch2 = serial_inp(up, UART_IER);
610 serial_outp(up, UART_IER, 0x0F);
614 scratch3 = serial_inp(up, UART_IER);
615 serial_outp(up, UART_IER, scratch);
616 if (scratch2 != 0 || scratch3 != 0x0F) {
618 * We failed; there's nothing here
620 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
626 save_mcr = serial_in(up, UART_MCR);
627 save_lcr = serial_in(up, UART_LCR);
630 * Check to see if a UART is really there. Certain broken
631 * internal modems based on the Rockwell chipset fail this
632 * test, because they apparently don't implement the loopback
633 * test mode. So this test is skipped on the COM 1 through
634 * COM 4 ports. This *should* be safe, since no board
635 * manufacturer would be stupid enough to design a board
636 * that conflicts with COM 1-4 --- we hope!
638 if (!(up->port.flags & UPF_SKIP_TEST)) {
639 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
640 status1 = serial_inp(up, UART_MSR) & 0xF0;
641 serial_outp(up, UART_MCR, save_mcr);
642 if (status1 != 0x90) {
643 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
650 * We're pretty sure there's a port here. Lets find out what
651 * type of port it is. The IIR top two bits allows us to find
652 * out if its 8250 or 16450, 16550, 16550A or later. This
653 * determines what we test for next.
655 * We also initialise the EFR (if any) to zero for later. The
656 * EFR occupies the same register location as the FCR and IIR.
658 serial_outp(up, UART_LCR, 0xBF);
659 serial_outp(up, UART_EFR, 0);
660 serial_outp(up, UART_LCR, 0);
662 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
663 scratch = serial_in(up, UART_IIR) >> 6;
665 DEBUG_AUTOCONF("iir=%d ", scratch);
672 up->port.type = PORT_UNKNOWN;
675 up->port.type = PORT_16550;
678 autoconfig_16550a(up);
682 #ifdef CONFIG_SERIAL_8250_RSA
684 * Only probe for RSA ports if we got the region.
686 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
689 for (i = 0 ; i < probe_rsa_count; ++i) {
690 if (probe_rsa[i] == up->port.iobase &&
692 up->port.type = PORT_RSA;
698 serial_outp(up, UART_LCR, save_lcr);
700 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
701 up->capabilities = uart_config[up->port.type].flags;
703 if (up->port.type == PORT_UNKNOWN)
709 #ifdef CONFIG_SERIAL_8250_RSA
710 if (up->port.type == PORT_RSA)
711 serial_outp(up, UART_RSA_FRR, 0);
713 serial_outp(up, UART_MCR, save_mcr);
714 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
715 UART_FCR_CLEAR_RCVR |
716 UART_FCR_CLEAR_XMIT));
717 serial_outp(up, UART_FCR, 0);
718 (void)serial_in(up, UART_RX);
719 serial_outp(up, UART_IER, 0);
722 spin_unlock_irqrestore(&up->port.lock, flags);
723 // restore_flags(flags);
724 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
727 static void autoconfig_irq(struct uart_8250_port *up)
729 unsigned char save_mcr, save_ier;
730 unsigned char save_ICP = 0;
731 unsigned int ICP = 0;
735 if (up->port.flags & UPF_FOURPORT) {
736 ICP = (up->port.iobase & 0xfe0) | 0x1f;
737 save_ICP = inb_p(ICP);
742 /* forget possible initially masked and pending IRQ */
743 probe_irq_off(probe_irq_on());
744 save_mcr = serial_inp(up, UART_MCR);
745 save_ier = serial_inp(up, UART_IER);
746 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
748 irqs = probe_irq_on();
749 serial_outp(up, UART_MCR, 0);
751 if (up->port.flags & UPF_FOURPORT) {
752 serial_outp(up, UART_MCR,
753 UART_MCR_DTR | UART_MCR_RTS);
755 serial_outp(up, UART_MCR,
756 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
758 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
759 (void)serial_inp(up, UART_LSR);
760 (void)serial_inp(up, UART_RX);
761 (void)serial_inp(up, UART_IIR);
762 (void)serial_inp(up, UART_MSR);
763 serial_outp(up, UART_TX, 0xFF);
765 irq = probe_irq_off(irqs);
767 serial_outp(up, UART_MCR, save_mcr);
768 serial_outp(up, UART_IER, save_ier);
770 if (up->port.flags & UPF_FOURPORT)
771 outb_p(save_ICP, ICP);
773 up->port.irq = (irq > 0) ? irq : 0;
776 static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
778 struct uart_8250_port *up = (struct uart_8250_port *)port;
780 if (up->ier & UART_IER_THRI) {
781 up->ier &= ~UART_IER_THRI;
782 serial_out(up, UART_IER, up->ier);
784 if (up->port.type == PORT_16C950 && tty_stop) {
785 up->acr |= UART_ACR_TXDIS;
786 serial_icr_write(up, UART_ACR, up->acr);
790 static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start)
792 struct uart_8250_port *up = (struct uart_8250_port *)port;
794 if (!(up->ier & UART_IER_THRI)) {
795 up->ier |= UART_IER_THRI;
796 serial_out(up, UART_IER, up->ier);
799 * We only do this from uart_start
801 if (tty_start && up->port.type == PORT_16C950) {
802 up->acr &= ~UART_ACR_TXDIS;
803 serial_icr_write(up, UART_ACR, up->acr);
807 static void serial8250_stop_rx(struct uart_port *port)
809 struct uart_8250_port *up = (struct uart_8250_port *)port;
811 up->ier &= ~UART_IER_RLSI;
812 up->port.read_status_mask &= ~UART_LSR_DR;
813 serial_out(up, UART_IER, up->ier);
816 static void serial8250_enable_ms(struct uart_port *port)
818 struct uart_8250_port *up = (struct uart_8250_port *)port;
820 up->ier |= UART_IER_MSI;
821 serial_out(up, UART_IER, up->ier);
825 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
827 struct tty_struct *tty = up->port.info->tty;
832 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
833 tty->flip.work.func((void *)tty);
834 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
835 return; // if TTY_DONT_FLIP is set
837 ch = serial_inp(up, UART_RX);
838 *tty->flip.char_buf_ptr = ch;
839 *tty->flip.flag_buf_ptr = TTY_NORMAL;
840 up->port.icount.rx++;
842 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
843 UART_LSR_FE | UART_LSR_OE))) {
845 * For statistics only
847 if (*status & UART_LSR_BI) {
848 *status &= ~(UART_LSR_FE | UART_LSR_PE);
849 up->port.icount.brk++;
851 * We do the SysRQ and SAK checking
852 * here because otherwise the break
853 * may get masked by ignore_status_mask
854 * or read_status_mask.
856 if (uart_handle_break(&up->port))
858 } else if (*status & UART_LSR_PE)
859 up->port.icount.parity++;
860 else if (*status & UART_LSR_FE)
861 up->port.icount.frame++;
862 if (*status & UART_LSR_OE)
863 up->port.icount.overrun++;
866 * Mask off conditions which should be ingored.
868 *status &= up->port.read_status_mask;
870 #ifdef CONFIG_SERIAL_8250_CONSOLE
871 if (up->port.line == up->port.cons->index) {
872 /* Recover the break flag from console xmit */
873 *status |= up->lsr_break_flag;
874 up->lsr_break_flag = 0;
877 if (*status & UART_LSR_BI) {
878 DEBUG_INTR("handling break....");
879 *tty->flip.flag_buf_ptr = TTY_BREAK;
880 } else if (*status & UART_LSR_PE)
881 *tty->flip.flag_buf_ptr = TTY_PARITY;
882 else if (*status & UART_LSR_FE)
883 *tty->flip.flag_buf_ptr = TTY_FRAME;
885 if (uart_handle_sysrq_char(&up->port, ch, regs))
887 if ((*status & up->port.ignore_status_mask) == 0) {
888 tty->flip.flag_buf_ptr++;
889 tty->flip.char_buf_ptr++;
892 if ((*status & UART_LSR_OE) &&
893 tty->flip.count < TTY_FLIPBUF_SIZE) {
895 * Overrun is special, since it's reported
896 * immediately, and doesn't affect the current
899 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
900 tty->flip.flag_buf_ptr++;
901 tty->flip.char_buf_ptr++;
905 *status = serial_inp(up, UART_LSR);
906 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
907 tty_flip_buffer_push(tty);
910 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
912 struct circ_buf *xmit = &up->port.info->xmit;
915 if (up->port.x_char) {
916 serial_outp(up, UART_TX, up->port.x_char);
917 up->port.icount.tx++;
921 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
922 serial8250_stop_tx(&up->port, 0);
926 count = up->port.fifosize;
928 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
929 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
930 up->port.icount.tx++;
931 if (uart_circ_empty(xmit))
933 } while (--count > 0);
935 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
936 uart_write_wakeup(&up->port);
938 DEBUG_INTR("THRE...");
940 if (uart_circ_empty(xmit))
941 serial8250_stop_tx(&up->port, 0);
944 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
948 status = serial_in(up, UART_MSR);
950 if ((status & UART_MSR_ANY_DELTA) == 0)
953 if (status & UART_MSR_TERI)
954 up->port.icount.rng++;
955 if (status & UART_MSR_DDSR)
956 up->port.icount.dsr++;
957 if (status & UART_MSR_DDCD)
958 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
959 if (status & UART_MSR_DCTS)
960 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
962 wake_up_interruptible(&up->port.info->delta_msr_wait);
966 * This handles the interrupt from one port.
969 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
971 unsigned int status = serial_inp(up, UART_LSR);
973 DEBUG_INTR("status = %x...", status);
975 if (status & UART_LSR_DR)
976 receive_chars(up, &status, regs);
977 check_modem_status(up);
978 if (status & UART_LSR_THRE)
983 * This is the serial driver's interrupt routine.
985 * Arjan thinks the old way was overly complex, so it got simplified.
986 * Alan disagrees, saying that need the complexity to handle the weird
987 * nature of ISA shared interrupts. (This is a special exception.)
989 * In order to handle ISA shared interrupts properly, we need to check
990 * that all ports have been serviced, and therefore the ISA interrupt
991 * line has been de-asserted.
993 * This means we need to loop through all ports. checking that they
994 * don't have an interrupt pending.
996 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
998 struct irq_info *i = dev_id;
999 struct list_head *l, *end = NULL;
1000 int pass_counter = 0;
1002 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1004 spin_lock(&i->lock);
1008 struct uart_8250_port *up;
1011 up = list_entry(l, struct uart_8250_port, list);
1013 iir = serial_in(up, UART_IIR);
1014 if (!(iir & UART_IIR_NO_INT)) {
1015 spin_lock(&up->port.lock);
1016 serial8250_handle_port(up, regs);
1017 spin_unlock(&up->port.lock);
1020 } else if (end == NULL)
1025 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1026 /* If we hit this, we're dead. */
1027 printk(KERN_ERR "serial8250: too much work for "
1033 spin_unlock(&i->lock);
1035 DEBUG_INTR("end.\n");
1036 /* FIXME! Was it really ours? */
1041 * To support ISA shared interrupts, we need to have one interrupt
1042 * handler that ensures that the IRQ line has been deasserted
1043 * before returning. Failing to do this will result in the IRQ
1044 * line being stuck active, and, since ISA irqs are edge triggered,
1045 * no more IRQs will be seen.
1047 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1049 spin_lock_irq(&i->lock);
1051 if (!list_empty(i->head)) {
1052 if (i->head == &up->list)
1053 i->head = i->head->next;
1054 list_del(&up->list);
1056 BUG_ON(i->head != &up->list);
1060 spin_unlock_irq(&i->lock);
1063 static int serial_link_irq_chain(struct uart_8250_port *up)
1065 struct irq_info *i = irq_lists + up->port.irq;
1066 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1068 spin_lock_irq(&i->lock);
1071 list_add(&up->list, i->head);
1072 spin_unlock_irq(&i->lock);
1076 INIT_LIST_HEAD(&up->list);
1077 i->head = &up->list;
1078 spin_unlock_irq(&i->lock);
1080 ret = request_irq(up->port.irq, serial8250_interrupt,
1081 irq_flags, "serial", i);
1083 serial_do_unlink(i, up);
1089 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1091 struct irq_info *i = irq_lists + up->port.irq;
1093 BUG_ON(i->head == NULL);
1095 if (list_empty(i->head))
1096 free_irq(up->port.irq, i);
1098 serial_do_unlink(i, up);
1102 * This function is used to handle ports that do not have an
1103 * interrupt. This doesn't work very well for 16450's, but gives
1104 * barely passable results for a 16550A. (Although at the expense
1105 * of much CPU overhead).
1107 static void serial8250_timeout(unsigned long data)
1109 struct uart_8250_port *up = (struct uart_8250_port *)data;
1110 unsigned int timeout;
1113 iir = serial_in(up, UART_IIR);
1114 if (!(iir & UART_IIR_NO_INT)) {
1115 spin_lock(&up->port.lock);
1116 serial8250_handle_port(up, NULL);
1117 spin_unlock(&up->port.lock);
1120 timeout = up->port.timeout;
1121 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1122 mod_timer(&up->timer, jiffies + timeout);
1125 static unsigned int serial8250_tx_empty(struct uart_port *port)
1127 struct uart_8250_port *up = (struct uart_8250_port *)port;
1128 unsigned long flags;
1131 spin_lock_irqsave(&up->port.lock, flags);
1132 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1133 spin_unlock_irqrestore(&up->port.lock, flags);
1138 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1140 struct uart_8250_port *up = (struct uart_8250_port *)port;
1141 unsigned long flags;
1142 unsigned char status;
1145 spin_lock_irqsave(&up->port.lock, flags);
1146 status = serial_in(up, UART_MSR);
1147 spin_unlock_irqrestore(&up->port.lock, flags);
1150 if (status & UART_MSR_DCD)
1152 if (status & UART_MSR_RI)
1154 if (status & UART_MSR_DSR)
1156 if (status & UART_MSR_CTS)
1161 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1163 struct uart_8250_port *up = (struct uart_8250_port *)port;
1164 unsigned char mcr = 0;
1166 if (mctrl & TIOCM_RTS)
1167 mcr |= UART_MCR_RTS;
1168 if (mctrl & TIOCM_DTR)
1169 mcr |= UART_MCR_DTR;
1170 if (mctrl & TIOCM_OUT1)
1171 mcr |= UART_MCR_OUT1;
1172 if (mctrl & TIOCM_OUT2)
1173 mcr |= UART_MCR_OUT2;
1174 if (mctrl & TIOCM_LOOP)
1175 mcr |= UART_MCR_LOOP;
1177 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1179 serial_out(up, UART_MCR, mcr);
1182 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1184 struct uart_8250_port *up = (struct uart_8250_port *)port;
1185 unsigned long flags;
1187 spin_lock_irqsave(&up->port.lock, flags);
1188 if (break_state == -1)
1189 up->lcr |= UART_LCR_SBC;
1191 up->lcr &= ~UART_LCR_SBC;
1192 serial_out(up, UART_LCR, up->lcr);
1193 spin_unlock_irqrestore(&up->port.lock, flags);
1196 static int serial8250_startup(struct uart_port *port)
1198 struct uart_8250_port *up = (struct uart_8250_port *)port;
1199 unsigned long flags;
1202 up->capabilities = uart_config[up->port.type].flags;
1205 if (up->port.type == PORT_16C950) {
1206 /* Wake up and initialize UART */
1208 serial_outp(up, UART_LCR, 0xBF);
1209 serial_outp(up, UART_EFR, UART_EFR_ECB);
1210 serial_outp(up, UART_IER, 0);
1211 serial_outp(up, UART_LCR, 0);
1212 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1213 serial_outp(up, UART_LCR, 0xBF);
1214 serial_outp(up, UART_EFR, UART_EFR_ECB);
1215 serial_outp(up, UART_LCR, 0);
1218 #ifdef CONFIG_SERIAL_8250_RSA
1220 * If this is an RSA port, see if we can kick it up to the
1221 * higher speed clock.
1227 * Clear the FIFO buffers and disable them.
1228 * (they will be reeanbled in set_termios())
1230 if (up->capabilities & UART_CLEAR_FIFO) {
1231 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1232 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
1233 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1234 serial_outp(up, UART_FCR, 0);
1238 * Clear the interrupt registers.
1240 (void) serial_inp(up, UART_LSR);
1241 (void) serial_inp(up, UART_RX);
1242 (void) serial_inp(up, UART_IIR);
1243 (void) serial_inp(up, UART_MSR);
1246 * At this point, there's no way the LSR could still be 0xff;
1247 * if it is, then bail out, because there's likely no UART
1250 if (!(up->port.flags & UPF_BUGGY_UART) &&
1251 (serial_inp(up, UART_LSR) == 0xff)) {
1252 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1257 * If the "interrupt" for this port doesn't correspond with any
1258 * hardware interrupt, we use a timer-based system. The original
1259 * driver used to do this with IRQ0.
1261 if (!is_real_interrupt(up->port.irq)) {
1262 unsigned int timeout = up->port.timeout;
1264 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1266 up->timer.data = (unsigned long)up;
1267 mod_timer(&up->timer, jiffies + timeout);
1269 retval = serial_link_irq_chain(up);
1275 * Now, initialize the UART
1277 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1279 spin_lock_irqsave(&up->port.lock, flags);
1280 if (up->port.flags & UPF_FOURPORT) {
1281 if (!is_real_interrupt(up->port.irq))
1282 up->port.mctrl |= TIOCM_OUT1;
1285 * Most PC uarts need OUT2 raised to enable interrupts.
1287 if (is_real_interrupt(up->port.irq))
1288 up->port.mctrl |= TIOCM_OUT2;
1290 serial8250_set_mctrl(&up->port, up->port.mctrl);
1291 spin_unlock_irqrestore(&up->port.lock, flags);
1294 * Finally, enable interrupts. Note: Modem status interrupts
1295 * are set via set_termios(), which will be occurring imminently
1296 * anyway, so we don't enable them here.
1298 up->ier = UART_IER_RLSI | UART_IER_RDI;
1299 serial_outp(up, UART_IER, up->ier);
1301 if (up->port.flags & UPF_FOURPORT) {
1304 * Enable interrupts on the AST Fourport board
1306 icp = (up->port.iobase & 0xfe0) | 0x01f;
1312 * And clear the interrupt registers again for luck.
1314 (void) serial_inp(up, UART_LSR);
1315 (void) serial_inp(up, UART_RX);
1316 (void) serial_inp(up, UART_IIR);
1317 (void) serial_inp(up, UART_MSR);
1322 static void serial8250_shutdown(struct uart_port *port)
1324 struct uart_8250_port *up = (struct uart_8250_port *)port;
1325 unsigned long flags;
1328 * Disable interrupts from this port
1331 serial_outp(up, UART_IER, 0);
1333 spin_lock_irqsave(&up->port.lock, flags);
1334 if (up->port.flags & UPF_FOURPORT) {
1335 /* reset interrupts on the AST Fourport board */
1336 inb((up->port.iobase & 0xfe0) | 0x1f);
1337 up->port.mctrl |= TIOCM_OUT1;
1339 up->port.mctrl &= ~TIOCM_OUT2;
1341 serial8250_set_mctrl(&up->port, up->port.mctrl);
1342 spin_unlock_irqrestore(&up->port.lock, flags);
1345 * Disable break condition and FIFOs
1347 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1348 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
1349 UART_FCR_CLEAR_RCVR |
1350 UART_FCR_CLEAR_XMIT);
1351 serial_outp(up, UART_FCR, 0);
1353 #ifdef CONFIG_SERIAL_8250_RSA
1355 * Reset the RSA board back to 115kbps compat mode.
1361 * Read data port to reset things, and then unlink from
1364 (void) serial_in(up, UART_RX);
1366 if (!is_real_interrupt(up->port.irq))
1367 del_timer_sync(&up->timer);
1369 serial_unlink_irq_chain(up);
1372 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1377 * Handle magic divisors for baud rates above baud_base on
1378 * SMSC SuperIO chips.
1380 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1381 baud == (port->uartclk/4))
1383 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1384 baud == (port->uartclk/8))
1387 quot = uart_get_divisor(port, baud);
1393 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1394 struct termios *old)
1396 struct uart_8250_port *up = (struct uart_8250_port *)port;
1397 unsigned char cval, fcr = 0;
1398 unsigned long flags;
1399 unsigned int baud, quot;
1401 switch (termios->c_cflag & CSIZE) {
1417 if (termios->c_cflag & CSTOPB)
1419 if (termios->c_cflag & PARENB)
1420 cval |= UART_LCR_PARITY;
1421 if (!(termios->c_cflag & PARODD))
1422 cval |= UART_LCR_EPAR;
1424 if (termios->c_cflag & CMSPAR)
1425 cval |= UART_LCR_SPAR;
1429 * Ask the core to calculate the divisor for us.
1431 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1432 quot = serial8250_get_divisor(port, baud);
1435 * Work around a bug in the Oxford Semiconductor 952 rev B
1436 * chip which causes it to seriously miscalculate baud rates
1439 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
1443 if (up->capabilities & UART_USE_FIFO) {
1445 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1446 #ifdef CONFIG_SERIAL_8250_RSA
1447 else if (up->port.type == PORT_RSA)
1448 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
1451 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
1455 * TI16C750: hardware flow control and 64 byte FIFOs. When AFE is
1456 * enabled, RTS will be deasserted when the receive FIFO contains
1457 * more characters than the trigger, or the MCR RTS bit is cleared.
1459 if (up->port.type == PORT_16750) {
1460 up->mcr &= ~UART_MCR_AFE;
1461 if (termios->c_cflag & CRTSCTS)
1462 up->mcr |= UART_MCR_AFE;
1464 fcr |= UART_FCR7_64BYTE;
1468 * Ok, we're now changing the port state. Do it with
1469 * interrupts disabled.
1471 spin_lock_irqsave(&up->port.lock, flags);
1474 * Update the per-port timeout.
1476 uart_update_timeout(port, termios->c_cflag, baud);
1478 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1479 if (termios->c_iflag & INPCK)
1480 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1481 if (termios->c_iflag & (BRKINT | PARMRK))
1482 up->port.read_status_mask |= UART_LSR_BI;
1485 * Characteres to ignore
1487 up->port.ignore_status_mask = 0;
1488 if (termios->c_iflag & IGNPAR)
1489 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1490 if (termios->c_iflag & IGNBRK) {
1491 up->port.ignore_status_mask |= UART_LSR_BI;
1493 * If we're ignoring parity and break indicators,
1494 * ignore overruns too (for real raw support).
1496 if (termios->c_iflag & IGNPAR)
1497 up->port.ignore_status_mask |= UART_LSR_OE;
1501 * ignore all characters if CREAD is not set
1503 if ((termios->c_cflag & CREAD) == 0)
1504 up->port.ignore_status_mask |= UART_LSR_DR;
1507 * CTS flow control flag and modem status interrupts
1509 up->ier &= ~UART_IER_MSI;
1510 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1511 up->ier |= UART_IER_MSI;
1512 if (up->port.type == PORT_XSCALE)
1513 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1515 serial_out(up, UART_IER, up->ier);
1517 if (up->capabilities & UART_STARTECH) {
1518 serial_outp(up, UART_LCR, 0xBF);
1519 serial_outp(up, UART_EFR,
1520 termios->c_cflag & CRTSCTS ? UART_EFR_CTS :0);
1523 if (up->capabilities & UART_NATSEMI) {
1524 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1525 serial_outp(up, UART_LCR, 0xe0);
1527 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1530 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1531 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1534 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1535 * is written without DLAB set, this mode will be disabled.
1537 if (up->port.type == PORT_16750)
1538 serial_outp(up, UART_FCR, fcr);
1540 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1541 up->lcr = cval; /* Save LCR */
1542 if (up->port.type != PORT_16750) {
1543 if (fcr & UART_FCR_ENABLE_FIFO) {
1544 /* emulated UARTs (Lucent Venus 167x) need two steps */
1545 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1547 serial_outp(up, UART_FCR, fcr); /* set fcr */
1549 serial8250_set_mctrl(&up->port, up->port.mctrl);
1550 spin_unlock_irqrestore(&up->port.lock, flags);
1554 serial8250_pm(struct uart_port *port, unsigned int state,
1555 unsigned int oldstate)
1557 struct uart_8250_port *up = (struct uart_8250_port *)port;
1560 if (up->capabilities & UART_STARTECH) {
1561 /* Arrange to enter sleep mode */
1562 serial_outp(up, UART_LCR, 0xBF);
1563 serial_outp(up, UART_EFR, UART_EFR_ECB);
1564 serial_outp(up, UART_LCR, 0);
1565 serial_outp(up, UART_IER, UART_IERX_SLEEP);
1566 serial_outp(up, UART_LCR, 0xBF);
1567 serial_outp(up, UART_EFR, 0);
1568 serial_outp(up, UART_LCR, 0);
1570 if (up->port.type == PORT_16750) {
1571 /* Arrange to enter sleep mode */
1572 serial_outp(up, UART_IER, UART_IERX_SLEEP);
1576 up->pm(port, state, oldstate);
1579 if (up->capabilities & UART_STARTECH) {
1581 serial_outp(up, UART_LCR, 0xBF);
1582 serial_outp(up, UART_EFR, UART_EFR_ECB);
1584 * Turn off LCR == 0xBF so we actually set the IER
1585 * register on the XR16C850
1587 serial_outp(up, UART_LCR, 0);
1588 serial_outp(up, UART_IER, 0);
1590 * Now reset LCR so we can turn off the ECB bit
1592 serial_outp(up, UART_LCR, 0xBF);
1593 serial_outp(up, UART_EFR, 0);
1595 * For a XR16C850, we need to set the trigger levels
1597 if (up->port.type == PORT_16850) {
1600 fctr = serial_inp(up, UART_FCTR) &
1601 ~(UART_FCTR_RX | UART_FCTR_TX);
1602 serial_outp(up, UART_FCTR, fctr |
1605 serial_outp(up, UART_TRG, UART_TRG_96);
1606 serial_outp(up, UART_FCTR, fctr |
1609 serial_outp(up, UART_TRG, UART_TRG_96);
1611 serial_outp(up, UART_LCR, 0);
1614 if (up->port.type == PORT_16750) {
1616 serial_outp(up, UART_IER, 0);
1620 up->pm(port, state, oldstate);
1625 * Resource handling. This is complicated by the fact that resources
1626 * depend on the port type. Maybe we should be claiming the standard
1627 * 8250 ports, and then trying to get other resources as necessary?
1630 serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res)
1632 unsigned int size = 8 << up->port.regshift;
1635 switch (up->port.iotype) {
1637 if (up->port.mapbase) {
1638 *res = request_mem_region(up->port.mapbase, size, "serial");
1646 *res = request_region(up->port.iobase, size, "serial");
1655 serial8250_request_rsa_resource(struct uart_8250_port *up, struct resource **res)
1657 unsigned int size = 8 << up->port.regshift;
1658 unsigned long start;
1661 switch (up->port.iotype) {
1663 if (up->port.mapbase) {
1664 start = up->port.mapbase;
1665 start += UART_RSA_BASE << up->port.regshift;
1666 *res = request_mem_region(start, size, "serial-rsa");
1674 start = up->port.iobase;
1675 start += UART_RSA_BASE << up->port.regshift;
1676 *res = request_region(start, size, "serial-rsa");
1685 static void serial8250_release_port(struct uart_port *port)
1687 struct uart_8250_port *up = (struct uart_8250_port *)port;
1688 unsigned long start, offset = 0, size = 0;
1690 if (up->port.type == PORT_RSA) {
1691 offset = UART_RSA_BASE << up->port.regshift;
1695 size <<= up->port.regshift;
1697 switch (up->port.iotype) {
1699 if (up->port.mapbase) {
1703 iounmap(up->port.membase);
1704 up->port.membase = NULL;
1706 start = up->port.mapbase;
1709 release_mem_region(start + offset, size);
1710 release_mem_region(start, 8 << up->port.regshift);
1716 start = up->port.iobase;
1719 release_region(start + offset, size);
1720 release_region(start + offset, 8 << up->port.regshift);
1728 static int serial8250_request_port(struct uart_port *port)
1730 struct uart_8250_port *up = (struct uart_8250_port *)port;
1731 struct resource *res = NULL, *res_rsa = NULL;
1734 if (up->port.type == PORT_RSA) {
1735 ret = serial8250_request_rsa_resource(up, &res_rsa);
1740 ret = serial8250_request_std_resource(up, &res);
1743 * If we have a mapbase, then request that as well.
1745 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
1746 int size = res->end - res->start + 1;
1748 up->port.membase = ioremap(up->port.mapbase, size);
1749 if (!up->port.membase)
1755 release_resource(res_rsa);
1757 release_resource(res);
1762 static void serial8250_config_port(struct uart_port *port, int flags)
1764 struct uart_8250_port *up = (struct uart_8250_port *)port;
1765 struct resource *res_std = NULL, *res_rsa = NULL;
1766 int probeflags = PROBE_ANY;
1771 * Don't probe for MCA ports on non-MCA machines.
1773 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
1778 * Find the region that we can probe for. This in turn
1779 * tells us whether we can probe for the type of port.
1781 ret = serial8250_request_std_resource(up, &res_std);
1785 ret = serial8250_request_rsa_resource(up, &res_rsa);
1787 probeflags &= ~PROBE_RSA;
1789 if (flags & UART_CONFIG_TYPE)
1790 autoconfig(up, probeflags);
1791 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
1795 * If the port wasn't an RSA port, release the resource.
1797 if (up->port.type != PORT_RSA && res_rsa)
1798 release_resource(res_rsa);
1800 if (up->port.type == PORT_UNKNOWN && res_std)
1801 release_resource(res_std);
1805 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
1807 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
1808 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
1809 ser->type > PORT_MAX_8250 || ser->type == PORT_CIRRUS ||
1810 ser->type == PORT_STARTECH)
1816 serial8250_type(struct uart_port *port)
1818 int type = port->type;
1820 if (type >= ARRAY_SIZE(uart_config))
1822 return uart_config[type].name;
1825 static struct uart_ops serial8250_pops = {
1826 .tx_empty = serial8250_tx_empty,
1827 .set_mctrl = serial8250_set_mctrl,
1828 .get_mctrl = serial8250_get_mctrl,
1829 .stop_tx = serial8250_stop_tx,
1830 .start_tx = serial8250_start_tx,
1831 .stop_rx = serial8250_stop_rx,
1832 .enable_ms = serial8250_enable_ms,
1833 .break_ctl = serial8250_break_ctl,
1834 .startup = serial8250_startup,
1835 .shutdown = serial8250_shutdown,
1836 .set_termios = serial8250_set_termios,
1837 .pm = serial8250_pm,
1838 .type = serial8250_type,
1839 .release_port = serial8250_release_port,
1840 .request_port = serial8250_request_port,
1841 .config_port = serial8250_config_port,
1842 .verify_port = serial8250_verify_port,
1845 static struct uart_8250_port serial8250_ports[UART_NR];
1847 static void __init serial8250_isa_init_ports(void)
1849 struct uart_8250_port *up;
1850 static int first = 1;
1857 for (i = 0, up = serial8250_ports; i < ARRAY_SIZE(old_serial_port);
1859 up->port.iobase = old_serial_port[i].port;
1860 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
1861 up->port.uartclk = old_serial_port[i].baud_base * 16;
1862 up->port.flags = old_serial_port[i].flags;
1863 up->port.hub6 = old_serial_port[i].hub6;
1864 up->port.membase = old_serial_port[i].iomem_base;
1865 up->port.iotype = old_serial_port[i].io_type;
1866 up->port.regshift = old_serial_port[i].iomem_reg_shift;
1867 up->port.ops = &serial8250_pops;
1869 up->port.flags |= UPF_SHARE_IRQ;
1873 static void __init serial8250_register_ports(struct uart_driver *drv)
1877 serial8250_isa_init_ports();
1879 for (i = 0; i < UART_NR; i++) {
1880 struct uart_8250_port *up = &serial8250_ports[i];
1883 up->port.ops = &serial8250_pops;
1884 init_timer(&up->timer);
1885 up->timer.function = serial8250_timeout;
1888 * ALPHA_KLUDGE_MCR needs to be killed.
1890 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1891 up->mcr_force = ALPHA_KLUDGE_MCR;
1893 uart_add_one_port(drv, &up->port);
1897 #ifdef CONFIG_SERIAL_8250_CONSOLE
1899 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1902 * Wait for transmitter & holding register to empty
1904 static inline void wait_for_xmitr(struct uart_8250_port *up)
1906 unsigned int status, tmout = 10000;
1908 /* Wait up to 10ms for the character(s) to be sent. */
1910 status = serial_in(up, UART_LSR);
1912 if (status & UART_LSR_BI)
1913 up->lsr_break_flag = UART_LSR_BI;
1918 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1920 /* Wait up to 1s for flow control if necessary */
1921 if (up->port.flags & UPF_CONS_FLOW) {
1924 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1930 * Print a string to the serial port trying not to disturb
1931 * any possible real use of the port...
1933 * The console_lock must be held when we get here.
1936 serial8250_console_write(struct console *co, const char *s, unsigned int count)
1938 struct uart_8250_port *up = &serial8250_ports[co->index];
1943 * First save the UER then disable the interrupts
1945 ier = serial_in(up, UART_IER);
1947 if (up->port.type == PORT_XSCALE)
1948 serial_out(up, UART_IER, UART_IER_UUE);
1950 serial_out(up, UART_IER, 0);
1953 * Now, do each character
1955 for (i = 0; i < count; i++, s++) {
1959 * Send the character out.
1960 * If a LF, also do CR...
1962 serial_out(up, UART_TX, *s);
1965 serial_out(up, UART_TX, 13);
1970 * Finally, wait for transmitter to become empty
1971 * and restore the IER
1974 serial_out(up, UART_IER, ier);
1977 static int __init serial8250_console_setup(struct console *co, char *options)
1979 struct uart_port *port;
1986 * Check whether an invalid uart number has been specified, and
1987 * if so, search for the first available port that does have
1990 if (co->index >= UART_NR)
1992 port = &serial8250_ports[co->index].port;
1999 spin_lock_init(&port->lock);
2002 uart_parse_options(options, &baud, &parity, &bits, &flow);
2004 return uart_set_options(port, co, baud, parity, bits, flow);
2007 static struct uart_driver serial8250_reg;
2008 static struct console serial8250_console = {
2010 .write = serial8250_console_write,
2011 .device = uart_console_device,
2012 .setup = serial8250_console_setup,
2013 .flags = CON_PRINTBUFFER,
2015 .data = &serial8250_reg,
2018 static int __init serial8250_console_init(void)
2020 serial8250_isa_init_ports();
2021 register_console(&serial8250_console);
2024 console_initcall(serial8250_console_init);
2026 static int __init serial8250_late_console_init(void)
2028 if (!(serial8250_console.flags & CON_ENABLED))
2029 register_console(&serial8250_console);
2032 late_initcall(serial8250_late_console_init);
2034 #define SERIAL8250_CONSOLE &serial8250_console
2036 #define SERIAL8250_CONSOLE NULL
2039 static struct uart_driver serial8250_reg = {
2040 .owner = THIS_MODULE,
2041 .driver_name = "serial",
2042 .devfs_name = "tts/",
2047 .cons = SERIAL8250_CONSOLE,
2051 * register_serial and unregister_serial allows for 16x50 serial ports to be
2052 * configured at run-time, to support PCMCIA modems.
2055 static int __register_serial(struct serial_struct *req, int line)
2057 struct uart_port port;
2059 port.iobase = req->port;
2060 port.membase = req->iomem_base;
2061 port.irq = req->irq;
2062 port.uartclk = req->baud_base * 16;
2063 port.fifosize = req->xmit_fifo_size;
2064 port.regshift = req->iomem_reg_shift;
2065 port.iotype = req->io_type;
2066 port.flags = req->flags | UPF_BOOT_AUTOCONF;
2067 port.mapbase = req->iomap_base;
2071 port.flags |= UPF_SHARE_IRQ;
2073 if (HIGH_BITS_OFFSET)
2074 port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET;
2077 * If a clock rate wasn't specified by the low level
2078 * driver, then default to the standard clock rate.
2080 if (port.uartclk == 0)
2081 port.uartclk = BASE_BAUD * 16;
2083 return uart_register_port(&serial8250_reg, &port);
2087 * register_serial - configure a 16x50 serial port at runtime
2088 * @req: request structure
2090 * Configure the serial port specified by the request. If the
2091 * port exists and is in use an error is returned. If the port
2092 * is not currently in the table it is added.
2094 * The port is then probed and if necessary the IRQ is autodetected
2095 * If this fails an error is returned.
2097 * On success the port is ready to use and the line number is returned.
2099 int register_serial(struct serial_struct *req)
2101 return __register_serial(req, -1);
2104 int __init early_serial_setup(struct uart_port *port)
2106 if (port->line >= ARRAY_SIZE(serial8250_ports))
2109 serial8250_isa_init_ports();
2110 serial8250_ports[port->line].port = *port;
2111 serial8250_ports[port->line].port.ops = &serial8250_pops;
2116 * unregister_serial - remove a 16x50 serial port at runtime
2117 * @line: serial line number
2119 * Remove one serial port. This may be called from interrupt
2122 void unregister_serial(int line)
2124 uart_unregister_port(&serial8250_reg, line);
2128 * This is for ISAPNP only.
2130 void serial8250_get_irq_map(unsigned int *map)
2134 for (i = 0; i < UART_NR; i++) {
2135 if (serial8250_ports[i].port.type != PORT_UNKNOWN &&
2136 serial8250_ports[i].port.irq < 16)
2137 *map |= 1 << serial8250_ports[i].port.irq;
2142 * serial8250_suspend_port - suspend one serial port
2143 * @line: serial line number
2144 * @level: the level of port suspension, as per uart_suspend_port
2146 * Suspend one serial port.
2148 void serial8250_suspend_port(int line)
2150 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2154 * serial8250_resume_port - resume one serial port
2155 * @line: serial line number
2156 * @level: the level of port resumption, as per uart_resume_port
2158 * Resume one serial port.
2160 void serial8250_resume_port(int line)
2162 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2165 static int __init serial8250_init(void)
2169 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2170 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2171 share_irqs ? "en" : "dis");
2173 for (i = 0; i < NR_IRQS; i++)
2174 spin_lock_init(&irq_lists[i].lock);
2176 ret = uart_register_driver(&serial8250_reg);
2178 serial8250_register_ports(&serial8250_reg);
2183 static void __exit serial8250_exit(void)
2187 for (i = 0; i < UART_NR; i++)
2188 uart_remove_one_port(&serial8250_reg, &serial8250_ports[i].port);
2190 uart_unregister_driver(&serial8250_reg);
2193 module_init(serial8250_init);
2194 module_exit(serial8250_exit);
2196 EXPORT_SYMBOL(register_serial);
2197 EXPORT_SYMBOL(unregister_serial);
2198 EXPORT_SYMBOL(serial8250_get_irq_map);
2199 EXPORT_SYMBOL(serial8250_suspend_port);
2200 EXPORT_SYMBOL(serial8250_resume_port);
2202 MODULE_LICENSE("GPL");
2203 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2205 module_param(share_irqs, uint, 0644);
2206 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2209 #ifdef CONFIG_SERIAL_8250_RSA
2210 module_param_array(probe_rsa, ulong, probe_rsa_count, 0444);
2211 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2213 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);