1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
35 #include <linux/serio.h>
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
43 #include <asm/oplib.h>
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
53 #include <linux/serial_core.h>
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
60 #define SU_BASE_BAUD (1846200 / 16)
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
66 * Here we define the default xmit fifo size used for each type of UART.
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
85 struct uart_sunsu_port {
86 struct uart_port port;
91 unsigned int lsr_break_flag;
94 /* Probing information. */
96 unsigned int type_probed; /* XXX Stupid */
108 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
110 offset <<= up->port.regshift;
112 switch (up->port.iotype) {
114 outb(up->port.hub6 - 1 + offset, up->port.iobase);
115 return inb(up->port.iobase + 1);
118 return readb(up->port.membase + offset);
121 return inb(up->port.iobase + offset);
126 serial_out(struct uart_sunsu_port *up, int offset, int value)
128 #ifndef CONFIG_SPARC64
130 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
131 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
132 * gate outputs a logical one. Since we use level triggered interrupts
133 * we have lockup and watchdog reset. We cannot mask IRQ because
134 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
135 * This problem is similar to what Alpha people suffer, see serial.c.
137 if (offset == UART_MCR)
138 value |= UART_MCR_OUT2;
140 offset <<= up->port.regshift;
142 switch (up->port.iotype) {
144 outb(up->port.hub6 - 1 + offset, up->port.iobase);
145 outb(value, up->port.iobase + 1);
149 writeb(value, up->port.membase + offset);
153 outb(value, up->port.iobase + offset);
158 * We used to support using pause I/O for certain machines. We
159 * haven't supported this for a while, but just in case it's badly
160 * needed for certain old 386 machines, I've left these #define's
163 #define serial_inp(up, offset) serial_in(up, offset)
164 #define serial_outp(up, offset, value) serial_out(up, offset, value)
170 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
172 serial_out(up, UART_SCR, offset);
173 serial_out(up, UART_ICR, value);
176 #if 0 /* Unused currently */
177 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
181 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
182 serial_out(up, UART_SCR, offset);
183 value = serial_in(up, UART_ICR);
184 serial_icr_write(up, UART_ACR, up->acr);
190 #ifdef CONFIG_SERIAL_8250_RSA
192 * Attempts to turn on the RSA FIFO. Returns zero on failure.
193 * We set the port uart clock rate if we succeed.
195 static int __enable_rsa(struct uart_sunsu_port *up)
200 mode = serial_inp(up, UART_RSA_MSR);
201 result = mode & UART_RSA_MSR_FIFO;
204 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
205 mode = serial_inp(up, UART_RSA_MSR);
206 result = mode & UART_RSA_MSR_FIFO;
210 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
215 static void enable_rsa(struct uart_sunsu_port *up)
217 if (up->port.type == PORT_RSA) {
218 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
219 spin_lock_irq(&up->port.lock);
221 spin_unlock_irq(&up->port.lock);
223 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
224 serial_outp(up, UART_RSA_FRR, 0);
229 * Attempts to turn off the RSA FIFO. Returns zero on failure.
230 * It is unknown why interrupts were disabled in here. However,
231 * the caller is expected to preserve this behaviour by grabbing
232 * the spinlock before calling this function.
234 static void disable_rsa(struct uart_sunsu_port *up)
239 if (up->port.type == PORT_RSA &&
240 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
241 spin_lock_irq(&up->port.lock);
243 mode = serial_inp(up, UART_RSA_MSR);
244 result = !(mode & UART_RSA_MSR_FIFO);
247 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
248 mode = serial_inp(up, UART_RSA_MSR);
249 result = !(mode & UART_RSA_MSR_FIFO);
253 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
254 spin_unlock_irq(&up->port.lock);
257 #endif /* CONFIG_SERIAL_8250_RSA */
259 static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop)
261 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
263 if (up->ier & UART_IER_THRI) {
264 up->ier &= ~UART_IER_THRI;
265 serial_out(up, UART_IER, up->ier);
267 if (up->port.type == PORT_16C950 && tty_stop) {
268 up->acr |= UART_ACR_TXDIS;
269 serial_icr_write(up, UART_ACR, up->acr);
273 static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
275 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
277 if (!(up->ier & UART_IER_THRI)) {
278 up->ier |= UART_IER_THRI;
279 serial_out(up, UART_IER, up->ier);
282 * We only do this from uart_start
284 if (tty_start && up->port.type == PORT_16C950) {
285 up->acr &= ~UART_ACR_TXDIS;
286 serial_icr_write(up, UART_ACR, up->acr);
290 static void sunsu_stop_rx(struct uart_port *port)
292 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
295 spin_lock_irqsave(&up->port.lock, flags);
296 up->ier &= ~UART_IER_RLSI;
297 up->port.read_status_mask &= ~UART_LSR_DR;
298 serial_out(up, UART_IER, up->ier);
299 spin_unlock_irqrestore(&up->port.lock, flags);
302 static void sunsu_enable_ms(struct uart_port *port)
304 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
307 spin_lock_irqsave(&up->port.lock, flags);
308 up->ier |= UART_IER_MSI;
309 serial_out(up, UART_IER, up->ier);
310 spin_unlock_irqrestore(&up->port.lock, flags);
314 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
316 struct tty_struct *tty = up->port.info->tty;
319 int saw_console_brk = 0;
322 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
323 tty->flip.work.func((void *)tty);
324 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
325 return; // if TTY_DONT_FLIP is set
327 ch = serial_inp(up, UART_RX);
328 *tty->flip.char_buf_ptr = ch;
329 *tty->flip.flag_buf_ptr = TTY_NORMAL;
330 up->port.icount.rx++;
332 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
333 UART_LSR_FE | UART_LSR_OE))) {
335 * For statistics only
337 if (*status & UART_LSR_BI) {
338 *status &= ~(UART_LSR_FE | UART_LSR_PE);
339 up->port.icount.brk++;
340 if (up->port.cons != NULL &&
341 up->port.line == up->port.cons->index)
344 * We do the SysRQ and SAK checking
345 * here because otherwise the break
346 * may get masked by ignore_status_mask
347 * or read_status_mask.
349 if (uart_handle_break(&up->port))
351 } else if (*status & UART_LSR_PE)
352 up->port.icount.parity++;
353 else if (*status & UART_LSR_FE)
354 up->port.icount.frame++;
355 if (*status & UART_LSR_OE)
356 up->port.icount.overrun++;
359 * Mask off conditions which should be ingored.
361 *status &= up->port.read_status_mask;
363 if (up->port.cons != NULL &&
364 up->port.line == up->port.cons->index) {
365 /* Recover the break flag from console xmit */
366 *status |= up->lsr_break_flag;
367 up->lsr_break_flag = 0;
370 if (*status & UART_LSR_BI) {
371 *tty->flip.flag_buf_ptr = TTY_BREAK;
372 } else if (*status & UART_LSR_PE)
373 *tty->flip.flag_buf_ptr = TTY_PARITY;
374 else if (*status & UART_LSR_FE)
375 *tty->flip.flag_buf_ptr = TTY_FRAME;
377 if (uart_handle_sysrq_char(&up->port, ch, regs))
379 if ((*status & up->port.ignore_status_mask) == 0) {
380 tty->flip.flag_buf_ptr++;
381 tty->flip.char_buf_ptr++;
384 if ((*status & UART_LSR_OE) &&
385 tty->flip.count < TTY_FLIPBUF_SIZE) {
387 * Overrun is special, since it's reported
388 * immediately, and doesn't affect the current
391 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
392 tty->flip.flag_buf_ptr++;
393 tty->flip.char_buf_ptr++;
397 *status = serial_inp(up, UART_LSR);
398 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
399 tty_flip_buffer_push(tty);
405 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
407 struct circ_buf *xmit = &up->port.info->xmit;
410 if (up->port.x_char) {
411 serial_outp(up, UART_TX, up->port.x_char);
412 up->port.icount.tx++;
416 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
417 sunsu_stop_tx(&up->port, 0);
421 count = up->port.fifosize;
423 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
424 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
425 up->port.icount.tx++;
426 if (uart_circ_empty(xmit))
428 } while (--count > 0);
430 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
431 uart_write_wakeup(&up->port);
433 if (uart_circ_empty(xmit))
434 sunsu_stop_tx(&up->port, 0);
437 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
441 status = serial_in(up, UART_MSR);
443 if ((status & UART_MSR_ANY_DELTA) == 0)
446 if (status & UART_MSR_TERI)
447 up->port.icount.rng++;
448 if (status & UART_MSR_DDSR)
449 up->port.icount.dsr++;
450 if (status & UART_MSR_DDCD)
451 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
452 if (status & UART_MSR_DCTS)
453 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
455 wake_up_interruptible(&up->port.info->delta_msr_wait);
458 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
460 struct uart_sunsu_port *up = dev_id;
462 unsigned char status;
464 spin_lock_irqsave(&up->port.lock, flags);
467 status = serial_inp(up, UART_LSR);
468 if (status & UART_LSR_DR)
469 receive_chars(up, &status, regs);
470 check_modem_status(up);
471 if (status & UART_LSR_THRE)
473 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
475 spin_unlock_irqrestore(&up->port.lock, flags);
480 /* Separate interrupt handling path for keyboard/mouse ports. */
483 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
484 unsigned int iflag, unsigned int quot);
486 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
488 unsigned int cur_cflag = up->cflag;
492 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
494 quot = up->port.uartclk / (16 * new_baud);
496 spin_unlock(&up->port.lock);
498 sunsu_change_speed(&up->port, up->cflag, 0, quot);
500 spin_lock(&up->port.lock);
503 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
506 unsigned char ch = serial_inp(up, UART_RX);
508 /* Stop-A is handled by drivers/char/keyboard.c now. */
509 if (up->su_type == SU_PORT_KBD) {
511 serio_interrupt(&up->serio, ch, 0, regs);
513 } else if (up->su_type == SU_PORT_MS) {
514 int ret = suncore_mouse_baud_detection(ch, is_break);
518 sunsu_change_mouse_baud(up);
525 serio_interrupt(&up->serio, ch, 0, regs);
530 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
533 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
535 struct uart_sunsu_port *up = dev_id;
537 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
538 unsigned char status = serial_inp(up, UART_LSR);
540 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
541 receive_kbd_ms_chars(up, regs,
542 (status & UART_LSR_BI) != 0);
548 static unsigned int sunsu_tx_empty(struct uart_port *port)
550 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
554 spin_lock_irqsave(&up->port.lock, flags);
555 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
556 spin_unlock_irqrestore(&up->port.lock, flags);
561 static unsigned int sunsu_get_mctrl(struct uart_port *port)
563 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
565 unsigned char status;
568 spin_lock_irqsave(&up->port.lock, flags);
569 status = serial_in(up, UART_MSR);
570 spin_unlock_irqrestore(&up->port.lock, flags);
573 if (status & UART_MSR_DCD)
575 if (status & UART_MSR_RI)
577 if (status & UART_MSR_DSR)
579 if (status & UART_MSR_CTS)
584 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
586 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
587 unsigned char mcr = 0;
589 if (mctrl & TIOCM_RTS)
591 if (mctrl & TIOCM_DTR)
593 if (mctrl & TIOCM_OUT1)
594 mcr |= UART_MCR_OUT1;
595 if (mctrl & TIOCM_OUT2)
596 mcr |= UART_MCR_OUT2;
597 if (mctrl & TIOCM_LOOP)
598 mcr |= UART_MCR_LOOP;
600 serial_out(up, UART_MCR, mcr);
603 static void sunsu_break_ctl(struct uart_port *port, int break_state)
605 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
608 spin_lock_irqsave(&up->port.lock, flags);
609 if (break_state == -1)
610 up->lcr |= UART_LCR_SBC;
612 up->lcr &= ~UART_LCR_SBC;
613 serial_out(up, UART_LCR, up->lcr);
614 spin_unlock_irqrestore(&up->port.lock, flags);
617 static int sunsu_startup(struct uart_port *port)
619 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
623 if (up->port.type == PORT_16C950) {
624 /* Wake up and initialize UART */
626 serial_outp(up, UART_LCR, 0xBF);
627 serial_outp(up, UART_EFR, UART_EFR_ECB);
628 serial_outp(up, UART_IER, 0);
629 serial_outp(up, UART_LCR, 0);
630 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
631 serial_outp(up, UART_LCR, 0xBF);
632 serial_outp(up, UART_EFR, UART_EFR_ECB);
633 serial_outp(up, UART_LCR, 0);
636 #ifdef CONFIG_SERIAL_8250_RSA
638 * If this is an RSA port, see if we can kick it up to the
639 * higher speed clock.
645 * Clear the FIFO buffers and disable them.
646 * (they will be reeanbled in set_termios())
648 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
649 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
650 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
651 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
652 serial_outp(up, UART_FCR, 0);
656 * Clear the interrupt registers.
658 (void) serial_inp(up, UART_LSR);
659 (void) serial_inp(up, UART_RX);
660 (void) serial_inp(up, UART_IIR);
661 (void) serial_inp(up, UART_MSR);
664 * At this point, there's no way the LSR could still be 0xff;
665 * if it is, then bail out, because there's likely no UART
668 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
669 (serial_inp(up, UART_LSR) == 0xff)) {
670 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
674 if (up->su_type != SU_PORT_PORT) {
675 retval = request_irq(up->irq, sunsu_kbd_ms_interrupt,
676 SA_SHIRQ, su_typev[up->su_type], up);
678 retval = request_irq(up->irq, sunsu_serial_interrupt,
679 SA_SHIRQ, su_typev[up->su_type], up);
682 printk("su: Cannot register IRQ %d\n", up->irq);
687 * Now, initialize the UART
689 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
691 spin_lock_irqsave(&up->port.lock, flags);
693 up->port.mctrl |= TIOCM_OUT2;
695 sunsu_set_mctrl(&up->port, up->port.mctrl);
696 spin_unlock_irqrestore(&up->port.lock, flags);
699 * Finally, enable interrupts. Note: Modem status interrupts
700 * are set via set_termios(), which will be occurring imminently
701 * anyway, so we don't enable them here.
703 up->ier = UART_IER_RLSI | UART_IER_RDI;
704 serial_outp(up, UART_IER, up->ier);
706 if (up->port.flags & ASYNC_FOURPORT) {
709 * Enable interrupts on the AST Fourport board
711 icp = (up->port.iobase & 0xfe0) | 0x01f;
717 * And clear the interrupt registers again for luck.
719 (void) serial_inp(up, UART_LSR);
720 (void) serial_inp(up, UART_RX);
721 (void) serial_inp(up, UART_IIR);
722 (void) serial_inp(up, UART_MSR);
727 static void sunsu_shutdown(struct uart_port *port)
729 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
733 * Disable interrupts from this port
736 serial_outp(up, UART_IER, 0);
738 spin_lock_irqsave(&up->port.lock, flags);
739 if (up->port.flags & ASYNC_FOURPORT) {
740 /* reset interrupts on the AST Fourport board */
741 inb((up->port.iobase & 0xfe0) | 0x1f);
742 up->port.mctrl |= TIOCM_OUT1;
744 up->port.mctrl &= ~TIOCM_OUT2;
746 sunsu_set_mctrl(&up->port, up->port.mctrl);
747 spin_unlock_irqrestore(&up->port.lock, flags);
750 * Disable break condition and FIFOs
752 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
753 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
754 UART_FCR_CLEAR_RCVR |
755 UART_FCR_CLEAR_XMIT);
756 serial_outp(up, UART_FCR, 0);
758 #ifdef CONFIG_SERIAL_8250_RSA
760 * Reset the RSA board back to 115kbps compat mode.
766 * Read data port to reset things.
768 (void) serial_in(up, UART_RX);
770 free_irq(up->irq, up);
774 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
775 unsigned int iflag, unsigned int quot)
777 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
778 unsigned char cval, fcr = 0;
781 switch (cflag & CSIZE) {
800 cval |= UART_LCR_PARITY;
801 if (!(cflag & PARODD))
802 cval |= UART_LCR_EPAR;
805 cval |= UART_LCR_SPAR;
809 * Work around a bug in the Oxford Semiconductor 952 rev B
810 * chip which causes it to seriously miscalculate baud rates
813 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
817 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
818 if ((up->port.uartclk / quot) < (2400 * 16))
819 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
820 #ifdef CONFIG_SERIAL_8250_RSA
821 else if (up->port.type == PORT_RSA)
822 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
825 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
827 if (up->port.type == PORT_16750)
828 fcr |= UART_FCR7_64BYTE;
831 * Ok, we're now changing the port state. Do it with
832 * interrupts disabled.
834 spin_lock_irqsave(&up->port.lock, flags);
837 * Update the per-port timeout.
839 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
841 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
843 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
844 if (iflag & (BRKINT | PARMRK))
845 up->port.read_status_mask |= UART_LSR_BI;
848 * Characteres to ignore
850 up->port.ignore_status_mask = 0;
852 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
853 if (iflag & IGNBRK) {
854 up->port.ignore_status_mask |= UART_LSR_BI;
856 * If we're ignoring parity and break indicators,
857 * ignore overruns too (for real raw support).
860 up->port.ignore_status_mask |= UART_LSR_OE;
864 * ignore all characters if CREAD is not set
866 if ((cflag & CREAD) == 0)
867 up->port.ignore_status_mask |= UART_LSR_DR;
870 * CTS flow control flag and modem status interrupts
872 up->ier &= ~UART_IER_MSI;
873 if (UART_ENABLE_MS(&up->port, cflag))
874 up->ier |= UART_IER_MSI;
876 serial_out(up, UART_IER, up->ier);
878 if (uart_config[up->port.type].flags & UART_STARTECH) {
879 serial_outp(up, UART_LCR, 0xBF);
880 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
882 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
883 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
884 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
885 if (up->port.type == PORT_16750)
886 serial_outp(up, UART_FCR, fcr); /* set fcr */
887 serial_outp(up, UART_LCR, cval); /* reset DLAB */
888 up->lcr = cval; /* Save LCR */
889 if (up->port.type != PORT_16750) {
890 if (fcr & UART_FCR_ENABLE_FIFO) {
891 /* emulated UARTs (Lucent Venus 167x) need two steps */
892 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
894 serial_outp(up, UART_FCR, fcr); /* set fcr */
899 spin_unlock_irqrestore(&up->port.lock, flags);
903 sunsu_set_termios(struct uart_port *port, struct termios *termios,
906 unsigned int baud, quot;
909 * Ask the core to calculate the divisor for us.
911 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
912 quot = uart_get_divisor(port, baud);
914 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
917 static void sunsu_release_port(struct uart_port *port)
921 static int sunsu_request_port(struct uart_port *port)
926 static void sunsu_config_port(struct uart_port *port, int flags)
928 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
930 if (flags & UART_CONFIG_TYPE) {
932 * We are supposed to call autoconfig here, but this requires
933 * splitting all the OBP probing crap from the UART probing.
934 * We'll do it when we kill sunsu.c altogether.
936 port->type = up->type_probed; /* XXX */
941 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
947 sunsu_type(struct uart_port *port)
949 int type = port->type;
951 if (type >= ARRAY_SIZE(uart_config))
953 return uart_config[type].name;
956 static struct uart_ops sunsu_pops = {
957 .tx_empty = sunsu_tx_empty,
958 .set_mctrl = sunsu_set_mctrl,
959 .get_mctrl = sunsu_get_mctrl,
960 .stop_tx = sunsu_stop_tx,
961 .start_tx = sunsu_start_tx,
962 .stop_rx = sunsu_stop_rx,
963 .enable_ms = sunsu_enable_ms,
964 .break_ctl = sunsu_break_ctl,
965 .startup = sunsu_startup,
966 .shutdown = sunsu_shutdown,
967 .set_termios = sunsu_set_termios,
969 .release_port = sunsu_release_port,
970 .request_port = sunsu_request_port,
971 .config_port = sunsu_config_port,
972 .verify_port = sunsu_verify_port,
977 static struct uart_sunsu_port sunsu_ports[UART_NR];
981 static spinlock_t sunsu_serio_lock = SPIN_LOCK_UNLOCKED;
983 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
985 struct uart_sunsu_port *up = serio->driver;
989 spin_lock_irqsave(&sunsu_serio_lock, flags);
992 lsr = serial_in(up, UART_LSR);
993 } while (!(lsr & UART_LSR_THRE));
995 /* Send the character out. */
996 serial_out(up, UART_TX, ch);
998 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1003 static int sunsu_serio_open(struct serio *serio)
1005 struct uart_sunsu_port *up = serio->driver;
1006 unsigned long flags;
1009 spin_lock_irqsave(&sunsu_serio_lock, flags);
1010 if (!up->serio_open) {
1015 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1020 static void sunsu_serio_close(struct serio *serio)
1022 struct uart_sunsu_port *up = serio->driver;
1023 unsigned long flags;
1025 spin_lock_irqsave(&sunsu_serio_lock, flags);
1027 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1030 #endif /* CONFIG_SERIO */
1032 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1034 unsigned char status1, status2, scratch, scratch2, scratch3;
1035 unsigned char save_lcr, save_mcr;
1036 struct linux_ebus_device *dev = 0;
1037 struct linux_ebus *ebus;
1038 #ifdef CONFIG_SPARC64
1039 struct sparc_isa_bridge *isa_br;
1040 struct sparc_isa_device *isa_dev;
1042 #ifndef CONFIG_SPARC64
1043 struct linux_prom_registers reg0;
1045 unsigned long flags;
1047 if (!up->port_node || !up->su_type)
1050 up->type_probed = PORT_UNKNOWN;
1051 up->port.iotype = SERIAL_IO_MEM;
1054 * First we look for Ebus-bases su's
1056 for_each_ebus(ebus) {
1057 for_each_ebusdev(dev, ebus) {
1058 if (dev->prom_node == up->port_node) {
1060 * The EBus is broken on sparc; it delivers
1061 * virtual addresses in resources. Oh well...
1062 * This is correct on sparc64, though.
1064 up->port.membase = (char *) dev->resource[0].start;
1066 * This is correct on both architectures.
1068 up->port.mapbase = dev->resource[0].start;
1069 up->irq = dev->irqs[0];
1075 #ifdef CONFIG_SPARC64
1076 for_each_isa(isa_br) {
1077 for_each_isadev(isa_dev, isa_br) {
1078 if (isa_dev->prom_node == up->port_node) {
1079 /* Same on sparc64. Cool architecure... */
1080 up->port.membase = (char *) isa_dev->resource.start;
1081 up->port.mapbase = isa_dev->resource.start;
1082 up->irq = isa_dev->irq;
1089 #ifdef CONFIG_SPARC64
1091 * Not on Ebus, bailing.
1096 * Not on Ebus, must be OBIO.
1098 if (prom_getproperty(up->port_node, "reg",
1099 (char *)®0, sizeof(reg0)) == -1) {
1100 prom_printf("sunsu: no \"reg\" property\n");
1103 prom_apply_obio_ranges(®0, 1);
1104 if (reg0.which_io != 0) { /* Just in case... */
1105 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1106 reg0.which_io, reg0.phys_addr);
1109 up->port.mapbase = reg0.phys_addr;
1110 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1111 prom_printf("sunsu: Cannot map registers.\n");
1116 * 0x20 is sun4m thing, Dave Redman heritage.
1117 * See arch/sparc/kernel/irq.c.
1119 #define IRQ_4M(n) ((n)|0x20)
1122 * There is no intr property on MrCoffee, so hardwire it.
1124 up->irq = IRQ_4M(13);
1129 spin_lock_irqsave(&up->port.lock, flags);
1131 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1133 * Do a simple existence test first; if we fail this, there's
1134 * no point trying anything else.
1136 * 0x80 is used as a nonsense port to prevent against false
1137 * positives due to ISA bus float. The assumption is that
1138 * 0x80 is a non-existent port; which should be safe since
1139 * include/asm/io.h also makes this assumption.
1141 scratch = serial_inp(up, UART_IER);
1142 serial_outp(up, UART_IER, 0);
1146 scratch2 = serial_inp(up, UART_IER);
1147 serial_outp(up, UART_IER, 0x0f);
1151 scratch3 = serial_inp(up, UART_IER);
1152 serial_outp(up, UART_IER, scratch);
1153 if (scratch2 != 0 || scratch3 != 0x0F)
1154 goto out; /* We failed; there's nothing here */
1157 save_mcr = serial_in(up, UART_MCR);
1158 save_lcr = serial_in(up, UART_LCR);
1161 * Check to see if a UART is really there. Certain broken
1162 * internal modems based on the Rockwell chipset fail this
1163 * test, because they apparently don't implement the loopback
1164 * test mode. So this test is skipped on the COM 1 through
1165 * COM 4 ports. This *should* be safe, since no board
1166 * manufacturer would be stupid enough to design a board
1167 * that conflicts with COM 1-4 --- we hope!
1169 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1170 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1171 status1 = serial_inp(up, UART_MSR) & 0xF0;
1172 serial_outp(up, UART_MCR, save_mcr);
1173 if (status1 != 0x90)
1174 goto out; /* We failed loopback test */
1176 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1177 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1178 serial_outp(up, UART_LCR, 0);
1179 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1180 scratch = serial_in(up, UART_IIR) >> 6;
1183 up->port.type = PORT_16450;
1186 up->port.type = PORT_UNKNOWN;
1189 up->port.type = PORT_16550;
1192 up->port.type = PORT_16550A;
1195 if (up->port.type == PORT_16550A) {
1196 /* Check for Startech UART's */
1197 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1198 if (serial_in(up, UART_EFR) == 0) {
1199 up->port.type = PORT_16650;
1201 serial_outp(up, UART_LCR, 0xBF);
1202 if (serial_in(up, UART_EFR) == 0)
1203 up->port.type = PORT_16650V2;
1206 if (up->port.type == PORT_16550A) {
1207 /* Check for TI 16750 */
1208 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1209 serial_outp(up, UART_FCR,
1210 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1211 scratch = serial_in(up, UART_IIR) >> 5;
1214 * If this is a 16750, and not a cheap UART
1215 * clone, then it should only go into 64 byte
1216 * mode if the UART_FCR7_64BYTE bit was set
1217 * while UART_LCR_DLAB was latched.
1219 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1220 serial_outp(up, UART_LCR, 0);
1221 serial_outp(up, UART_FCR,
1222 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1223 scratch = serial_in(up, UART_IIR) >> 5;
1225 up->port.type = PORT_16750;
1227 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1229 serial_outp(up, UART_LCR, save_lcr);
1230 if (up->port.type == PORT_16450) {
1231 scratch = serial_in(up, UART_SCR);
1232 serial_outp(up, UART_SCR, 0xa5);
1233 status1 = serial_in(up, UART_SCR);
1234 serial_outp(up, UART_SCR, 0x5a);
1235 status2 = serial_in(up, UART_SCR);
1236 serial_outp(up, UART_SCR, scratch);
1238 if ((status1 != 0xa5) || (status2 != 0x5a))
1239 up->port.type = PORT_8250;
1242 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1244 if (up->port.type == PORT_UNKNOWN)
1246 up->type_probed = up->port.type; /* XXX */
1251 #ifdef CONFIG_SERIAL_8250_RSA
1252 if (up->port.type == PORT_RSA)
1253 serial_outp(up, UART_RSA_FRR, 0);
1255 serial_outp(up, UART_MCR, save_mcr);
1256 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1257 UART_FCR_CLEAR_RCVR |
1258 UART_FCR_CLEAR_XMIT));
1259 serial_outp(up, UART_FCR, 0);
1260 (void)serial_in(up, UART_RX);
1261 serial_outp(up, UART_IER, 0);
1264 spin_unlock_irqrestore(&up->port.lock, flags);
1267 static struct uart_driver sunsu_reg = {
1268 .owner = THIS_MODULE,
1269 .driver_name = "serial",
1270 .devfs_name = "tts/",
1275 static int __init sunsu_kbd_ms_init(void)
1277 struct uart_sunsu_port *up;
1280 for (i = 0, up = sunsu_ports; i < 2; i++, up++) {
1282 up->port.type = PORT_UNKNOWN;
1283 up->port.uartclk = (SU_BASE_BAUD * 16);
1285 if (up->su_type == SU_PORT_KBD)
1286 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1288 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1290 sunsu_autoconfig(up);
1291 if (up->port.type == PORT_UNKNOWN)
1294 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1296 up->port.membase, __irq_itoa(up->irq),
1297 sunsu_type(&up->port));
1300 memset(&up->serio, 0, sizeof(up->serio));
1302 up->serio.driver = up;
1304 up->serio.type = SERIO_RS232;
1305 if (up->su_type == SU_PORT_KBD) {
1306 up->serio.type |= SERIO_SUNKBD;
1307 up->serio.name = "sukbd";
1309 up->serio.type |= (SERIO_SUN | (1 << 16));
1310 up->serio.name = "sums";
1312 up->serio.phys = (i == 0 ? "su/serio0" : "su/serio1");
1314 up->serio.write = sunsu_serio_write;
1315 up->serio.open = sunsu_serio_open;
1316 up->serio.close = sunsu_serio_close;
1318 serio_register_port(&up->serio);
1321 sunsu_startup(&up->port);
1327 * ------------------------------------------------------------
1328 * Serial console driver
1329 * ------------------------------------------------------------
1332 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1334 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1337 * Wait for transmitter & holding register to empty
1339 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1341 unsigned int status, tmout = 10000;
1343 /* Wait up to 10ms for the character(s) to be sent. */
1345 status = serial_in(up, UART_LSR);
1347 if (status & UART_LSR_BI)
1348 up->lsr_break_flag = UART_LSR_BI;
1353 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1355 /* Wait up to 1s for flow control if necessary */
1356 if (up->port.flags & ASYNC_CONS_FLOW) {
1359 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1365 * Print a string to the serial port trying not to disturb
1366 * any possible real use of the port...
1368 static void sunsu_console_write(struct console *co, const char *s,
1371 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1376 * First save the UER then disable the interrupts
1378 ier = serial_in(up, UART_IER);
1379 serial_out(up, UART_IER, 0);
1382 * Now, do each character
1384 for (i = 0; i < count; i++, s++) {
1388 * Send the character out.
1389 * If a LF, also do CR...
1391 serial_out(up, UART_TX, *s);
1394 serial_out(up, UART_TX, 13);
1399 * Finally, wait for transmitter to become empty
1400 * and restore the IER
1403 serial_out(up, UART_IER, ier);
1407 * Setup initial baud/bits/parity. We do two things here:
1408 * - construct a cflag setting for the first su_open()
1409 * - initialize the serial port
1410 * Return non-zero if we didn't find a serial port.
1412 static int __init sunsu_console_setup(struct console *co, char *options)
1414 struct uart_port *port;
1420 printk("Console: ttyS%d (SU)\n",
1421 (sunsu_reg.minor - 64) + co->index);
1424 * Check whether an invalid uart number has been specified, and
1425 * if so, search for the first available port that does have
1428 if (co->index >= UART_NR)
1430 port = &sunsu_ports[co->index].port;
1435 spin_lock_init(&port->lock);
1438 uart_parse_options(options, &baud, &parity, &bits, &flow);
1440 return uart_set_options(port, co, baud, parity, bits, flow);
1443 static struct console sunsu_cons = {
1445 .write = sunsu_console_write,
1446 .device = uart_console_device,
1447 .setup = sunsu_console_setup,
1448 .flags = CON_PRINTBUFFER,
1452 #define SUNSU_CONSOLE (&sunsu_cons)
1458 static int __init sunsu_serial_console_init(void)
1462 if (con_is_present())
1465 for (i = 0; i < UART_NR; i++) {
1466 int this_minor = sunsu_reg.minor + i;
1468 if ((this_minor - 64) == (serial_console - 1))
1473 if (sunsu_ports[i].port_node == 0)
1476 sunsu_cons.index = i;
1477 register_console(&sunsu_cons);
1481 #define SUNSU_CONSOLE (NULL)
1482 #define sunsu_serial_console_init() do { } while (0)
1485 static int __init sunsu_serial_init(void)
1487 int instance, ret, i;
1489 /* How many instances do we need? */
1491 for (i = 0; i < UART_NR; i++) {
1492 struct uart_sunsu_port *up = &sunsu_ports[i];
1494 if (up->su_type == SU_PORT_MS ||
1495 up->su_type == SU_PORT_KBD)
1498 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1499 up->port.type = PORT_UNKNOWN;
1500 up->port.uartclk = (SU_BASE_BAUD * 16);
1502 sunsu_autoconfig(up);
1503 if (up->port.type == PORT_UNKNOWN)
1506 up->port.line = instance++;
1507 up->port.ops = &sunsu_pops;
1510 sunsu_reg.minor = sunserial_current_minor;
1511 sunserial_current_minor += instance;
1513 sunsu_reg.nr = instance;
1514 sunsu_reg.cons = SUNSU_CONSOLE;
1516 ret = uart_register_driver(&sunsu_reg);
1520 for (i = 0; i < UART_NR; i++) {
1521 struct uart_sunsu_port *up = &sunsu_ports[i];
1523 /* Do not register Keyboard/Mouse lines with UART
1526 if (up->su_type == SU_PORT_MS ||
1527 up->su_type == SU_PORT_KBD)
1530 if (up->port.type == PORT_UNKNOWN)
1533 uart_add_one_port(&sunsu_reg, &up->port);
1539 static int su_node_ok(int node, char *name, int namelen)
1541 if (strncmp(name, "su", namelen) == 0 ||
1542 strncmp(name, "su_pnp", namelen) == 0)
1545 if (strncmp(name, "serial", namelen) == 0) {
1549 /* Is it _really_ a 'su' device? */
1550 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1552 if (strncmp(compat, "sab82532", 8) == 0) {
1553 /* Nope, Siemens serial, not for us. */
1563 #define SU_PROPSIZE 128
1566 * Scan status structure.
1567 * "prop" is a local variable but it eats stack to keep it in each
1568 * stack frame of a recursive procedure.
1570 struct su_probe_scan {
1571 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1572 int msx, kbx; /* minors for mouse and keyboard */
1573 int devices; /* scan index */
1574 char prop[SU_PROPSIZE];
1578 * We have several platforms which present 'su' in different parts
1579 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1580 * We walk over the tree and find them wherever PROM hides them.
1582 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1584 struct uart_sunsu_port *up;
1587 if (t->devices >= UART_NR)
1590 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1591 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1593 continue; /* Broken PROM node */
1595 if (su_node_ok(sunode, t->prop, len)) {
1596 up = &sunsu_ports[t->devices];
1597 if (t->kbnode != 0 && sunode == t->kbnode) {
1598 t->kbx = t->devices;
1599 up->su_type = SU_PORT_KBD;
1600 } else if (t->msnode != 0 && sunode == t->msnode) {
1601 t->msx = t->devices;
1602 up->su_type = SU_PORT_MS;
1604 #ifdef CONFIG_SPARC64
1606 * Do not attempt to use the truncated
1607 * keyboard/mouse ports as serial ports
1608 * on Ultras with PC keyboard attached.
1610 if (prom_getbool(sunode, "mouse"))
1612 if (prom_getbool(sunode, "keyboard"))
1615 up->su_type = SU_PORT_PORT;
1617 up->port_node = sunode;
1620 su_probe_any(t, prom_getchild(sunode));
1625 static int __init sunsu_probe(void)
1629 struct su_probe_scan scan;
1632 * First, we scan the tree.
1641 * Get the nodes for keyboard and mouse from 'aliases'...
1643 node = prom_getchild(prom_root_node);
1644 node = prom_searchsiblings(node, "aliases");
1646 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1649 scan.kbnode = prom_finddevice(scan.prop);
1652 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1655 scan.msnode = prom_finddevice(scan.prop);
1659 su_probe_any(&scan, prom_getchild(prom_root_node));
1662 * Second, we process the special case of keyboard and mouse.
1664 * Currently if we got keyboard and mouse hooked to "su" ports
1665 * we do not use any possible remaining "su" as a serial port.
1666 * Thus, we ignore values of .msx and .kbx, then compact ports.
1668 if (scan.msx != -1 && scan.kbx != -1) {
1669 sunsu_ports[0].su_type = SU_PORT_MS;
1670 sunsu_ports[0].port_node = scan.msnode;
1671 sunsu_ports[1].su_type = SU_PORT_KBD;
1672 sunsu_ports[1].port_node = scan.kbnode;
1674 sunsu_kbd_ms_init();
1678 if (scan.msx != -1 || scan.kbx != -1) {
1679 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1683 if (scan.devices == 0)
1687 * Console must be initiated after the generic initialization.
1689 sunsu_serial_init();
1690 sunsu_serial_console_init();
1695 static void __exit sunsu_exit(void)
1700 for (i = 0; i < UART_NR; i++) {
1701 struct uart_sunsu_port *up = &sunsu_ports[i];
1703 if (up->su_type == SU_PORT_MS ||
1704 up->su_type == SU_PORT_KBD) {
1706 serio_unregister_port(&up->serio);
1708 } else if (up->port.type != PORT_UNKNOWN) {
1709 uart_remove_one_port(&sunsu_reg, &up->port);
1715 uart_unregister_driver(&sunsu_reg);
1718 module_init(sunsu_probe);
1719 module_exit(sunsu_exit);