2 * Copyright (c) 2001 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * There's basically three types of memory:
25 * - data used only by the HCD ... kmalloc is fine
26 * - async and periodic schedules, shared by HC and HCD ... these
27 * need to use dma_pool or dma_alloc_coherent
28 * - driver buffers, read/written by HC ... single shot DMA mapped
30 * There's also PCI "register" data, which is memory mapped.
31 * No memory seen by this driver is pageable.
34 /*-------------------------------------------------------------------------*/
36 * Allocator / cleanup for the per device structure
37 * Called by hcd init / removal code
39 static struct usb_hcd *ehci_hcd_alloc (void)
41 struct ehci_hcd *ehci;
43 ehci = (struct ehci_hcd *)
44 kmalloc (sizeof (struct ehci_hcd), GFP_KERNEL);
46 memset (ehci, 0, sizeof (struct ehci_hcd));
47 ehci->hcd.product_desc = "EHCI Host Controller";
53 static void ehci_hcd_free (struct usb_hcd *hcd)
55 kfree (hcd_to_ehci (hcd));
58 /*-------------------------------------------------------------------------*/
60 /* Allocate the key transfer structures from the previously allocated pool */
62 static inline void ehci_qtd_init (struct ehci_qtd *qtd, dma_addr_t dma)
64 memset (qtd, 0, sizeof *qtd);
66 qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
67 qtd->hw_next = EHCI_LIST_END;
68 qtd->hw_alt_next = EHCI_LIST_END;
69 INIT_LIST_HEAD (&qtd->qtd_list);
72 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, int flags)
77 qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
79 ehci_qtd_init (qtd, dma);
84 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
86 dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
90 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, int flags)
95 qh = (struct ehci_qh *)
96 dma_pool_alloc (ehci->qh_pool, flags, &dma);
100 memset (qh, 0, sizeof *qh);
101 atomic_set (&qh->refcount, 1);
103 // INIT_LIST_HEAD (&qh->qh_list);
104 INIT_LIST_HEAD (&qh->qtd_list);
106 /* dummy td enables safe urb queuing */
107 qh->dummy = ehci_qtd_alloc (ehci, flags);
108 if (qh->dummy == 0) {
109 ehci_dbg (ehci, "no dummy td\n");
110 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
116 /* to share a qh (cpu threads, or hc) */
117 static inline struct ehci_qh *qh_get (/* ehci, */ struct ehci_qh *qh)
119 atomic_inc (&qh->refcount);
123 static void qh_put (struct ehci_hcd *ehci, struct ehci_qh *qh)
125 if (!atomic_dec_and_test (&qh->refcount))
127 /* clean qtds first, and know this is not linked */
128 if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
129 ehci_dbg (ehci, "unused qh not empty!\n");
133 ehci_qtd_free (ehci, qh->dummy);
134 usb_put_dev (qh->dev);
135 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
138 /*-------------------------------------------------------------------------*/
140 /* The queue heads and transfer descriptors are managed from pools tied
141 * to each of the "per device" structures.
142 * This is the initialisation and cleanup code.
145 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
148 qh_put (ehci, ehci->async);
151 /* DMA consistent memory and pools */
153 dma_pool_destroy (ehci->qtd_pool);
157 dma_pool_destroy (ehci->qh_pool);
162 dma_pool_destroy (ehci->itd_pool);
166 dma_pool_destroy (ehci->sitd_pool);
170 dma_free_coherent (ehci->hcd.self.controller,
171 ehci->periodic_size * sizeof (u32),
172 ehci->periodic, ehci->periodic_dma);
175 /* shadow periodic table */
177 kfree (ehci->pshadow);
181 /* remember to add cleanup code (above) if you add anything here */
182 static int ehci_mem_init (struct ehci_hcd *ehci, int flags)
186 /* QTDs for control/bulk/intr transfers */
187 ehci->qtd_pool = dma_pool_create ("ehci_qtd",
188 ehci->hcd.self.controller,
189 sizeof (struct ehci_qtd),
190 32 /* byte alignment (for hw parts) */,
191 4096 /* can't cross 4K */);
192 if (!ehci->qtd_pool) {
196 /* QHs for control/bulk/intr transfers */
197 ehci->qh_pool = dma_pool_create ("ehci_qh",
198 ehci->hcd.self.controller,
199 sizeof (struct ehci_qh),
200 32 /* byte alignment (for hw parts) */,
201 4096 /* can't cross 4K */);
202 if (!ehci->qh_pool) {
205 ehci->async = ehci_qh_alloc (ehci, flags);
210 /* ITD for high speed ISO transfers */
211 ehci->itd_pool = dma_pool_create ("ehci_itd",
212 ehci->hcd.self.controller,
213 sizeof (struct ehci_itd),
214 32 /* byte alignment (for hw parts) */,
215 4096 /* can't cross 4K */);
216 if (!ehci->itd_pool) {
220 /* SITD for full/low speed split ISO transfers */
221 ehci->sitd_pool = dma_pool_create ("ehci_sitd",
222 ehci->hcd.self.controller,
223 sizeof (struct ehci_sitd),
224 32 /* byte alignment (for hw parts) */,
225 4096 /* can't cross 4K */);
226 if (!ehci->sitd_pool) {
230 /* Hardware periodic table */
231 ehci->periodic = (u32 *)
232 dma_alloc_coherent (ehci->hcd.self.controller,
233 ehci->periodic_size * sizeof (u32),
234 &ehci->periodic_dma, 0);
235 if (ehci->periodic == 0) {
238 for (i = 0; i < ehci->periodic_size; i++)
239 ehci->periodic [i] = EHCI_LIST_END;
241 /* software shadow of hardware table */
242 ehci->pshadow = kmalloc (ehci->periodic_size * sizeof (void *), flags);
243 if (ehci->pshadow == 0) {
246 memset (ehci->pshadow, 0, ehci->periodic_size * sizeof (void *));
251 ehci_dbg (ehci, "couldn't init memory\n");
252 ehci_mem_cleanup (ehci);