1 #ifndef _ASM_M32R_IRQ_H
2 #define _ASM_M32R_IRQ_H
6 #include <linux/config.h>
8 #if defined(CONFIG_PLAT_M32700UT_Alpha) || defined(CONFIG_PLAT_USRV)
10 * IRQ definitions for M32700UT
11 * M32700 Chip: 64 interrupts
12 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
14 #define M32700UT_NUM_CPU_IRQ (64)
15 #define M32700UT_NUM_PLD_IRQ (32)
16 #define M32700UT_IRQ_BASE 0
17 #define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE
18 #define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
20 #define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ)
21 #elif defined(CONFIG_PLAT_M32700UT)
23 * IRQ definitions for M32700UT(Rev.C) + M32R-LAN
24 * M32700 Chip: 64 interrupts
25 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
26 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
27 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
29 #define M32700UT_NUM_CPU_IRQ (64)
30 #define M32700UT_NUM_PLD_IRQ (32)
31 #define M32700UT_NUM_LCD_PLD_IRQ (32)
32 #define M32700UT_NUM_LAN_PLD_IRQ (32)
33 #define M32700UT_IRQ_BASE 0
34 #define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE)
35 #define M32700UT_PLD_IRQ_BASE \
36 (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
37 #define M32700UT_LCD_PLD_IRQ_BASE \
38 (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ)
39 #define M32700UT_LAN_PLD_IRQ_BASE \
40 (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ)
43 (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \
44 + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ)
45 #elif defined(CONFIG_PLAT_OPSPUT)
47 * IRQ definitions for OPSPUT + M32R-LAN
48 * OPSP Chip: 64 interrupts
49 * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
50 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
51 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
53 #define OPSPUT_NUM_CPU_IRQ (64)
54 #define OPSPUT_NUM_PLD_IRQ (32)
55 #define OPSPUT_NUM_LCD_PLD_IRQ (32)
56 #define OPSPUT_NUM_LAN_PLD_IRQ (32)
57 #define OPSPUT_IRQ_BASE 0
58 #define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE)
59 #define OPSPUT_PLD_IRQ_BASE \
60 (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ)
61 #define OPSPUT_LCD_PLD_IRQ_BASE \
62 (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ)
63 #define OPSPUT_LAN_PLD_IRQ_BASE \
64 (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ)
67 (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \
68 + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ)
73 #define irq_canonicalize(irq) (irq)
76 extern void disable_irq(unsigned int);
77 extern void disable_irq_nosync(unsigned int);
78 extern void enable_irq(unsigned int);
82 int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
85 #endif /* _ASM_M32R_IRQ_H */