1 /* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
2 * pgtable.h: SpitFire page table operations.
4 * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 #ifndef _SPARC64_PGTABLE_H
9 #define _SPARC64_PGTABLE_H
11 /* This file contains the functions and defines necessary to modify and use
12 * the SpitFire page tables.
15 #include <linux/config.h>
16 #include <asm/spitfire.h>
18 #include <asm/system.h>
20 #include <asm/processor.h>
22 /* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 16MB).
23 * The page copy blockops use 0x1000000 to 0x18000000 (16MB --> 24MB).
24 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
25 * The vmalloc area spans 0x140000000 to 0x200000000.
26 * There is a single static kernel PMD which maps from 0x0 to address
29 #define TLBTEMP_BASE 0x0000000001000000
30 #define MODULES_VADDR 0x0000000002000000
31 #define MODULES_LEN 0x000000007e000000
32 #define MODULES_END 0x0000000080000000
33 #define VMALLOC_START 0x0000000140000000
34 #define VMALLOC_END 0x0000000200000000
35 #define LOW_OBP_ADDRESS 0x00000000f0000000
36 #define HI_OBP_ADDRESS 0x0000000100000000
38 /* XXX All of this needs to be rethought so we can take advantage
39 * XXX cheetah's full 64-bit virtual address space, ie. no more hole
40 * XXX in the middle like on spitfire. -DaveM
43 * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
44 * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
45 * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
46 * table is a single page long). The next higher PMD_BITS determine pmd#
47 * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
48 * since the pmd entries are 4 bytes, and each pmd page is a single page
49 * long). Finally, the higher few bits determine pgde#.
52 /* PMD_SHIFT determines the size of the area a second-level page table can map */
53 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
54 #define PMD_SIZE (1UL << PMD_SHIFT)
55 #define PMD_MASK (~(PMD_SIZE-1))
58 /* PGDIR_SHIFT determines what a third-level page table entry can map */
59 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
60 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
61 #define PGDIR_MASK (~(PGDIR_SIZE-1))
65 #include <linux/sched.h>
67 /* Certain architectures need to do special things when pte's
68 * within a page table are directly modified. Thus, the following
69 * hook is made available.
71 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
73 /* Entries per page directory level. */
74 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
76 /* We the first one in this file, what we export to the kernel
77 * is different so we can optimize correctly for 32-bit tasks.
79 #define REAL_PTRS_PER_PMD (1UL << PMD_BITS)
80 #define PTRS_PER_PMD ((const int)(test_thread_flag(TIF_32BIT) ? \
81 (1UL << (32 - (PAGE_SHIFT-3) - PAGE_SHIFT)) : (REAL_PTRS_PER_PMD)))
84 * We cannot use the top address range because VPTE table lives there. This
85 * formula finds the total legal virtual space in the processor, subtracts the
86 * vpte size, then aligns it to the number of bytes mapped by one pgde, and
87 * thus calculates the number of pgdes needed.
89 #define PTRS_PER_PGD (((1UL << VA_BITS) - VPTE_SIZE + (1UL << (PAGE_SHIFT + \
90 (PAGE_SHIFT-3) + PMD_BITS)) - 1) / (1UL << (PAGE_SHIFT + \
91 (PAGE_SHIFT-3) + PMD_BITS)))
93 /* Kernel has a separate 44bit address space. */
94 #define USER_PTRS_PER_PGD ((const int)(test_thread_flag(TIF_32BIT)) ? \
96 #define FIRST_USER_PGD_NR 0
98 #define pte_ERROR(e) __builtin_trap()
99 #define pmd_ERROR(e) __builtin_trap()
100 #define pgd_ERROR(e) __builtin_trap()
102 #endif /* !(__ASSEMBLY__) */
104 /* Spitfire/Cheetah TTE bits. */
105 #define _PAGE_VALID 0x8000000000000000 /* Valid TTE */
106 #define _PAGE_R 0x8000000000000000 /* Used to keep ref bit up to date */
107 #define _PAGE_SZ4MB 0x6000000000000000 /* 4MB Page */
108 #define _PAGE_SZ512K 0x4000000000000000 /* 512K Page */
109 #define _PAGE_SZ64K 0x2000000000000000 /* 64K Page */
110 #define _PAGE_SZ8K 0x0000000000000000 /* 8K Page */
111 #define _PAGE_NFO 0x1000000000000000 /* No Fault Only */
112 #define _PAGE_IE 0x0800000000000000 /* Invert Endianness */
113 #define _PAGE_SN 0x0000800000000000 /* (Cheetah) Snoop */
114 #define _PAGE_PADDR_SF 0x000001FFFFFFE000 /* (Spitfire) Phys Address [40:13] */
115 #define _PAGE_PADDR 0x000007FFFFFFE000 /* (Cheetah) Phys Address [42:13] */
116 #define _PAGE_SOFT 0x0000000000001F80 /* Software bits */
117 #define _PAGE_L 0x0000000000000040 /* Locked TTE */
118 #define _PAGE_CP 0x0000000000000020 /* Cacheable in Physical Cache */
119 #define _PAGE_CV 0x0000000000000010 /* Cacheable in Virtual Cache */
120 #define _PAGE_E 0x0000000000000008 /* side-Effect */
121 #define _PAGE_P 0x0000000000000004 /* Privileged Page */
122 #define _PAGE_W 0x0000000000000002 /* Writable */
123 #define _PAGE_G 0x0000000000000001 /* Global */
125 /* Here are the SpitFire software bits we use in the TTE's. */
126 #define _PAGE_FILE 0x0000000000001000 /* Pagecache page */
127 #define _PAGE_MODIFIED 0x0000000000000800 /* Modified Page (ie. dirty) */
128 #define _PAGE_ACCESSED 0x0000000000000400 /* Accessed Page (ie. referenced) */
129 #define _PAGE_READ 0x0000000000000200 /* Readable SW Bit */
130 #define _PAGE_WRITE 0x0000000000000100 /* Writable SW Bit */
131 #define _PAGE_PRESENT 0x0000000000000080 /* Present Page (ie. not swapped out) */
134 #define _PAGE_SZBITS _PAGE_SZ8K
135 #elif PAGE_SHIFT == 16
136 #define _PAGE_SZBITS _PAGE_SZ64K
137 #elif PAGE_SHIFT == 19
138 #define _PAGE_SZBITS _PAGE_SZ512K
139 #elif PAGE_SHIFT == 22
140 #define _PAGE_SZBITS _PAGE_SZ4MB
142 #error Wrong PAGE_SHIFT specified
145 #if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
146 #define _PAGE_SZHUGE _PAGE_SZ4MB
147 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
148 #define _PAGE_SZHUGE _PAGE_SZ512K
149 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
150 #define _PAGE_SZHUGE _PAGE_SZ64K
153 #define _PAGE_CACHE (_PAGE_CP | _PAGE_CV)
155 #define __DIRTY_BITS (_PAGE_MODIFIED | _PAGE_WRITE | _PAGE_W)
156 #define __ACCESS_BITS (_PAGE_ACCESSED | _PAGE_READ | _PAGE_R)
157 #define __PRIV_BITS _PAGE_P
159 #define PAGE_NONE __pgprot (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_CACHE)
161 /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
162 #define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
163 __ACCESS_BITS | _PAGE_WRITE)
165 #define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
168 #define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
171 #define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
172 __PRIV_BITS | __ACCESS_BITS | __DIRTY_BITS)
174 #define _PFN_MASK _PAGE_PADDR
176 #define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | __ACCESS_BITS | _PAGE_E)
178 #define __P000 PAGE_NONE
179 #define __P001 PAGE_READONLY
180 #define __P010 PAGE_COPY
181 #define __P011 PAGE_COPY
182 #define __P100 PAGE_READONLY
183 #define __P101 PAGE_READONLY
184 #define __P110 PAGE_COPY
185 #define __P111 PAGE_COPY
187 #define __S000 PAGE_NONE
188 #define __S001 PAGE_READONLY
189 #define __S010 PAGE_SHARED
190 #define __S011 PAGE_SHARED
191 #define __S100 PAGE_READONLY
192 #define __S101 PAGE_READONLY
193 #define __S110 PAGE_SHARED
194 #define __S111 PAGE_SHARED
198 extern unsigned long phys_base;
199 extern unsigned long pfn_base;
201 extern struct page *mem_map_zero;
202 #define ZERO_PAGE(vaddr) (mem_map_zero)
204 /* PFNs are real physical page numbers. However, mem_map only begins to record
205 * per-page information starting at pfn_base. This is to handle systems where
206 * the first physical page in the machine is at some huge physical address, such
207 * as 4GB. This is common on a partitioned E10000, for example.
210 #define pfn_pte(pfn, prot) \
211 __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot) | _PAGE_SZBITS)
212 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
214 #define pte_pfn(x) ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT)
215 #define pte_page(x) pfn_to_page(pte_pfn(x))
217 #define page_pte_prot(page, prot) mk_pte(page, prot)
218 #define page_pte(page) page_pte_prot(page, __pgprot(0))
220 static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
223 const unsigned long preserve_mask = (_PFN_MASK |
224 _PAGE_MODIFIED | _PAGE_ACCESSED |
225 _PAGE_CACHE | _PAGE_E |
226 _PAGE_PRESENT | _PAGE_SZBITS);
228 pte_val(__pte) = (pte_val(orig_pte) & preserve_mask) |
229 (pgprot_val(new_prot) & ~preserve_mask);
233 #define pmd_set(pmdp, ptep) \
234 (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
235 #define pgd_set(pgdp, pmdp) \
236 (pgd_val(*(pgdp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
237 #define __pmd_page(pmd) \
238 ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
239 #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
240 #define pgd_page(pgd) \
241 ((unsigned long) __va((((unsigned long)pgd_val(pgd))<<11UL)))
242 #define pte_none(pte) (!pte_val(pte))
243 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
244 #define pte_clear(pte) (pte_val(*(pte)) = 0UL)
245 #define pmd_none(pmd) (!pmd_val(pmd))
246 #define pmd_bad(pmd) (0)
247 #define pmd_present(pmd) (pmd_val(pmd) != 0U)
248 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U)
249 #define pgd_none(pgd) (!pgd_val(pgd))
250 #define pgd_bad(pgd) (0)
251 #define pgd_present(pgd) (pgd_val(pgd) != 0U)
252 #define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0U)
254 /* The following only work if pte_present() is true.
255 * Undefined behaviour if not..
257 #define pte_read(pte) (pte_val(pte) & _PAGE_READ)
258 #define pte_exec(pte) pte_read(pte)
259 #define pte_write(pte) (pte_val(pte) & _PAGE_WRITE)
260 #define pte_dirty(pte) (pte_val(pte) & _PAGE_MODIFIED)
261 #define pte_young(pte) (pte_val(pte) & _PAGE_ACCESSED)
262 #define pte_wrprotect(pte) (__pte(pte_val(pte) & ~(_PAGE_WRITE|_PAGE_W)))
263 #define pte_rdprotect(pte) (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_READ))
264 #define pte_mkclean(pte) (__pte(pte_val(pte) & ~(_PAGE_MODIFIED|_PAGE_W)))
265 #define pte_mkold(pte) (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_ACCESSED))
267 /* Permanent address of a page. */
268 #define __page_address(page) page_address(page)
270 /* Be very careful when you change these three, they are delicate. */
271 #define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
272 #define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE))
273 #define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
275 /* to find an entry in a page-table-directory. */
276 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD))
277 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
279 /* to find an entry in a kernel page-table-directory */
280 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
282 /* Find an entry in the second-level page table.. */
283 #define pmd_offset(dir, address) ((pmd_t *) pgd_page(*(dir)) + \
284 ((address >> PMD_SHIFT) & (REAL_PTRS_PER_PMD-1)))
286 /* Find an entry in the third-level page table.. */
287 #define pte_index(dir, address) ((pte_t *) __pmd_page(*(dir)) + \
288 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
289 #define pte_offset_kernel pte_index
290 #define pte_offset_map pte_index
291 #define pte_offset_map_nested pte_index
292 #define pte_unmap(pte) do { } while (0)
293 #define pte_unmap_nested(pte) do { } while (0)
295 extern pgd_t swapper_pg_dir[1];
297 /* These do nothing with the way I have things setup. */
298 #define mmu_lockarea(vaddr, len) (vaddr)
299 #define mmu_unlockarea(vaddr, len) do { } while(0)
301 struct vm_area_struct;
302 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
304 /* Make a non-present pseudo-TTE. */
305 static inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
308 pte_val(pte) = ((page) | pgprot_val(prot) | _PAGE_E) & ~(unsigned long)_PAGE_CACHE;
309 pte_val(pte) |= (((unsigned long)space) << 32);
313 /* Encode and de-code a swap entry */
314 #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
315 #define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL))
316 #define __swp_entry(type, offset) \
319 (((long)(type) << PAGE_SHIFT) | \
320 ((long)(offset) << (PAGE_SHIFT + 8UL))) \
322 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
323 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
325 /* File offset in PTE support. */
326 #define pte_file(pte) (pte_val(pte) & _PAGE_FILE)
327 #define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT)
328 #define pgoff_to_pte(off) (__pte(((off) << PAGE_SHIFT) | _PAGE_FILE))
329 #define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
331 extern unsigned long prom_virt_to_phys(unsigned long, int *);
333 static __inline__ unsigned long
334 sun4u_get_pte (unsigned long addr)
340 if (addr >= PAGE_OFFSET)
341 return addr & _PAGE_PADDR;
342 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
343 return prom_virt_to_phys(addr, 0);
344 pgdp = pgd_offset_k(addr);
345 pmdp = pmd_offset(pgdp, addr);
346 ptep = pte_offset_kernel(pmdp, addr);
347 return pte_val(*ptep) & _PAGE_PADDR;
350 static __inline__ unsigned long
351 __get_phys (unsigned long addr)
353 return sun4u_get_pte (addr);
356 static __inline__ int
357 __get_iospace (unsigned long addr)
359 return ((sun4u_get_pte (addr) & 0xf0000000) >> 28);
362 extern unsigned long *sparc64_valid_addr_bitmap;
364 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
365 #define kern_addr_valid(addr) \
366 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
368 extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from, unsigned long offset,
369 unsigned long size, pgprot_t prot, int space);
371 #include <asm-generic/pgtable.h>
373 /* We provide our own get_unmapped_area to cope with VA holes for userland */
374 #define HAVE_ARCH_UNMAPPED_AREA
376 /* We provide a special get_unmapped_area for framebuffer mmaps to try and use
377 * the largest alignment possible such that larget PTEs can be used.
379 extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, unsigned long, unsigned long, unsigned long);
380 #define HAVE_ARCH_FB_UNMAPPED_AREA
383 * No page table caches to initialise
385 #define pgtable_cache_init() do { } while (0)
387 extern void check_pgt_cache(void);
389 typedef pte_t *pte_addr_t;
391 #endif /* !(__ASSEMBLY__) */
393 #endif /* !(_SPARC64_PGTABLE_H) */