2 * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP MC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
42 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
45 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
47 module_param_array(index, int, NULL, 0444);
48 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
49 module_param_array(id, charp, NULL, 0444);
50 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
51 module_param_array(enable, bool, NULL, 0444);
52 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
53 module_param_array(ac97_clock, int, NULL, 0444);
54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
60 #define ATI_REG_ISR 0x00 /* interrupt source */
61 #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
62 #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
63 #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
64 #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
65 #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
66 #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
67 #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
68 #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
69 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
70 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
71 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
72 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
73 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
74 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
75 #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
77 #define ATI_REG_IER 0x04 /* interrupt enable */
78 #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
79 #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
80 #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
81 #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
82 #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
83 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
84 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
85 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
86 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
87 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
88 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
89 #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
90 #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
92 #define ATI_REG_CMD 0x08 /* command */
93 #define ATI_REG_CMD_POWERDOWN (1U<<0)
94 #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
95 #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
96 #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
97 #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
98 #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
99 #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
100 #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
101 #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
102 #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
103 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
104 #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
105 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
106 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
107 #define ATI_REG_CMD_BURST_EN (1U<<25)
108 #define ATI_REG_CMD_PANIC_EN (1U<<26)
109 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
110 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
111 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
112 #define ATI_REG_CMD_AC_SYNC (1U<<30)
113 #define ATI_REG_CMD_AC_RESET (1U<<31)
115 #define ATI_REG_PHYS_OUT_ADDR 0x0c
116 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
117 #define ATI_REG_PHYS_OUT_RW (1U<<2)
118 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
119 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
120 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
122 #define ATI_REG_PHYS_IN_ADDR 0x10
123 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
124 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
125 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
127 #define ATI_REG_SLOTREQ 0x14
129 #define ATI_REG_COUNTER 0x18
130 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
131 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
133 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
135 #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
136 #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
137 #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
138 #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
139 #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
140 #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
141 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
142 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
143 #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
144 #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
145 #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
146 #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
147 #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
148 #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
149 #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
150 #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
151 #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
152 #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
153 #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
154 #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
155 #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
156 #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
157 #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
158 #define ATI_REG_MODEM_OUT_GPIO 0x74
159 #define ATI_REG_MODEM_OUT_GPIO_EN 1
160 #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
161 #define ATI_REG_MODEM_IN_GPIO 0x78
163 #define ATI_REG_MODEM_MIRROR 0x7c
164 #define ATI_REG_AUDIO_MIRROR 0x80
166 #define ATI_REG_MODEM_FIFO_FLUSH 0x88
167 #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
168 #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
169 #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
170 #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
173 #define ATI_REG_LINKPTR_EN (1U<<0)
175 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
181 typedef struct snd_atiixp atiixp_t;
182 typedef struct snd_atiixp_dma atiixp_dma_t;
183 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
187 * DMA packate descriptor
190 typedef struct atiixp_dma_desc {
191 u32 addr; /* DMA buffer address */
192 u16 status; /* status bits */
193 u16 size; /* size of the packet in dwords */
194 u32 next; /* address of the next packet descriptor */
200 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
201 enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
202 enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
204 #define NUM_ATI_CODECS 3
208 * constants and callbacks for each DMA type
210 struct snd_atiixp_dma_ops {
211 int type; /* ATI_DMA_XXX */
212 unsigned int llp_offset; /* LINKPTR offset */
213 unsigned int dt_cur; /* DT_CUR offset */
214 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
215 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
216 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
222 struct snd_atiixp_dma {
223 const atiixp_dma_ops_t *ops;
224 struct snd_dma_buffer desc_buf;
225 snd_pcm_substream_t *substream; /* assigned PCM substream */
226 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
227 unsigned int period_bytes, periods;
231 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
241 struct resource *res; /* memory i/o */
243 void __iomem *remap_addr;
246 ac97_bus_t *ac97_bus;
247 ac97_t *ac97[NUM_ATI_CODECS];
250 spinlock_t ac97_lock;
252 atiixp_dma_t dmas[NUM_ATI_DMAS];
253 struct ac97_pcm *pcms[NUM_ATI_PCMS];
254 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
256 int max_channels; /* max. channels for PCM out */
258 unsigned int codec_not_ready_bits; /* for codec detection */
260 int spdif_over_aclink; /* passed from the module option */
261 struct semaphore open_mutex; /* playback open mutex */
267 static struct pci_device_id snd_atiixp_ids[] = {
268 { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
272 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
280 * update the bits of the given register.
281 * return 1 if the bits changed.
283 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
284 unsigned int mask, unsigned int value)
286 void __iomem *addr = chip->remap_addr + reg;
287 unsigned int data, old_data;
288 old_data = data = readl(addr);
291 if (old_data == data)
298 * macros for easy use
300 #define atiixp_write(chip,reg,value) \
301 writel(value, chip->remap_addr + ATI_REG_##reg)
302 #define atiixp_read(chip,reg) \
303 readl(chip->remap_addr + ATI_REG_##reg)
304 #define atiixp_update(chip,reg,mask,val) \
305 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
307 /* delay for one tick */
308 #define do_delay() do { \
309 set_current_state(TASK_UNINTERRUPTIBLE); \
310 schedule_timeout(1); \
315 * handling DMA packets
317 * we allocate a linear buffer for the DMA, and split it to each packet.
318 * in a future version, a scatter-gather buffer should be implemented.
321 #define ATI_DESC_LIST_SIZE \
322 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
325 * build packets ring for the given buffer size.
327 * IXP handles the buffer descriptors, which are connected as a linked
328 * list. although we can change the list dynamically, in this version,
329 * a static RING of buffer descriptors is used.
331 * the ring is built in this function, and is set up to the hardware.
333 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
334 snd_pcm_substream_t *substream,
335 unsigned int periods,
336 unsigned int period_bytes)
342 if (periods > ATI_MAX_DESCRIPTORS)
345 if (dma->desc_buf.area == NULL) {
346 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
347 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
349 dma->period_bytes = dma->periods = 0; /* clear */
352 if (dma->periods == periods && dma->period_bytes == period_bytes)
355 /* reset DMA before changing the descriptor table */
356 spin_lock_irqsave(&chip->reg_lock, flags);
357 writel(0, chip->remap_addr + dma->ops->llp_offset);
358 dma->ops->enable_dma(chip, 0);
359 dma->ops->enable_dma(chip, 1);
360 spin_unlock_irqrestore(&chip->reg_lock, flags);
362 /* fill the entries */
363 addr = (u32)substream->runtime->dma_addr;
364 desc_addr = (u32)dma->desc_buf.addr;
365 for (i = 0; i < periods; i++) {
366 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
367 desc->addr = cpu_to_le32(addr);
369 desc->size = period_bytes >> 2; /* in dwords */
370 desc_addr += sizeof(atiixp_dma_desc_t);
371 if (i == periods - 1)
372 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
374 desc->next = cpu_to_le32(desc_addr);
375 addr += period_bytes;
378 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
379 chip->remap_addr + dma->ops->llp_offset);
381 dma->period_bytes = period_bytes;
382 dma->periods = periods;
388 * remove the ring buffer and release it if assigned
390 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
392 if (dma->desc_buf.area) {
393 writel(0, chip->remap_addr + dma->ops->llp_offset);
394 snd_dma_free_pages(&dma->desc_buf);
395 dma->desc_buf.area = NULL;
402 static int snd_atiixp_acquire_codec(atiixp_t *chip)
406 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
408 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
416 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
421 if (snd_atiixp_acquire_codec(chip) < 0)
423 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
424 ATI_REG_PHYS_OUT_ADDR_EN |
425 ATI_REG_PHYS_OUT_RW |
427 atiixp_write(chip, PHYS_OUT_ADDR, data);
428 if (snd_atiixp_acquire_codec(chip) < 0)
432 data = atiixp_read(chip, PHYS_IN_ADDR);
433 if (data & ATI_REG_PHYS_IN_READ_FLAG)
434 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
437 /* time out may happen during reset */
439 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
444 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
448 if (snd_atiixp_acquire_codec(chip) < 0)
450 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
451 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
452 ATI_REG_PHYS_OUT_ADDR_EN | codec;
453 atiixp_write(chip, PHYS_OUT_ADDR, data);
457 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
459 atiixp_t *chip = ac97->private_data;
461 spin_lock(&chip->ac97_lock);
462 data = snd_atiixp_codec_read(chip, ac97->num, reg);
463 spin_unlock(&chip->ac97_lock);
468 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
470 atiixp_t *chip = ac97->private_data;
471 spin_lock(&chip->ac97_lock);
472 snd_atiixp_codec_write(chip, ac97->num, reg, val);
473 spin_unlock(&chip->ac97_lock);
479 static int snd_atiixp_aclink_reset(atiixp_t *chip)
483 /* reset powerdoewn */
484 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
487 /* perform a software reset */
488 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
489 atiixp_read(chip, CMD);
491 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
494 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
495 /* do a hard reset */
496 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
497 ATI_REG_CMD_AC_SYNC);
498 atiixp_read(chip, CMD);
500 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
502 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
507 /* deassert RESET and assert SYNC to make sure */
508 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
509 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
515 static int snd_atiixp_aclink_down(atiixp_t *chip)
517 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
519 atiixp_update(chip, CMD,
520 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
521 ATI_REG_CMD_POWERDOWN);
527 * auto-detection of codecs
529 * the IXP chip can generate interrupts for the non-existing codecs.
530 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
531 * even if all three codecs are connected.
534 #define ALL_CODEC_NOT_READY \
535 (ATI_REG_ISR_CODEC0_NOT_READY |\
536 ATI_REG_ISR_CODEC1_NOT_READY |\
537 ATI_REG_ISR_CODEC2_NOT_READY)
538 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
540 static int snd_atiixp_codec_detect(atiixp_t *chip)
544 chip->codec_not_ready_bits = 0;
545 atiixp_write(chip, IER, CODEC_CHECK_BITS);
546 /* wait for the interrupts */
548 while (timeout-- > 0) {
550 if (chip->codec_not_ready_bits)
553 atiixp_write(chip, IER, 0); /* disable irqs */
555 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
556 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
564 * enable DMA and irqs
566 static int snd_atiixp_chip_start(atiixp_t *chip)
570 /* set up spdif, enable burst mode */
571 reg = atiixp_read(chip, CMD);
572 reg |= ATI_REG_CMD_BURST_EN;
573 if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
574 reg |= ATI_REG_CMD_MODEM_PRESENT;
575 atiixp_write(chip, CMD, reg);
577 /* clear all interrupt source */
578 atiixp_write(chip, ISR, 0xffffffff);
580 atiixp_write(chip, IER,
581 ATI_REG_IER_MODEM_STATUS_EN |
582 ATI_REG_IER_MODEM_IN_XRUN_EN |
583 ATI_REG_IER_MODEM_OUT1_XRUN_EN);
589 * disable DMA and IRQs
591 static int snd_atiixp_chip_stop(atiixp_t *chip)
593 /* clear interrupt source */
594 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
596 atiixp_write(chip, IER, 0);
606 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
607 * position. when SG-buffer is implemented, the offset must be calculated
610 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
612 atiixp_t *chip = snd_pcm_substream_chip(substream);
613 snd_pcm_runtime_t *runtime = substream->runtime;
614 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
617 spin_lock(&chip->reg_lock);
618 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
619 if (curptr < dma->buf_addr) {
620 snd_printdd("curptr = %x, base = %x\n", curptr, dma->buf_addr);
623 curptr -= dma->buf_addr;
624 if (curptr >= dma->buf_bytes) {
625 snd_printdd("curptr = %x, size = %x\n", curptr, dma->buf_bytes);
629 spin_unlock(&chip->reg_lock);
630 return bytes_to_frames(runtime, curptr);
634 * XRUN detected, and stop the PCM substream
636 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
638 if (! dma->substream || ! dma->running)
640 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
641 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
645 * the period ack. update the substream.
647 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
649 if (! dma->substream || ! dma->running)
651 snd_pcm_period_elapsed(dma->substream);
654 /* set BUS_BUSY interrupt bit if any DMA is running */
655 /* call with spinlock held */
656 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
658 unsigned int bus_busy;
659 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
660 ATI_REG_CMD_MODEM_RECEIVE_EN))
661 bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
664 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
667 /* common trigger callback
668 * calling the lowlevel callbacks in it
670 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
672 atiixp_t *chip = snd_pcm_substream_chip(substream);
673 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
674 unsigned int reg = 0;
677 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
679 if (cmd != SNDRV_PCM_TRIGGER_START && cmd != SNDRV_PCM_TRIGGER_STOP)
682 spin_lock(&chip->reg_lock);
684 /* hook off/on: via GPIO_OUT */
685 for (i = 0; i < NUM_ATI_CODECS; i++) {
687 reg = snd_ac97_read(chip->ac97[i], AC97_GPIO_STATUS);
691 if(cmd == SNDRV_PCM_TRIGGER_START)
692 reg |= AC97_GPIO_LINE1_OH;
694 reg &= ~AC97_GPIO_LINE1_OH;
695 reg = (reg << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN ;
696 atiixp_write(chip, MODEM_OUT_GPIO, reg);
698 if (cmd == SNDRV_PCM_TRIGGER_START) {
699 dma->ops->enable_transfer(chip, 1);
702 dma->ops->enable_transfer(chip, 0);
705 snd_atiixp_check_bus_busy(chip);
706 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
707 dma->ops->flush_dma(chip);
708 snd_atiixp_check_bus_busy(chip);
710 spin_unlock(&chip->reg_lock);
716 * lowlevel callbacks for each DMA type
718 * every callback is supposed to be called in chip->reg_lock spinlock
721 /* flush FIFO of analog OUT DMA */
722 static void atiixp_out_flush_dma(atiixp_t *chip)
724 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
727 /* enable/disable analog OUT DMA */
728 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
731 data = atiixp_read(chip, CMD);
733 if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
735 atiixp_out_flush_dma(chip);
736 data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
738 data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
739 atiixp_write(chip, CMD, data);
742 /* start/stop transfer over OUT DMA */
743 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
745 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
746 on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
749 /* enable/disable analog IN DMA */
750 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
752 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
753 on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
756 /* start/stop analog IN DMA */
757 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
760 unsigned int data = atiixp_read(chip, CMD);
761 if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
762 data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
763 atiixp_write(chip, CMD, data);
766 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
769 /* flush FIFO of analog IN DMA */
770 static void atiixp_in_flush_dma(atiixp_t *chip)
772 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
775 /* set up slots and formats for analog OUT */
776 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
778 atiixp_t *chip = snd_pcm_substream_chip(substream);
781 spin_lock_irq(&chip->reg_lock);
782 /* set output threshold */
783 data = atiixp_read(chip, MODEM_OUT_FIFO);
784 data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
785 data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
786 atiixp_write(chip, MODEM_OUT_FIFO, data);
787 spin_unlock_irq(&chip->reg_lock);
791 /* set up slots and formats for analog IN */
792 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
798 * hw_params - allocate the buffer and set up buffer descriptors
800 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
801 snd_pcm_hw_params_t *hw_params)
803 atiixp_t *chip = snd_pcm_substream_chip(substream);
804 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
808 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
811 dma->buf_addr = substream->runtime->dma_addr;
812 dma->buf_bytes = params_buffer_bytes(hw_params);
814 err = atiixp_build_dma_packets(chip, dma, substream,
815 params_periods(hw_params),
816 params_period_bytes(hw_params));
820 /* set up modem rate */
821 for (i = 0; i < NUM_ATI_CODECS; i++) {
824 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
825 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
831 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
833 atiixp_t *chip = snd_pcm_substream_chip(substream);
834 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
836 atiixp_clear_dma_packets(chip, dma, substream);
837 snd_pcm_lib_free_pages(substream);
843 * pcm hardware definition, identical for all DMA types
845 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
847 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
848 SNDRV_PCM_INFO_BLOCK_TRANSFER |
849 SNDRV_PCM_INFO_MMAP_VALID),
850 .formats = SNDRV_PCM_FMTBIT_S16_LE,
851 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
856 .buffer_bytes_max = 256 * 1024,
857 .period_bytes_min = 32,
858 .period_bytes_max = 128 * 1024,
860 .periods_max = ATI_MAX_DESCRIPTORS,
863 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
865 atiixp_t *chip = snd_pcm_substream_chip(substream);
866 snd_pcm_runtime_t *runtime = substream->runtime;
868 static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
869 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
870 .count = ARRAY_SIZE(rates),
875 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
879 dma->substream = substream;
880 runtime->hw = snd_atiixp_pcm_hw;
881 dma->ac97_pcm_type = pcm_type;
882 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
884 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
886 runtime->private_data = dma;
888 /* enable DMA bits */
889 spin_lock_irq(&chip->reg_lock);
890 dma->ops->enable_dma(chip, 1);
891 spin_unlock_irq(&chip->reg_lock);
897 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
899 atiixp_t *chip = snd_pcm_substream_chip(substream);
900 /* disable DMA bits */
901 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
902 spin_lock_irq(&chip->reg_lock);
903 dma->ops->enable_dma(chip, 0);
904 spin_unlock_irq(&chip->reg_lock);
905 dma->substream = NULL;
912 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
914 atiixp_t *chip = snd_pcm_substream_chip(substream);
917 down(&chip->open_mutex);
918 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
919 up(&chip->open_mutex);
925 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
927 atiixp_t *chip = snd_pcm_substream_chip(substream);
929 down(&chip->open_mutex);
930 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
931 up(&chip->open_mutex);
935 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
937 atiixp_t *chip = snd_pcm_substream_chip(substream);
938 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
941 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
943 atiixp_t *chip = snd_pcm_substream_chip(substream);
944 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
949 static snd_pcm_ops_t snd_atiixp_playback_ops = {
950 .open = snd_atiixp_playback_open,
951 .close = snd_atiixp_playback_close,
952 .ioctl = snd_pcm_lib_ioctl,
953 .hw_params = snd_atiixp_pcm_hw_params,
954 .hw_free = snd_atiixp_pcm_hw_free,
955 .prepare = snd_atiixp_playback_prepare,
956 .trigger = snd_atiixp_pcm_trigger,
957 .pointer = snd_atiixp_pcm_pointer,
961 static snd_pcm_ops_t snd_atiixp_capture_ops = {
962 .open = snd_atiixp_capture_open,
963 .close = snd_atiixp_capture_close,
964 .ioctl = snd_pcm_lib_ioctl,
965 .hw_params = snd_atiixp_pcm_hw_params,
966 .hw_free = snd_atiixp_pcm_hw_free,
967 .prepare = snd_atiixp_capture_prepare,
968 .trigger = snd_atiixp_pcm_trigger,
969 .pointer = snd_atiixp_pcm_pointer,
972 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
973 .type = ATI_DMA_PLAYBACK,
974 .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
975 .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
976 .enable_dma = atiixp_out_enable_dma,
977 .enable_transfer = atiixp_out_enable_transfer,
978 .flush_dma = atiixp_out_flush_dma,
981 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
982 .type = ATI_DMA_CAPTURE,
983 .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
984 .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
985 .enable_dma = atiixp_in_enable_dma,
986 .enable_transfer = atiixp_in_enable_transfer,
987 .flush_dma = atiixp_in_flush_dma,
990 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
995 /* initialize constants */
996 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
997 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
999 /* PCM #0: analog I/O */
1000 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1003 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1004 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1005 pcm->private_data = chip;
1006 strcpy(pcm->name, "ATI IXP MC97");
1007 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1009 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1010 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1020 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1022 atiixp_t *chip = dev_id;
1023 unsigned int status;
1025 status = atiixp_read(chip, ISR);
1030 /* process audio DMA */
1031 if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
1032 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1033 else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
1034 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1035 if (status & ATI_REG_ISR_MODEM_IN_XRUN)
1036 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1037 else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
1038 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1040 /* for codec detection */
1041 if (status & CODEC_CHECK_BITS) {
1042 unsigned int detected;
1043 detected = status & CODEC_CHECK_BITS;
1044 spin_lock(&chip->reg_lock);
1045 chip->codec_not_ready_bits |= detected;
1046 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1047 spin_unlock(&chip->reg_lock);
1051 atiixp_write(chip, ISR, status);
1058 * ac97 mixer section
1061 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1064 ac97_template_t ac97;
1067 static ac97_bus_ops_t ops = {
1068 .write = snd_atiixp_ac97_write,
1069 .read = snd_atiixp_ac97_read,
1071 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1072 ATI_REG_ISR_CODEC0_NOT_READY,
1073 ATI_REG_ISR_CODEC1_NOT_READY,
1074 ATI_REG_ISR_CODEC2_NOT_READY,
1077 if (snd_atiixp_codec_detect(chip) < 0)
1080 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1082 pbus->clock = clock;
1083 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with audio driver */
1084 chip->ac97_bus = pbus;
1087 for (i = 0; i < NUM_ATI_CODECS; i++) {
1088 if (chip->codec_not_ready_bits & codec_skip[i])
1090 memset(&ac97, 0, sizeof(ac97));
1091 ac97.private_data = chip;
1092 ac97.pci = chip->pci;
1094 ac97.scaps = AC97_SCAP_SKIP_AUDIO;
1095 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1096 chip->ac97[i] = NULL; /* to be sure */
1097 snd_printdd("atiixp: codec %d not available for modem\n", i);
1103 if (! codec_count) {
1104 snd_printk(KERN_ERR "atiixp: no codec available\n");
1108 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1118 static int snd_atiixp_suspend(snd_card_t *card, unsigned int state)
1120 atiixp_t *chip = card->pm_private_data;
1123 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1124 if (chip->pcmdevs[i])
1125 snd_pcm_suspend_all(chip->pcmdevs[i]);
1126 for (i = 0; i < NUM_ATI_CODECS; i++)
1128 snd_ac97_suspend(chip->ac97[i]);
1129 snd_atiixp_aclink_down(chip);
1130 snd_atiixp_chip_stop(chip);
1132 pci_set_power_state(chip->pci, 3);
1133 pci_disable_device(chip->pci);
1134 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1138 static int snd_atiixp_resume(snd_card_t *card, unsigned int state)
1140 atiixp_t *chip = card->pm_private_data;
1143 pci_enable_device(chip->pci);
1144 pci_set_power_state(chip->pci, 0);
1145 pci_set_master(chip->pci);
1147 snd_atiixp_aclink_reset(chip);
1148 snd_atiixp_chip_start(chip);
1150 for (i = 0; i < NUM_ATI_CODECS; i++)
1152 snd_ac97_resume(chip->ac97[i]);
1154 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1157 #endif /* CONFIG_PM */
1161 * proc interface for register dump
1164 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1166 atiixp_t *chip = entry->private_data;
1169 for (i = 0; i < 256; i += 4)
1170 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1173 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1175 snd_info_entry_t *entry;
1177 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1178 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1187 static int snd_atiixp_free(atiixp_t *chip)
1191 snd_atiixp_chip_stop(chip);
1192 synchronize_irq(chip->irq);
1195 free_irq(chip->irq, (void *)chip);
1196 if (chip->remap_addr)
1197 iounmap(chip->remap_addr);
1198 pci_release_regions(chip->pci);
1199 pci_disable_device(chip->pci);
1204 static int snd_atiixp_dev_free(snd_device_t *device)
1206 atiixp_t *chip = device->device_data;
1207 return snd_atiixp_free(chip);
1211 * constructor for chip instance
1213 static int __devinit snd_atiixp_create(snd_card_t *card,
1214 struct pci_dev *pci,
1217 static snd_device_ops_t ops = {
1218 .dev_free = snd_atiixp_dev_free,
1223 if ((err = pci_enable_device(pci)) < 0)
1226 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1228 pci_disable_device(pci);
1232 spin_lock_init(&chip->reg_lock);
1233 spin_lock_init(&chip->ac97_lock);
1234 init_MUTEX(&chip->open_mutex);
1238 if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
1240 pci_disable_device(pci);
1243 chip->addr = pci_resource_start(pci, 0);
1244 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1245 if (chip->remap_addr == NULL) {
1246 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1247 snd_atiixp_free(chip);
1251 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1252 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1253 snd_atiixp_free(chip);
1256 chip->irq = pci->irq;
1257 pci_set_master(pci);
1258 synchronize_irq(chip->irq);
1260 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1261 snd_atiixp_free(chip);
1265 snd_card_set_dev(card, &pci->dev);
1272 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1273 const struct pci_device_id *pci_id)
1278 unsigned char revision;
1281 if (dev >= SNDRV_CARDS)
1288 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1292 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1294 strcpy(card->driver, "ATIIXP-MODEM");
1295 strcpy(card->shortname, "ATI IXP Modem");
1296 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1299 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1302 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1305 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1308 snd_atiixp_proc_init(chip);
1310 snd_atiixp_chip_start(chip);
1312 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1313 card->shortname, revision, chip->addr, chip->irq);
1315 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1317 if ((err = snd_card_register(card)) < 0)
1320 pci_set_drvdata(pci, card);
1325 snd_card_free(card);
1329 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1331 snd_card_free(pci_get_drvdata(pci));
1332 pci_set_drvdata(pci, NULL);
1335 static struct pci_driver driver = {
1336 .name = "ATI IXP MC97 controller",
1337 .id_table = snd_atiixp_ids,
1338 .probe = snd_atiixp_probe,
1339 .remove = __devexit_p(snd_atiixp_remove),
1340 SND_PCI_PM_CALLBACKS
1344 static int __init alsa_card_atiixp_init(void)
1346 return pci_module_init(&driver);
1349 static void __exit alsa_card_atiixp_exit(void)
1351 pci_unregister_driver(&driver);
1354 module_init(alsa_card_atiixp_init)
1355 module_exit(alsa_card_atiixp_exit)