2 * ALSA driver for RME Digi9652 audio interfaces
4 * Copyright (c) 1999 IEM - Winfried Ritsch
5 * Copyright (c) 1999-2001 Paul Davis
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
30 #include <sound/core.h>
31 #include <sound/control.h>
32 #include <sound/pcm.h>
33 #include <sound/info.h>
34 #include <sound/asoundef.h>
36 #include <sound/initval.h>
38 #include <asm/current.h>
41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
44 static int precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */
46 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
47 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
48 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
49 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s");
50 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
51 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
52 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
53 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
54 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
55 MODULE_PARM(precise_ptr, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
56 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
57 MODULE_PARM_SYNTAX(precise_ptr, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
58 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
59 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
60 MODULE_LICENSE("GPL");
61 MODULE_CLASSES("{sound}");
62 MODULE_DEVICES("{{RME,Hammerfall},"
63 "{RME,Hammerfall-Light}}");
65 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
66 capture, one for playback. Both the ADAT and S/PDIF channels appear
67 to the host CPU in the same block of memory. There is no functional
68 difference between them in terms of access.
70 The Hammerfall Light is identical to the Hammerfall, except that it
71 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
74 #define RME9652_NCHANNELS 26
75 #define RME9636_NCHANNELS 18
77 /* Preferred sync source choices - used by "sync_pref" control switch */
79 #define RME9652_SYNC_FROM_SPDIF 0
80 #define RME9652_SYNC_FROM_ADAT1 1
81 #define RME9652_SYNC_FROM_ADAT2 2
82 #define RME9652_SYNC_FROM_ADAT3 3
84 /* Possible sources of S/PDIF input */
86 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
87 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
88 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
90 /* ------------- Status-Register bits --------------------- */
92 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
93 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
94 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
95 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
96 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
97 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
98 /* bits 6-15 encode h/w buffer pointer position */
99 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
100 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
101 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
102 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
103 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
104 #define RME9652_tc_out (1<<21) /* time-code out bit */
105 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
106 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
107 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
108 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
109 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
110 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
111 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
113 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
114 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
115 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
116 #define rme9652_decode_spdif_rate(x) ((x)>>22)
118 /* Bit 6..15 : h/w buffer pointer */
120 #define RME9652_buf_pos 0x000FFC0
122 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
123 Rev G EEPROMS and Rev 1.5 cards or later.
126 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
128 #ifndef PCI_VENDOR_ID_XILINX
129 #define PCI_VENDOR_ID_XILINX 0x10ee
131 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL
132 #define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
135 /* amount of io space we remap for register access. i'm not sure we
136 even need this much, but 1K is nice round number :)
139 #define RME9652_IO_EXTENT 1024
141 #define RME9652_init_buffer 0
142 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
143 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
144 #define RME9652_control_register 64
145 #define RME9652_irq_clear 96
146 #define RME9652_time_code 100 /* useful if used with alesis adat */
147 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
149 /* Read-only registers */
151 /* Writing to any of the register locations writes to the status
152 register. We'll use the first location as our point of access.
155 #define RME9652_status_register 0
157 /* --------- Control-Register Bits ---------------- */
160 #define RME9652_start_bit (1<<0) /* start record/play */
161 /* bits 1-3 encode buffersize/latency */
162 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
163 #define RME9652_IE (1<<5) /* Interupt Enable */
164 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
165 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
166 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
167 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
168 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
169 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
170 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
171 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
172 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
173 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
174 #define RME9652_SyncPref_ADAT2 (1<<16)
175 #define RME9652_SyncPref_ADAT3 (1<<17)
176 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
177 #define RME9652_SPDIF_SELECT (1<<19)
178 #define RME9652_SPDIF_CLOCK (1<<20)
179 #define RME9652_SPDIF_WRITE (1<<21)
180 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
182 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
184 #define RME9652_latency 0x0e
185 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
186 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
187 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
188 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
189 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
190 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
192 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
193 #define RME9652_SyncPref_ADAT1 0
194 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
196 /* the size of a substream (1 mono data stream) */
198 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
199 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
201 /* the size of the area we need to allocate for DMA transfers. the
202 size is the same regardless of the number of channels - the
203 9636 still uses the same memory area.
205 Note that we allocate 1 more channel than is apparently needed
206 because the h/w seems to write 1 byte beyond the end of the last
210 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
211 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
213 typedef struct snd_rme9652 {
219 struct resource *res_port;
220 unsigned long iobase;
224 u32 control_register; /* cached value */
225 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
228 u32 creg_spdif_stream;
230 char *card_name; /* hammerfall or hammerfall light names */
232 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
233 size_t prev_hw_offset; /* previous hw offset */
234 size_t max_jitter; /* maximum jitter in frames for
236 size_t period_bytes; /* guess what this is */
238 unsigned char ds_channels;
239 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
241 void *capture_buffer_unaligned; /* original buffer addresses */
242 void *playback_buffer_unaligned; /* original buffer addresses */
243 unsigned char *capture_buffer; /* suitably aligned address */
244 unsigned char *playback_buffer; /* suitably aligned address */
245 dma_addr_t capture_buffer_addr;
246 dma_addr_t playback_buffer_addr;
251 snd_pcm_substream_t *capture_substream;
252 snd_pcm_substream_t *playback_substream;
255 int passthru; /* non-zero if doing pass-thru */
256 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
258 int last_spdif_sample_rate; /* so that we can catch externally ... */
259 int last_adat_sample_rate; /* ... induced rate changes */
266 snd_kcontrol_t *spdif_ctl;
270 /* These tables map the ALSA channels 1..N to the channels that we
271 need to use in order to find the relevant channel buffer. RME
272 refer to this kind of mapping as between "the ADAT channel and
273 the DMA channel." We index it using the logical audio channel,
274 and the value is the DMA channel (i.e. channel buffer number)
275 where the data for that channel can be read/written from/to.
278 static char channel_map_9652_ss[26] = {
279 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
280 18, 19, 20, 21, 22, 23, 24, 25
283 static char channel_map_9636_ss[26] = {
284 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
285 /* channels 16 and 17 are S/PDIF */
287 /* channels 18-25 don't exist */
288 -1, -1, -1, -1, -1, -1, -1, -1
291 static char channel_map_9652_ds[26] = {
292 /* ADAT channels are remapped */
293 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
294 /* channels 12 and 13 are S/PDIF */
296 /* others don't exist */
297 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
300 static char channel_map_9636_ds[26] = {
301 /* ADAT channels are remapped */
302 1, 3, 5, 7, 9, 11, 13, 15,
303 /* channels 8 and 9 are S/PDIF */
305 /* others don't exist */
306 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
309 #define RME9652_PREALLOCATE_MEMORY /* via module snd-hammerfall-mem */
311 #ifdef RME9652_PREALLOCATE_MEMORY
312 static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
314 struct snd_dma_device pdev;
315 struct snd_dma_buffer dmbuf;
317 memset(&pdev, 0, sizeof(pdev));
318 pdev.type = SNDRV_DMA_TYPE_DEV;
319 pdev.dev = snd_dma_pci_data(pci);
322 if (! snd_dma_get_reserved(&pdev, &dmbuf)) {
323 if (snd_dma_alloc_pages(&pdev, size, &dmbuf) < 0)
325 snd_dma_set_reserved(&pdev, &dmbuf);
331 static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
333 struct snd_dma_device pdev;
335 memset(&pdev, 0, sizeof(pdev));
336 pdev.type = SNDRV_DMA_TYPE_DEV;
337 pdev.dev = snd_dma_pci_data(pci);
339 snd_dma_free_reserved(&pdev);
343 static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
345 return snd_malloc_pci_pages(pci, size, addrp);
348 static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
350 snd_free_pci_pages(pci, size, ptr, addr);
354 static struct pci_device_id snd_rme9652_ids[] = {
358 .subvendor = PCI_ANY_ID,
359 .subdevice = PCI_ANY_ID,
360 }, /* RME Digi9652 */
364 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
366 static inline void rme9652_write(rme9652_t *rme9652, int reg, int val)
368 writel(val, rme9652->iobase + reg);
371 static inline unsigned int rme9652_read(rme9652_t *rme9652, int reg)
373 return readl(rme9652->iobase + reg);
376 static inline int snd_rme9652_use_is_exclusive(rme9652_t *rme9652)
381 spin_lock_irqsave(&rme9652->lock, flags);
382 if ((rme9652->playback_pid != rme9652->capture_pid) &&
383 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
386 spin_unlock_irqrestore(&rme9652->lock, flags);
390 static inline int rme9652_adat_sample_rate(rme9652_t *rme9652)
392 if (rme9652_running_double_speed(rme9652)) {
393 return (rme9652_read(rme9652, RME9652_status_register) &
394 RME9652_fs48) ? 96000 : 88200;
396 return (rme9652_read(rme9652, RME9652_status_register) &
397 RME9652_fs48) ? 48000 : 44100;
401 static inline void rme9652_compute_period_size(rme9652_t *rme9652)
405 i = rme9652->control_register & RME9652_latency;
406 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
407 rme9652->hw_offsetmask =
408 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
409 rme9652->max_jitter = 80;
412 static snd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652)
415 unsigned int offset, frag;
416 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
417 snd_pcm_sframes_t delta;
419 status = rme9652_read(rme9652, RME9652_status_register);
420 if (!rme9652->precise_ptr)
421 return (status & RME9652_buffer_id) ? period_size : 0;
422 offset = status & RME9652_buf_pos;
424 /* The hardware may give a backward movement for up to 80 frames
425 Martin Kirst <martin.kirst@freenet.de> knows the details.
428 delta = rme9652->prev_hw_offset - offset;
430 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
431 offset = rme9652->prev_hw_offset;
433 rme9652->prev_hw_offset = offset;
434 offset &= rme9652->hw_offsetmask;
436 frag = status & RME9652_buffer_id;
438 if (offset < period_size) {
439 if (offset > rme9652->max_jitter) {
441 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
444 offset -= rme9652->max_jitter;
446 offset += period_size * 2;
448 if (offset > period_size + rme9652->max_jitter) {
450 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
453 offset -= rme9652->max_jitter;
459 static inline void rme9652_reset_hw_pointer(rme9652_t *rme9652)
463 /* reset the FIFO pointer to zero. We do this by writing to 8
464 registers, each of which is a 32bit wide register, and set
465 them all to zero. Note that s->iobase is a pointer to
466 int32, not pointer to char.
469 for (i = 0; i < 8; i++) {
470 rme9652_write(rme9652, i * 4, 0);
473 rme9652->prev_hw_offset = 0;
476 static inline void rme9652_start(rme9652_t *s)
478 s->control_register |= (RME9652_IE | RME9652_start_bit);
479 rme9652_write(s, RME9652_control_register, s->control_register);
482 static inline void rme9652_stop(rme9652_t *s)
484 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
485 rme9652_write(s, RME9652_control_register, s->control_register);
488 static int rme9652_set_interrupt_interval(rme9652_t *s,
494 spin_lock_irq(&s->lock);
496 if ((restart = s->running)) {
507 s->control_register &= ~RME9652_latency;
508 s->control_register |= rme9652_encode_latency(n);
510 rme9652_write(s, RME9652_control_register, s->control_register);
512 rme9652_compute_period_size(s);
517 spin_unlock_irq(&s->lock);
522 static int rme9652_set_rate(rme9652_t *rme9652, int rate)
525 int reject_if_open = 0;
528 if (!snd_rme9652_use_is_exclusive (rme9652)) {
532 /* Changing from a "single speed" to a "double speed" rate is
533 not allowed if any substreams are open. This is because
534 such a change causes a shift in the location of
535 the DMA buffers and a reduction in the number of available
538 Note that a similar but essentially insoluble problem
539 exists for externally-driven rate changes. All we can do
540 is to flag rate changes in the read/write routines.
543 spin_lock_irq(&rme9652->lock);
544 xrate = rme9652_adat_sample_rate(rme9652);
569 rate = RME9652_DS | RME9652_freq;
572 spin_unlock_irq(&rme9652->lock);
576 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
577 spin_unlock_irq(&rme9652->lock);
581 if ((restart = rme9652->running)) {
582 rme9652_stop(rme9652);
584 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
585 rme9652->control_register |= rate;
586 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
589 rme9652_start(rme9652);
592 if (rate & RME9652_DS) {
593 if (rme9652->ss_channels == RME9652_NCHANNELS) {
594 rme9652->channel_map = channel_map_9652_ds;
596 rme9652->channel_map = channel_map_9636_ds;
599 if (rme9652->ss_channels == RME9652_NCHANNELS) {
600 rme9652->channel_map = channel_map_9652_ss;
602 rme9652->channel_map = channel_map_9636_ss;
606 spin_unlock_irq(&rme9652->lock);
610 static void rme9652_set_thru(rme9652_t *rme9652, int channel, int enable)
614 rme9652->passthru = 0;
618 /* set thru for all channels */
621 for (i = 0; i < RME9652_NCHANNELS; i++) {
622 rme9652->thru_bits |= (1 << i);
623 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
626 for (i = 0; i < RME9652_NCHANNELS; i++) {
627 rme9652->thru_bits &= ~(1 << i);
628 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
635 snd_assert(channel == RME9652_NCHANNELS, return);
637 mapped_channel = rme9652->channel_map[channel];
640 rme9652->thru_bits |= (1 << mapped_channel);
642 rme9652->thru_bits &= ~(1 << mapped_channel);
645 rme9652_write(rme9652,
646 RME9652_thru_base + mapped_channel * 4,
651 static int rme9652_set_passthru(rme9652_t *rme9652, int onoff)
654 rme9652_set_thru(rme9652, -1, 1);
656 /* we don't want interrupts, so do a
657 custom version of rme9652_start().
660 rme9652->control_register =
662 rme9652_encode_latency(7) |
665 rme9652_reset_hw_pointer(rme9652);
667 rme9652_write(rme9652, RME9652_control_register,
668 rme9652->control_register);
669 rme9652->passthru = 1;
671 rme9652_set_thru(rme9652, -1, 0);
672 rme9652_stop(rme9652);
673 rme9652->passthru = 0;
679 static void rme9652_spdif_set_bit (rme9652_t *rme9652, int mask, int onoff)
682 rme9652->control_register |= mask;
684 rme9652->control_register &= ~mask;
686 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
689 static void rme9652_spdif_write_byte (rme9652_t *rme9652, const int val)
694 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
696 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
698 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
700 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
701 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
705 static int rme9652_spdif_read_byte (rme9652_t *rme9652)
713 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
714 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
715 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
717 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
723 static void rme9652_write_spdif_codec (rme9652_t *rme9652, const int address, const int data)
725 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
726 rme9652_spdif_write_byte (rme9652, 0x20);
727 rme9652_spdif_write_byte (rme9652, address);
728 rme9652_spdif_write_byte (rme9652, data);
729 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
733 static int rme9652_spdif_read_codec (rme9652_t *rme9652, const int address)
737 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
738 rme9652_spdif_write_byte (rme9652, 0x20);
739 rme9652_spdif_write_byte (rme9652, address);
740 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
741 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
743 rme9652_spdif_write_byte (rme9652, 0x21);
744 ret = rme9652_spdif_read_byte (rme9652);
745 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
750 static void rme9652_initialize_spdif_receiver (rme9652_t *rme9652)
752 /* XXX what unsets this ? */
754 rme9652->control_register |= RME9652_SPDIF_RESET;
756 rme9652_write_spdif_codec (rme9652, 4, 0x40);
757 rme9652_write_spdif_codec (rme9652, 17, 0x13);
758 rme9652_write_spdif_codec (rme9652, 6, 0x02);
761 static inline int rme9652_spdif_sample_rate(rme9652_t *s)
763 unsigned int rate_bits;
765 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
766 return -1; /* error condition */
769 if (s->hw_rev == 15) {
773 x = rme9652_spdif_read_codec (s, 30);
780 if (y > 30400 && y < 33600) ret = 32000;
781 else if (y > 41900 && y < 46000) ret = 44100;
782 else if (y > 46000 && y < 50400) ret = 48000;
783 else if (y > 60800 && y < 67200) ret = 64000;
784 else if (y > 83700 && y < 92000) ret = 88200;
785 else if (y > 92000 && y < 100000) ret = 96000;
790 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
792 switch (rme9652_decode_spdif_rate(rate_bits)) {
818 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
819 s->card_name, rate_bits);
825 /*-----------------------------------------------------------------------------
827 ----------------------------------------------------------------------------*/
829 static u32 snd_rme9652_convert_from_aes(snd_aes_iec958_t *aes)
832 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
833 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
834 if (val & RME9652_PRO)
835 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
837 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
841 static void snd_rme9652_convert_to_aes(snd_aes_iec958_t *aes, u32 val)
843 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
844 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
845 if (val & RME9652_PRO)
846 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
848 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
851 static int snd_rme9652_control_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
853 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
858 static int snd_rme9652_control_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
860 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
862 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
866 static int snd_rme9652_control_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
868 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
873 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
874 spin_lock_irqsave(&rme9652->lock, flags);
875 change = val != rme9652->creg_spdif;
876 rme9652->creg_spdif = val;
877 spin_unlock_irqrestore(&rme9652->lock, flags);
881 static int snd_rme9652_control_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
883 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
888 static int snd_rme9652_control_spdif_stream_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
890 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
892 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
896 static int snd_rme9652_control_spdif_stream_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
898 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
903 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
904 spin_lock_irqsave(&rme9652->lock, flags);
905 change = val != rme9652->creg_spdif_stream;
906 rme9652->creg_spdif_stream = val;
907 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
908 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
909 spin_unlock_irqrestore(&rme9652->lock, flags);
913 static int snd_rme9652_control_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
915 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
920 static int snd_rme9652_control_spdif_mask_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
922 ucontrol->value.iec958.status[0] = kcontrol->private_value;
926 #define RME9652_ADAT1_IN(xname, xindex) \
927 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
928 .info = snd_rme9652_info_adat1_in, \
929 .get = snd_rme9652_get_adat1_in, \
930 .put = snd_rme9652_put_adat1_in }
932 static unsigned int rme9652_adat1_in(rme9652_t *rme9652)
934 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
939 static int rme9652_set_adat1_input(rme9652_t *rme9652, int internal)
944 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
946 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
949 /* XXX do we actually need to stop the card when we do this ? */
951 if ((restart = rme9652->running)) {
952 rme9652_stop(rme9652);
955 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
958 rme9652_start(rme9652);
964 static int snd_rme9652_info_adat1_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
966 static char *texts[2] = {"ADAT1", "Internal"};
968 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
970 uinfo->value.enumerated.items = 2;
971 if (uinfo->value.enumerated.item > 1)
972 uinfo->value.enumerated.item = 1;
973 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
977 static int snd_rme9652_get_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
979 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
982 spin_lock_irqsave(&rme9652->lock, flags);
983 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
984 spin_unlock_irqrestore(&rme9652->lock, flags);
988 static int snd_rme9652_put_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
990 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
995 if (!snd_rme9652_use_is_exclusive(rme9652))
997 val = ucontrol->value.enumerated.item[0] % 2;
998 spin_lock_irqsave(&rme9652->lock, flags);
999 change = val != rme9652_adat1_in(rme9652);
1001 rme9652_set_adat1_input(rme9652, val);
1002 spin_unlock_irqrestore(&rme9652->lock, flags);
1006 #define RME9652_SPDIF_IN(xname, xindex) \
1007 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1008 .info = snd_rme9652_info_spdif_in, \
1009 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
1011 static unsigned int rme9652_spdif_in(rme9652_t *rme9652)
1013 return rme9652_decode_spdif_in(rme9652->control_register &
1017 static int rme9652_set_spdif_input(rme9652_t *rme9652, int in)
1021 rme9652->control_register &= ~RME9652_inp;
1022 rme9652->control_register |= rme9652_encode_spdif_in(in);
1024 if ((restart = rme9652->running)) {
1025 rme9652_stop(rme9652);
1028 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1031 rme9652_start(rme9652);
1037 static int snd_rme9652_info_spdif_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1039 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1041 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1043 uinfo->value.enumerated.items = 3;
1044 if (uinfo->value.enumerated.item > 2)
1045 uinfo->value.enumerated.item = 2;
1046 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1050 static int snd_rme9652_get_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1052 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1053 unsigned long flags;
1055 spin_lock_irqsave(&rme9652->lock, flags);
1056 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1057 spin_unlock_irqrestore(&rme9652->lock, flags);
1061 static int snd_rme9652_put_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1063 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1064 unsigned long flags;
1068 if (!snd_rme9652_use_is_exclusive(rme9652))
1070 val = ucontrol->value.enumerated.item[0] % 3;
1071 spin_lock_irqsave(&rme9652->lock, flags);
1072 change = val != rme9652_spdif_in(rme9652);
1074 rme9652_set_spdif_input(rme9652, val);
1075 spin_unlock_irqrestore(&rme9652->lock, flags);
1079 #define RME9652_SPDIF_OUT(xname, xindex) \
1080 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1081 .info = snd_rme9652_info_spdif_out, \
1082 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1084 static int rme9652_spdif_out(rme9652_t *rme9652)
1086 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1089 static int rme9652_set_spdif_output(rme9652_t *rme9652, int out)
1094 rme9652->control_register |= RME9652_opt_out;
1096 rme9652->control_register &= ~RME9652_opt_out;
1099 if ((restart = rme9652->running)) {
1100 rme9652_stop(rme9652);
1103 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1106 rme9652_start(rme9652);
1112 static int snd_rme9652_info_spdif_out(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1114 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1116 uinfo->value.integer.min = 0;
1117 uinfo->value.integer.max = 1;
1121 static int snd_rme9652_get_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1123 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1124 unsigned long flags;
1126 spin_lock_irqsave(&rme9652->lock, flags);
1127 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1128 spin_unlock_irqrestore(&rme9652->lock, flags);
1132 static int snd_rme9652_put_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1134 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1135 unsigned long flags;
1139 if (!snd_rme9652_use_is_exclusive(rme9652))
1141 val = ucontrol->value.integer.value[0] & 1;
1142 spin_lock_irqsave(&rme9652->lock, flags);
1143 change = (int)val != rme9652_spdif_out(rme9652);
1144 rme9652_set_spdif_output(rme9652, val);
1145 spin_unlock_irqrestore(&rme9652->lock, flags);
1149 #define RME9652_SYNC_MODE(xname, xindex) \
1150 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1151 .info = snd_rme9652_info_sync_mode, \
1152 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1154 static int rme9652_sync_mode(rme9652_t *rme9652)
1156 if (rme9652->control_register & RME9652_wsel) {
1158 } else if (rme9652->control_register & RME9652_Master) {
1165 static int rme9652_set_sync_mode(rme9652_t *rme9652, int mode)
1171 rme9652->control_register &=
1172 ~(RME9652_Master | RME9652_wsel);
1175 rme9652->control_register =
1176 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1179 rme9652->control_register |=
1180 (RME9652_Master | RME9652_wsel);
1184 if ((restart = rme9652->running)) {
1185 rme9652_stop(rme9652);
1188 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1191 rme9652_start(rme9652);
1197 static int snd_rme9652_info_sync_mode(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1199 static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1201 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1203 uinfo->value.enumerated.items = 3;
1204 if (uinfo->value.enumerated.item > 2)
1205 uinfo->value.enumerated.item = 2;
1206 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1210 static int snd_rme9652_get_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1212 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1213 unsigned long flags;
1215 spin_lock_irqsave(&rme9652->lock, flags);
1216 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1217 spin_unlock_irqrestore(&rme9652->lock, flags);
1221 static int snd_rme9652_put_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1223 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1224 unsigned long flags;
1228 val = ucontrol->value.enumerated.item[0] % 3;
1229 spin_lock_irqsave(&rme9652->lock, flags);
1230 change = (int)val != rme9652_sync_mode(rme9652);
1231 rme9652_set_sync_mode(rme9652, val);
1232 spin_unlock_irqrestore(&rme9652->lock, flags);
1236 #define RME9652_SYNC_PREF(xname, xindex) \
1237 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1238 .info = snd_rme9652_info_sync_pref, \
1239 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1241 static int rme9652_sync_pref(rme9652_t *rme9652)
1243 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1244 case RME9652_SyncPref_ADAT1:
1245 return RME9652_SYNC_FROM_ADAT1;
1246 case RME9652_SyncPref_ADAT2:
1247 return RME9652_SYNC_FROM_ADAT2;
1248 case RME9652_SyncPref_ADAT3:
1249 return RME9652_SYNC_FROM_ADAT3;
1250 case RME9652_SyncPref_SPDIF:
1251 return RME9652_SYNC_FROM_SPDIF;
1257 static int rme9652_set_sync_pref(rme9652_t *rme9652, int pref)
1261 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1263 case RME9652_SYNC_FROM_ADAT1:
1264 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1266 case RME9652_SYNC_FROM_ADAT2:
1267 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1269 case RME9652_SYNC_FROM_ADAT3:
1270 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1272 case RME9652_SYNC_FROM_SPDIF:
1273 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1277 if ((restart = rme9652->running)) {
1278 rme9652_stop(rme9652);
1281 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1284 rme9652_start(rme9652);
1290 static int snd_rme9652_info_sync_pref(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1292 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1293 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1295 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1297 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1298 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1299 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1300 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1304 static int snd_rme9652_get_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1306 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1307 unsigned long flags;
1309 spin_lock_irqsave(&rme9652->lock, flags);
1310 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1311 spin_unlock_irqrestore(&rme9652->lock, flags);
1315 static int snd_rme9652_put_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1317 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1318 unsigned long flags;
1322 if (!snd_rme9652_use_is_exclusive(rme9652))
1324 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1325 val = ucontrol->value.enumerated.item[0] % max;
1326 spin_lock_irqsave(&rme9652->lock, flags);
1327 change = (int)val != rme9652_sync_pref(rme9652);
1328 rme9652_set_sync_pref(rme9652, val);
1329 spin_unlock_irqrestore(&rme9652->lock, flags);
1333 static int snd_rme9652_info_thru(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1335 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1336 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1337 uinfo->count = rme9652->ss_channels;
1338 uinfo->value.integer.min = 0;
1339 uinfo->value.integer.max = 1;
1343 static int snd_rme9652_get_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1345 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1347 u32 thru_bits = rme9652->thru_bits;
1349 for (k = 0; k < rme9652->ss_channels; ++k) {
1350 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1355 static int snd_rme9652_put_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1357 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1358 unsigned long flags;
1363 if (!snd_rme9652_use_is_exclusive(rme9652))
1366 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1367 if (ucontrol->value.integer.value[chn])
1368 thru_bits |= 1 << chn;
1371 spin_lock_irqsave(&rme9652->lock, flags);
1372 change = thru_bits ^ rme9652->thru_bits;
1374 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1375 if (!(change & (1 << chn)))
1377 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1380 spin_unlock_irqrestore(&rme9652->lock, flags);
1384 #define RME9652_PASSTHRU(xname, xindex) \
1385 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1386 .info = snd_rme9652_info_passthru, \
1387 .put = snd_rme9652_put_passthru, \
1388 .get = snd_rme9652_get_passthru }
1390 static int snd_rme9652_info_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
1392 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1394 uinfo->value.integer.min = 0;
1395 uinfo->value.integer.max = 1;
1399 static int snd_rme9652_get_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1401 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1402 unsigned long flags;
1404 spin_lock_irqsave(&rme9652->lock, flags);
1405 ucontrol->value.integer.value[0] = rme9652->passthru;
1406 spin_unlock_irqrestore(&rme9652->lock, flags);
1410 static int snd_rme9652_put_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1412 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1413 unsigned long flags;
1418 if (!snd_rme9652_use_is_exclusive(rme9652))
1421 val = ucontrol->value.integer.value[0] & 1;
1422 spin_lock_irqsave(&rme9652->lock, flags);
1423 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1425 err = rme9652_set_passthru(rme9652, val);
1426 spin_unlock_irqrestore(&rme9652->lock, flags);
1427 return err ? err : change;
1430 /* Read-only switches */
1432 #define RME9652_SPDIF_RATE(xname, xindex) \
1433 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1434 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1435 .info = snd_rme9652_info_spdif_rate, \
1436 .get = snd_rme9652_get_spdif_rate }
1438 static int snd_rme9652_info_spdif_rate(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1440 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1442 uinfo->value.integer.min = 0;
1443 uinfo->value.integer.max = 96000;
1447 static int snd_rme9652_get_spdif_rate(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1449 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1450 unsigned long flags;
1452 spin_lock_irqsave(&rme9652->lock, flags);
1453 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1454 spin_unlock_irqrestore(&rme9652->lock, flags);
1458 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1459 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1460 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1461 .info = snd_rme9652_info_adat_sync, \
1462 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1464 static int snd_rme9652_info_adat_sync(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1466 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1468 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1470 uinfo->value.enumerated.items = 4;
1471 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1472 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1473 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1477 static int snd_rme9652_get_adat_sync(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1479 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1480 unsigned int mask1, mask2, val;
1482 switch (kcontrol->private_value) {
1483 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1484 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1485 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1486 default: return -EINVAL;
1488 val = rme9652_read(rme9652, RME9652_status_register);
1489 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1490 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1494 #define RME9652_TC_VALID(xname, xindex) \
1495 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1496 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1497 .info = snd_rme9652_info_tc_valid, \
1498 .get = snd_rme9652_get_tc_valid }
1500 static int snd_rme9652_info_tc_valid(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1502 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1504 uinfo->value.integer.min = 0;
1505 uinfo->value.integer.max = 1;
1509 static int snd_rme9652_get_tc_valid(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1511 rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1513 ucontrol->value.integer.value[0] =
1514 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1518 #if ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1520 /* FIXME: this routine needs a port to the new control API --jk */
1522 static int snd_rme9652_get_tc_value(void *private_data,
1523 snd_kswitch_t *kswitch,
1524 snd_switch_t *uswitch)
1526 rme9652_t *s = (rme9652_t *) private_data;
1530 uswitch->type = SNDRV_SW_TYPE_DWORD;
1532 if ((rme9652_read(s, RME9652_status_register) &
1533 RME9652_tc_valid) == 0) {
1534 uswitch->value.data32[0] = 0;
1538 /* timecode request */
1540 rme9652_write(s, RME9652_time_code, 0);
1542 /* XXX bug alert: loop-based timing !!!! */
1544 for (i = 0; i < 50; i++) {
1545 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1549 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1555 for (i = 0; i < 32; i++) {
1558 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1559 value |= 0x80000000;
1562 if (value > 2 * 60 * 48000) {
1563 value -= 2 * 60 * 48000;
1568 uswitch->value.data32[0] = value;
1573 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1575 #define RME9652_CONTROLS (sizeof(snd_rme9652_controls)/sizeof(snd_kcontrol_new_t))
1577 static snd_kcontrol_new_t snd_rme9652_controls[] = {
1579 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1580 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1581 .info = snd_rme9652_control_spdif_info,
1582 .get = snd_rme9652_control_spdif_get,
1583 .put = snd_rme9652_control_spdif_put,
1586 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1587 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1588 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1589 .info = snd_rme9652_control_spdif_stream_info,
1590 .get = snd_rme9652_control_spdif_stream_get,
1591 .put = snd_rme9652_control_spdif_stream_put,
1594 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1595 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1596 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1597 .info = snd_rme9652_control_spdif_mask_info,
1598 .get = snd_rme9652_control_spdif_mask_get,
1599 .private_value = IEC958_AES0_NONAUDIO |
1600 IEC958_AES0_PROFESSIONAL |
1601 IEC958_AES0_CON_EMPHASIS,
1604 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1605 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1606 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1607 .info = snd_rme9652_control_spdif_mask_info,
1608 .get = snd_rme9652_control_spdif_mask_get,
1609 .private_value = IEC958_AES0_NONAUDIO |
1610 IEC958_AES0_PROFESSIONAL |
1611 IEC958_AES0_PRO_EMPHASIS,
1613 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1614 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1615 RME9652_SYNC_MODE("Sync Mode", 0),
1616 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1618 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1619 .name = "Channels Thru",
1621 .info = snd_rme9652_info_thru,
1622 .get = snd_rme9652_get_thru,
1623 .put = snd_rme9652_put_thru,
1625 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1626 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1627 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1628 RME9652_TC_VALID("Timecode Valid", 0),
1629 RME9652_PASSTHRU("Passthru", 0)
1632 static snd_kcontrol_new_t snd_rme9652_adat3_check =
1633 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1635 static snd_kcontrol_new_t snd_rme9652_adat1_input =
1636 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1638 int snd_rme9652_create_controls(snd_card_t *card, rme9652_t *rme9652)
1642 snd_kcontrol_t *kctl;
1644 for (idx = 0; idx < RME9652_CONTROLS; idx++) {
1645 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1647 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1648 rme9652->spdif_ctl = kctl;
1651 if (rme9652->ss_channels == RME9652_NCHANNELS)
1652 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1655 if (rme9652->hw_rev >= 15)
1656 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1662 /*------------------------------------------------------------
1664 ------------------------------------------------------------*/
1667 snd_rme9652_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1669 rme9652_t *rme9652 = (rme9652_t *) entry->private_data;
1670 u32 thru_bits = rme9652->thru_bits;
1671 int show_auto_sync_source = 0;
1673 unsigned int status;
1676 status = rme9652_read(rme9652, RME9652_status_register);
1678 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1679 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1680 rme9652->capture_buffer, rme9652->playback_buffer);
1681 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1682 rme9652->irq, rme9652->port, rme9652->iobase);
1683 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1685 snd_iprintf(buffer, "\n");
1687 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1690 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1691 x, (unsigned long) rme9652->period_bytes);
1692 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1693 rme9652_hw_pointer(rme9652));
1694 snd_iprintf(buffer, "Passthru: %s\n",
1695 rme9652->passthru ? "yes" : "no");
1697 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1698 snd_iprintf(buffer, "Clock mode: autosync\n");
1699 show_auto_sync_source = 1;
1700 } else if (rme9652->control_register & RME9652_wsel) {
1701 if (status & RME9652_wsel_rd) {
1702 snd_iprintf(buffer, "Clock mode: word clock\n");
1704 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1707 snd_iprintf(buffer, "Clock mode: master\n");
1710 if (show_auto_sync_source) {
1711 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1712 case RME9652_SyncPref_ADAT1:
1713 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1715 case RME9652_SyncPref_ADAT2:
1716 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1718 case RME9652_SyncPref_ADAT3:
1719 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1721 case RME9652_SyncPref_SPDIF:
1722 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1725 snd_iprintf(buffer, "Pref. sync source: ???\n");
1729 if (rme9652->hw_rev >= 15)
1730 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1731 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1732 "Internal" : "ADAT1 optical");
1734 snd_iprintf(buffer, "\n");
1736 switch (rme9652_decode_spdif_in(rme9652->control_register &
1738 case RME9652_SPDIFIN_OPTICAL:
1739 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1741 case RME9652_SPDIFIN_COAXIAL:
1742 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1744 case RME9652_SPDIFIN_INTERN:
1745 snd_iprintf(buffer, "IEC958 input: Internal\n");
1748 snd_iprintf(buffer, "IEC958 input: ???\n");
1752 if (rme9652->control_register & RME9652_opt_out) {
1753 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1755 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1758 if (rme9652->control_register & RME9652_PRO) {
1759 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1761 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1764 if (rme9652->control_register & RME9652_EMP) {
1765 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1767 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1770 if (rme9652->control_register & RME9652_Dolby) {
1771 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1773 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1776 i = rme9652_spdif_sample_rate(rme9652);
1780 "IEC958 sample rate: error flag set\n");
1781 } else if (i == 0) {
1782 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1784 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1787 snd_iprintf(buffer, "\n");
1789 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1790 rme9652_adat_sample_rate(rme9652));
1794 x = status & RME9652_sync_0;
1795 if (status & RME9652_lock_0) {
1796 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1798 snd_iprintf(buffer, "ADAT1: No Lock\n");
1801 x = status & RME9652_sync_1;
1802 if (status & RME9652_lock_1) {
1803 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1805 snd_iprintf(buffer, "ADAT2: No Lock\n");
1808 x = status & RME9652_sync_2;
1809 if (status & RME9652_lock_2) {
1810 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1812 snd_iprintf(buffer, "ADAT3: No Lock\n");
1815 snd_iprintf(buffer, "\n");
1817 snd_iprintf(buffer, "Timecode signal: %s\n",
1818 (status & RME9652_tc_valid) ? "yes" : "no");
1822 snd_iprintf(buffer, "Punch Status:\n\n");
1824 for (i = 0; i < rme9652->ss_channels; i++) {
1825 if (thru_bits & (1 << i)) {
1826 snd_iprintf(buffer, "%2d: on ", i + 1);
1828 snd_iprintf(buffer, "%2d: off ", i + 1);
1831 if (((i + 1) % 8) == 0) {
1832 snd_iprintf(buffer, "\n");
1836 snd_iprintf(buffer, "\n");
1839 static void __devinit snd_rme9652_proc_init(rme9652_t *rme9652)
1841 snd_info_entry_t *entry;
1843 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1844 snd_info_set_text_ops(entry, rme9652, 1024, snd_rme9652_proc_read);
1847 static void snd_rme9652_free_buffers(rme9652_t *rme9652)
1849 if (rme9652->capture_buffer_unaligned) {
1850 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
1851 rme9652->capture_buffer_unaligned,
1852 rme9652->capture_buffer_addr, 1);
1855 if (rme9652->playback_buffer_unaligned) {
1856 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
1857 rme9652->playback_buffer_unaligned,
1858 rme9652->playback_buffer_addr, 0);
1862 static int snd_rme9652_free(rme9652_t *rme9652)
1864 if (rme9652->irq >= 0)
1865 rme9652_stop(rme9652);
1866 snd_rme9652_free_buffers(rme9652);
1868 if (rme9652->iobase)
1869 iounmap((void *) rme9652->iobase);
1870 if (rme9652->res_port) {
1871 release_resource(rme9652->res_port);
1872 kfree_nocheck(rme9652->res_port);
1874 if (rme9652->irq >= 0)
1875 free_irq(rme9652->irq, (void *)rme9652);
1879 static int __devinit snd_rme9652_initialize_memory(rme9652_t *rme9652)
1882 dma_addr_t pb_addr, cb_addr;
1883 unsigned long pb_bus, cb_bus;
1885 cb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &cb_addr, 1);
1886 pb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &pb_addr, 0);
1888 if (cb == 0 || pb == 0) {
1890 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, cb, cb_addr, 1);
1893 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, pb, pb_addr, 0);
1896 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1900 /* save raw addresses for use when freeing memory later */
1902 rme9652->capture_buffer_unaligned = cb;
1903 rme9652->playback_buffer_unaligned = pb;
1904 rme9652->capture_buffer_addr = cb_addr;
1905 rme9652->playback_buffer_addr = pb_addr;
1907 /* Align to bus-space 64K boundary */
1909 cb_bus = (cb_addr + 0xFFFF) & ~0xFFFFl;
1910 pb_bus = (pb_addr + 0xFFFF) & ~0xFFFFl;
1912 /* Tell the card where it is */
1914 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1915 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1917 rme9652->capture_buffer = cb + (cb_bus - cb_addr);
1918 rme9652->playback_buffer = pb + (pb_bus - pb_addr);
1923 static void snd_rme9652_set_defaults(rme9652_t *rme9652)
1927 /* ASSUMPTION: rme9652->lock is either held, or
1928 there is no need to hold it (e.g. during module
1934 SPDIF Input via Coax
1936 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1937 which implies 2 4096 sample, 32Kbyte periods).
1939 if rev 1.5, initialize the S/PDIF receiver.
1943 rme9652->control_register =
1944 RME9652_inp_0 | rme9652_encode_latency(7);
1946 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1948 rme9652_reset_hw_pointer(rme9652);
1949 rme9652_compute_period_size(rme9652);
1951 /* default: thru off for all channels */
1953 for (k = 0; k < RME9652_NCHANNELS; ++k)
1954 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1956 rme9652->thru_bits = 0;
1957 rme9652->passthru = 0;
1959 /* set a default rate so that the channel map is set up */
1961 rme9652_set_rate(rme9652, 48000);
1964 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1966 rme9652_t *rme9652 = (rme9652_t *) dev_id;
1968 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1972 rme9652_write(rme9652, RME9652_irq_clear, 0);
1974 if (rme9652->capture_substream) {
1975 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1978 if (rme9652->playback_substream) {
1979 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1984 static snd_pcm_uframes_t snd_rme9652_hw_pointer(snd_pcm_substream_t *substream)
1986 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
1987 return rme9652_hw_pointer(rme9652);
1990 static char *rme9652_channel_buffer_location(rme9652_t *rme9652,
1997 snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1999 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
2003 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
2004 return rme9652->capture_buffer +
2005 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
2007 return rme9652->playback_buffer +
2008 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
2012 static int snd_rme9652_playback_copy(snd_pcm_substream_t *substream, int channel,
2013 snd_pcm_uframes_t pos, void *src, snd_pcm_uframes_t count)
2015 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2018 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
2020 channel_buf = rme9652_channel_buffer_location (rme9652,
2021 substream->pstr->stream,
2023 snd_assert(channel_buf != NULL, return -EIO);
2024 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
2029 static int snd_rme9652_capture_copy(snd_pcm_substream_t *substream, int channel,
2030 snd_pcm_uframes_t pos, void *dst, snd_pcm_uframes_t count)
2032 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2035 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
2037 channel_buf = rme9652_channel_buffer_location (rme9652,
2038 substream->pstr->stream,
2040 snd_assert(channel_buf != NULL, return -EIO);
2041 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
2046 static int snd_rme9652_hw_silence(snd_pcm_substream_t *substream, int channel,
2047 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
2049 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2052 channel_buf = rme9652_channel_buffer_location (rme9652,
2053 substream->pstr->stream,
2055 snd_assert(channel_buf != NULL, return -EIO);
2056 memset(channel_buf + pos * 4, 0, count * 4);
2060 static int snd_rme9652_reset(snd_pcm_substream_t *substream)
2062 snd_pcm_runtime_t *runtime = substream->runtime;
2063 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2064 snd_pcm_substream_t *other;
2065 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2066 other = rme9652->capture_substream;
2068 other = rme9652->playback_substream;
2069 if (rme9652->running)
2070 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
2072 runtime->status->hw_ptr = 0;
2074 struct list_head *pos;
2075 snd_pcm_substream_t *s;
2076 snd_pcm_runtime_t *oruntime = other->runtime;
2077 snd_pcm_group_for_each(pos, substream) {
2078 s = snd_pcm_group_substream_entry(pos);
2080 oruntime->status->hw_ptr = runtime->status->hw_ptr;
2088 static int snd_rme9652_hw_params(snd_pcm_substream_t *substream,
2089 snd_pcm_hw_params_t *params)
2091 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2096 spin_lock_irq(&rme9652->lock);
2098 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2099 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2100 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2101 this_pid = rme9652->playback_pid;
2102 other_pid = rme9652->capture_pid;
2104 this_pid = rme9652->capture_pid;
2105 other_pid = rme9652->playback_pid;
2108 if ((other_pid > 0) && (this_pid != other_pid)) {
2110 /* The other stream is open, and not by the same
2111 task as this one. Make sure that the parameters
2112 that matter are the same.
2115 if ((int)params_rate(params) !=
2116 rme9652_adat_sample_rate(rme9652)) {
2117 spin_unlock_irq(&rme9652->lock);
2118 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2122 if (params_period_size(params) != rme9652->period_bytes / 4) {
2123 spin_unlock_irq(&rme9652->lock);
2124 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2130 spin_unlock_irq(&rme9652->lock);
2134 spin_unlock_irq(&rme9652->lock);
2137 /* how to make sure that the rate matches an externally-set one ?
2140 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2141 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2145 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2146 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2153 static int snd_rme9652_channel_info(snd_pcm_substream_t *substream,
2154 snd_pcm_channel_info_t *info)
2156 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2159 snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2161 if ((chn = rme9652->channel_map[info->channel]) < 0) {
2165 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2171 static int snd_rme9652_ioctl(snd_pcm_substream_t *substream,
2172 unsigned int cmd, void *arg)
2175 case SNDRV_PCM_IOCTL1_RESET:
2177 return snd_rme9652_reset(substream);
2179 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2181 snd_pcm_channel_info_t *info = arg;
2182 return snd_rme9652_channel_info(substream, info);
2188 return snd_pcm_lib_ioctl(substream, cmd, arg);
2191 static void rme9652_silence_playback(rme9652_t *rme9652)
2193 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2196 static int snd_rme9652_trigger(snd_pcm_substream_t *substream,
2199 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2200 snd_pcm_substream_t *other;
2202 spin_lock(&rme9652->lock);
2203 running = rme9652->running;
2205 case SNDRV_PCM_TRIGGER_START:
2206 running |= 1 << substream->stream;
2208 case SNDRV_PCM_TRIGGER_STOP:
2209 running &= ~(1 << substream->stream);
2213 spin_unlock(&rme9652->lock);
2216 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2217 other = rme9652->capture_substream;
2219 other = rme9652->playback_substream;
2222 struct list_head *pos;
2223 snd_pcm_substream_t *s;
2224 snd_pcm_group_for_each(pos, substream) {
2225 s = snd_pcm_group_substream_entry(pos);
2227 snd_pcm_trigger_done(s, substream);
2228 if (cmd == SNDRV_PCM_TRIGGER_START)
2229 running |= 1 << s->stream;
2231 running &= ~(1 << s->stream);
2235 if (cmd == SNDRV_PCM_TRIGGER_START) {
2236 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2237 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2238 rme9652_silence_playback(rme9652);
2241 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2242 rme9652_silence_playback(rme9652);
2245 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2246 rme9652_silence_playback(rme9652);
2249 snd_pcm_trigger_done(substream, substream);
2250 if (!rme9652->running && running)
2251 rme9652_start(rme9652);
2252 else if (rme9652->running && !running)
2253 rme9652_stop(rme9652);
2254 rme9652->running = running;
2255 spin_unlock(&rme9652->lock);
2260 static int snd_rme9652_prepare(snd_pcm_substream_t *substream)
2262 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2265 spin_lock_irq(&rme9652->lock);
2266 if (!rme9652->running)
2267 rme9652_reset_hw_pointer(rme9652);
2268 spin_unlock_irq(&rme9652->lock);
2272 static snd_pcm_hardware_t snd_rme9652_playback_subinfo =
2274 .info = (SNDRV_PCM_INFO_MMAP |
2275 SNDRV_PCM_INFO_MMAP_VALID |
2276 SNDRV_PCM_INFO_NONINTERLEAVED |
2277 SNDRV_PCM_INFO_SYNC_START |
2278 SNDRV_PCM_INFO_DOUBLE),
2279 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2280 .rates = (SNDRV_PCM_RATE_44100 |
2281 SNDRV_PCM_RATE_48000 |
2282 SNDRV_PCM_RATE_88200 |
2283 SNDRV_PCM_RATE_96000),
2288 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2289 .period_bytes_min = (64 * 4) * 10,
2290 .period_bytes_max = (8192 * 4) * 26,
2296 static snd_pcm_hardware_t snd_rme9652_capture_subinfo =
2298 .info = (SNDRV_PCM_INFO_MMAP |
2299 SNDRV_PCM_INFO_MMAP_VALID |
2300 SNDRV_PCM_INFO_NONINTERLEAVED |
2301 SNDRV_PCM_INFO_SYNC_START),
2302 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2303 .rates = (SNDRV_PCM_RATE_44100 |
2304 SNDRV_PCM_RATE_48000 |
2305 SNDRV_PCM_RATE_88200 |
2306 SNDRV_PCM_RATE_96000),
2311 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2312 .period_bytes_min = (64 * 4) * 10,
2313 .period_bytes_max = (8192 * 4) * 26,
2319 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2321 #define PERIOD_SIZES sizeof(period_sizes) / sizeof(period_sizes[0])
2323 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
2324 .count = PERIOD_SIZES,
2325 .list = period_sizes,
2329 static int snd_rme9652_hw_rule_channels(snd_pcm_hw_params_t *params,
2330 snd_pcm_hw_rule_t *rule)
2332 rme9652_t *rme9652 = rule->private;
2333 snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2334 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2335 return snd_interval_list(c, 2, list, 0);
2338 static int snd_rme9652_hw_rule_channels_rate(snd_pcm_hw_params_t *params,
2339 snd_pcm_hw_rule_t *rule)
2341 rme9652_t *rme9652 = rule->private;
2342 snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2343 snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2344 if (r->min > 48000) {
2345 snd_interval_t t = {
2346 .min = rme9652->ds_channels,
2347 .max = rme9652->ds_channels,
2350 return snd_interval_refine(c, &t);
2351 } else if (r->max < 88200) {
2352 snd_interval_t t = {
2353 .min = rme9652->ss_channels,
2354 .max = rme9652->ss_channels,
2357 return snd_interval_refine(c, &t);
2362 static int snd_rme9652_hw_rule_rate_channels(snd_pcm_hw_params_t *params,
2363 snd_pcm_hw_rule_t *rule)
2365 rme9652_t *rme9652 = rule->private;
2366 snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2367 snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2368 if (c->min >= rme9652->ss_channels) {
2369 snd_interval_t t = {
2374 return snd_interval_refine(r, &t);
2375 } else if (c->max <= rme9652->ds_channels) {
2376 snd_interval_t t = {
2381 return snd_interval_refine(r, &t);
2386 static int snd_rme9652_playback_open(snd_pcm_substream_t *substream)
2388 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2389 unsigned long flags;
2390 snd_pcm_runtime_t *runtime = substream->runtime;
2392 spin_lock_irqsave(&rme9652->lock, flags);
2394 snd_pcm_set_sync(substream);
2396 runtime->hw = snd_rme9652_playback_subinfo;
2397 runtime->dma_area = rme9652->playback_buffer;
2398 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2400 if (rme9652->capture_substream == NULL) {
2401 rme9652_stop(rme9652);
2402 rme9652_set_thru(rme9652, -1, 0);
2405 rme9652->playback_pid = current->pid;
2406 rme9652->playback_substream = substream;
2408 spin_unlock_irqrestore(&rme9652->lock, flags);
2410 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2411 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2412 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2413 snd_rme9652_hw_rule_channels, rme9652,
2414 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2415 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2416 snd_rme9652_hw_rule_channels_rate, rme9652,
2417 SNDRV_PCM_HW_PARAM_RATE, -1);
2418 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2419 snd_rme9652_hw_rule_rate_channels, rme9652,
2420 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2422 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2423 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2424 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2425 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2429 static int snd_rme9652_playback_release(snd_pcm_substream_t *substream)
2431 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2432 unsigned long flags;
2434 spin_lock_irqsave(&rme9652->lock, flags);
2436 rme9652->playback_pid = -1;
2437 rme9652->playback_substream = NULL;
2439 spin_unlock_irqrestore(&rme9652->lock, flags);
2441 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2442 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2443 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2448 static int snd_rme9652_capture_open(snd_pcm_substream_t *substream)
2450 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2451 unsigned long flags;
2452 snd_pcm_runtime_t *runtime = substream->runtime;
2454 spin_lock_irqsave(&rme9652->lock, flags);
2456 snd_pcm_set_sync(substream);
2458 runtime->hw = snd_rme9652_capture_subinfo;
2459 runtime->dma_area = rme9652->capture_buffer;
2460 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2462 if (rme9652->playback_substream == NULL) {
2463 rme9652_stop(rme9652);
2464 rme9652_set_thru(rme9652, -1, 0);
2467 rme9652->capture_pid = current->pid;
2468 rme9652->capture_substream = substream;
2470 spin_unlock_irqrestore(&rme9652->lock, flags);
2472 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2473 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2474 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2475 snd_rme9652_hw_rule_channels, rme9652,
2476 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2477 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2478 snd_rme9652_hw_rule_channels_rate, rme9652,
2479 SNDRV_PCM_HW_PARAM_RATE, -1);
2480 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2481 snd_rme9652_hw_rule_rate_channels, rme9652,
2482 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2486 static int snd_rme9652_capture_release(snd_pcm_substream_t *substream)
2488 rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2489 unsigned long flags;
2491 spin_lock_irqsave(&rme9652->lock, flags);
2493 rme9652->capture_pid = -1;
2494 rme9652->capture_substream = NULL;
2496 spin_unlock_irqrestore(&rme9652->lock, flags);
2500 static snd_pcm_ops_t snd_rme9652_playback_ops = {
2501 .open = snd_rme9652_playback_open,
2502 .close = snd_rme9652_playback_release,
2503 .ioctl = snd_rme9652_ioctl,
2504 .hw_params = snd_rme9652_hw_params,
2505 .prepare = snd_rme9652_prepare,
2506 .trigger = snd_rme9652_trigger,
2507 .pointer = snd_rme9652_hw_pointer,
2508 .copy = snd_rme9652_playback_copy,
2509 .silence = snd_rme9652_hw_silence,
2512 static snd_pcm_ops_t snd_rme9652_capture_ops = {
2513 .open = snd_rme9652_capture_open,
2514 .close = snd_rme9652_capture_release,
2515 .ioctl = snd_rme9652_ioctl,
2516 .hw_params = snd_rme9652_hw_params,
2517 .prepare = snd_rme9652_prepare,
2518 .trigger = snd_rme9652_trigger,
2519 .pointer = snd_rme9652_hw_pointer,
2520 .copy = snd_rme9652_capture_copy,
2523 static int __devinit snd_rme9652_create_pcm(snd_card_t *card,
2529 if ((err = snd_pcm_new(card,
2531 0, 1, 1, &pcm)) < 0) {
2536 pcm->private_data = rme9652;
2537 strcpy(pcm->name, rme9652->card_name);
2539 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2540 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2542 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2547 static int __devinit snd_rme9652_create(snd_card_t *card,
2551 struct pci_dev *pci = rme9652->pci;
2557 rme9652->card = card;
2559 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2561 switch (rev & 0xff) {
2573 if ((err = pci_enable_device(pci)) < 0)
2576 spin_lock_init(&rme9652->lock);
2578 rme9652->port = pci_resource_start(pci, 0);
2579 if ((rme9652->res_port = request_mem_region(rme9652->port, RME9652_IO_EXTENT, "rme9652")) == NULL) {
2580 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2584 rme9652->iobase = (unsigned long) ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2585 if (rme9652->iobase == 0) {
2586 snd_printk("unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2590 if (request_irq(pci->irq, snd_rme9652_interrupt, SA_INTERRUPT|SA_SHIRQ, "rme9652", (void *)rme9652)) {
2591 snd_printk("unable to request IRQ %d\n", pci->irq);
2594 rme9652->irq = pci->irq;
2595 rme9652->precise_ptr = precise_ptr;
2597 /* Determine the h/w rev level of the card. This seems like
2598 a particularly kludgy way to encode it, but its what RME
2599 chose to do, so we follow them ...
2602 status = rme9652_read(rme9652, RME9652_status_register);
2603 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2604 rme9652->hw_rev = 15;
2606 rme9652->hw_rev = 11;
2609 /* Differentiate between the standard Hammerfall, and the
2610 "Light", which does not have the expansion board. This
2611 method comes from information received from Mathhias
2612 Clausen at RME. Display the EEPROM and h/w revID where
2617 case 8: /* original eprom */
2618 strcpy(card->driver, "RME9636");
2619 if (rme9652->hw_rev == 15) {
2620 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2622 rme9652->card_name = "RME Digi9636";
2624 rme9652->ss_channels = RME9636_NCHANNELS;
2626 case 9: /* W36_G EPROM */
2627 strcpy(card->driver, "RME9636");
2628 rme9652->card_name = "RME Digi9636 (Rev G)";
2629 rme9652->ss_channels = RME9636_NCHANNELS;
2631 case 4: /* W52_G EPROM */
2632 strcpy(card->driver, "RME9652");
2633 rme9652->card_name = "RME Digi9652 (Rev G)";
2634 rme9652->ss_channels = RME9652_NCHANNELS;
2636 case 3: /* original eprom */
2637 strcpy(card->driver, "RME9652");
2638 if (rme9652->hw_rev == 15) {
2639 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2641 rme9652->card_name = "RME Digi9652";
2643 rme9652->ss_channels = RME9652_NCHANNELS;
2647 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2649 pci_set_master(rme9652->pci);
2651 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2655 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2659 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2663 snd_rme9652_proc_init(rme9652);
2665 rme9652->last_spdif_sample_rate = -1;
2666 rme9652->last_adat_sample_rate = -1;
2667 rme9652->playback_pid = -1;
2668 rme9652->capture_pid = -1;
2669 rme9652->capture_substream = NULL;
2670 rme9652->playback_substream = NULL;
2672 snd_rme9652_set_defaults(rme9652);
2674 if (rme9652->hw_rev == 15) {
2675 rme9652_initialize_spdif_receiver (rme9652);
2681 static void snd_rme9652_card_free(snd_card_t *card)
2683 rme9652_t *rme9652 = (rme9652_t *) card->private_data;
2686 snd_rme9652_free(rme9652);
2689 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2690 const struct pci_device_id *pci_id)
2697 if (dev >= SNDRV_CARDS)
2704 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2710 rme9652 = (rme9652_t *) card->private_data;
2711 card->private_free = snd_rme9652_card_free;
2714 snd_card_set_dev(card, &pci->dev);
2716 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2717 snd_card_free(card);
2721 strcpy(card->shortname, rme9652->card_name);
2723 sprintf(card->longname, "%s at 0x%lx, irq %d",
2724 card->shortname, rme9652->port, rme9652->irq);
2727 if ((err = snd_card_register(card)) < 0) {
2728 snd_card_free(card);
2731 pci_set_drvdata(pci, card);
2736 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2738 snd_card_free(pci_get_drvdata(pci));
2739 pci_set_drvdata(pci, NULL);
2742 static struct pci_driver driver = {
2743 .name = "RME Digi9652 (Hammerfall)",
2744 .id_table = snd_rme9652_ids,
2745 .probe = snd_rme9652_probe,
2746 .remove = __devexit_p(snd_rme9652_remove),
2749 static int __init alsa_card_hammerfall_init(void)
2751 if (pci_module_init(&driver) < 0) {
2753 printk(KERN_ERR "RME Digi9652/Digi9636: no cards found\n");
2761 static void __exit alsa_card_hammerfall_exit(void)
2763 pci_unregister_driver(&driver);
2766 module_init(alsa_card_hammerfall_init)
2767 module_exit(alsa_card_hammerfall_exit)
2771 /* format is: snd-rme9652=enable,index,id */
2773 static int __init alsa_card_rme9652_setup(char *str)
2775 static unsigned __initdata nr_dev = 0;
2777 if (nr_dev >= SNDRV_CARDS)
2779 (void)(get_option(&str,&enable[nr_dev]) == 2 &&
2780 get_option(&str,&index[nr_dev]) == 2 &&
2781 get_id(&str,&id[nr_dev]) == 2);
2786 __setup("snd-rme9652=", alsa_card_rme9652_setup);
2788 #endif /* ifndef MODULE */