/*****************************************************************************/ /* * crt0_ram.S -- startup code for MCF5307 ColdFire Arnewsh board. * * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com). * Copyright (C) 2000 Lineo Inc. (www.lineo.com) * * 1999/02/24 Modified for the 5307 processor David W. Miller */ /*****************************************************************************/ #include "linux/autoconf.h" #include "asm/coldfire.h" #include "asm/mcfsim.h" #include "asm/nettel.h" /*****************************************************************************/ /* * SnapGear/NETtel board memory setup. */ #define MEM_BASE 0x00000000 /* Memory base at address 0 */ #define MEM_SIZE 0x00800000 /* Memory size 8Mb */ #define VBR_BASE MEM_BASE /* Vector address */ /*****************************************************************************/ .global _start .global _rambase .global _ramvec .global _ramstart .global _ramend /*****************************************************************************/ .data /* * Set up the usable of RAM stuff. Size of RAM is determined then * an initial stack set up at the end. */ _rambase: .long 0 _ramvec: .long 0 _ramstart: .long 0 _ramend: .long 0 /*****************************************************************************/ .text /* * This is the codes first entry point. This is where it all * begins... */ _start: nop /* Filler */ move.w #0x2700, %sr /* No interrupts */ /* * Setup VBR here, otherwise buserror remap will not work. * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996) * * bkr@cut.de 19990306 * * Note: this is because dBUG points VBR to ROM, making vectors read * only, so the bus trap can't be changed. (RS) */ move.l #VBR_BASE, %a7 /* Note VBR can't be read */ movec %a7, %VBR move.l %a7, _ramvec /* Set up vector addr */ move.l %a7, _rambase /* Set up base RAM addr */ /* * Determine size of RAM, then set up initial stack. */ move.l #MEM_SIZE, %a0 move.l %a0, %d0 /* Mem end addr is in a0 */ move.l %d0, %sp /* Set up initial stack ptr */ move.l %d0, _ramend /* Set end ram addr */ /* make region ROM cachable (turn off for flash programming?) */ /* 0xff000000 - 0xffffffff */ #ifdef DEBUGGER_COMPATIBLE_CACHE movl #(0xff<