-/* Must execute after PCI subsystem */
-fs_initcall(pci_iommu_init);
-
-/* iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]][,merge]
- [,forcesac][,fullflush][,nomerge]
- size set size of iommu (in bytes)
- noagp don't initialize the AGP driver and use full aperture.
- off don't use the IOMMU
- leak turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on)
- memaper[=order] allocate an own aperture over RAM with size 32MB^order.
- noforce don't force IOMMU usage. Default.
- force Force IOMMU.
- merge Do SG merging. Implies force (experimental)
- nomerge Don't do SG merging.
- forcesac For SAC mode for masks <40bits (experimental)
- fullflush Flush IOMMU on each allocation (default)
- nofullflush Don't use IOMMU fullflush
- allowed overwrite iommu off workarounds for specific chipsets.
- soft Use software bounce buffering (default for Intel machines)
-*/
-__init int iommu_setup(char *opt)
-{
- int arg;
- char *p = opt;
-
- for (;;) {
- if (!memcmp(p,"noagp", 5))
- no_agp = 1;
- if (!memcmp(p,"off", 3))
- no_iommu = 1;
- if (!memcmp(p,"force", 5)) {
- force_iommu = 1;
- iommu_aperture_allowed = 1;
- }
- if (!memcmp(p,"allowed",7))
- iommu_aperture_allowed = 1;
- if (!memcmp(p,"noforce", 7)) {
- iommu_merge = 0;
- force_iommu = 0;
- }
- if (!memcmp(p, "memaper", 7)) {
- fallback_aper_force = 1;
- p += 7;
- if (*p == '=' && get_option(&p, &arg))
- fallback_aper_order = arg;
- }
- if (!memcmp(p, "panic", 5))
- panic_on_overflow = 1;
- if (!memcmp(p, "nopanic", 7))
- panic_on_overflow = 0;
- if (!memcmp(p, "merge", 5)) {
- iommu_merge = 1;
- force_iommu = 1;
- }
- if (!memcmp(p, "nomerge", 7))
- iommu_merge = 0;
- if (!memcmp(p, "forcesac", 8))
- iommu_sac_force = 1;
- if (!memcmp(p, "fullflush", 9))
- iommu_fullflush = 1;
- if (!memcmp(p, "nofullflush", 11))
- iommu_fullflush = 0;
- if (!memcmp(p, "soft", 4))
- swiotlb = 1;