-#define OMAP_DMA_CAPS_0_U_REG (OMAP_DMA_BASE + 0x44e)
-#define OMAP_DMA_CAPS_0_L_REG (OMAP_DMA_BASE + 0x450)
-#define OMAP_DMA_CAPS_1_U_REG (OMAP_DMA_BASE + 0x452)
-#define OMAP_DMA_CAPS_1_L_REG (OMAP_DMA_BASE + 0x454)
-#define OMAP_DMA_CAPS_2_REG (OMAP_DMA_BASE + 0x456)
-#define OMAP_DMA_CAPS_3_REG (OMAP_DMA_BASE + 0x458)
-#define OMAP_DMA_CAPS_4_REG (OMAP_DMA_BASE + 0x45a)
-#define OMAP_DMA_PCH2_SR_REG (OMAP_DMA_BASE + 0x460)
-#define OMAP_DMA_PCH0_SR_REG (OMAP_DMA_BASE + 0x480)
-#define OMAP_DMA_PCH1_SR_REG (OMAP_DMA_BASE + 0x482)
-#define OMAP_DMA_PCHD_SR_REG (OMAP_DMA_BASE + 0x4c0)
-
-#define OMAP1510_DMA_LCD_CTRL 0xfffedb00
-#define OMAP1510_DMA_LCD_TOP_F1_L 0xfffedb02
-#define OMAP1510_DMA_LCD_TOP_F1_U 0xfffedb04
-#define OMAP1510_DMA_LCD_BOT_F1_L 0xfffedb06
-#define OMAP1510_DMA_LCD_BOT_F1_U 0xfffedb08
-
-#define OMAP1610_DMA_LCD_CSDP 0xfffee3c0
-#define OMAP1610_DMA_LCD_CCR 0xfffee3c2
-#define OMAP1610_DMA_LCD_CTRL 0xfffee3c4
-#define OMAP1610_DMA_LCD_TOP_B1_L 0xfffee3c8
-#define OMAP1610_DMA_LCD_TOP_B1_U 0xfffee3ca
-#define OMAP1610_DMA_LCD_BOT_B1_L 0xfffee3cc
-#define OMAP1610_DMA_LCD_BOT_B1_U 0xfffee3ce
-#define OMAP1610_DMA_LCD_TOP_B2_L 0xfffee3d0
-#define OMAP1610_DMA_LCD_TOP_B2_U 0xfffee3d2
-#define OMAP1610_DMA_LCD_BOT_B2_L 0xfffee3d4
-#define OMAP1610_DMA_LCD_BOT_B2_U 0xfffee3d6
-#define OMAP1610_DMA_LCD_SRC_EI_B1 0xfffee3d8
-#define OMAP1610_DMA_LCD_SRC_FI_B1_L 0xfffee3da
-#define OMAP1610_DMA_LCD_SRC_EN_B1 0xfffee3e0
-#define OMAP1610_DMA_LCD_SRC_FN_B1 0xfffee3e4
-#define OMAP1610_DMA_LCD_LCH_CTRL 0xfffee3ea
-#define OMAP1610_DMA_LCD_SRC_FI_B1_U 0xfffee3f4
+#define OMAP_DMA_CAPS_0_U (OMAP_DMA_BASE + 0x44e)
+#define OMAP_DMA_CAPS_0_L (OMAP_DMA_BASE + 0x450)
+#define OMAP_DMA_CAPS_1_U (OMAP_DMA_BASE + 0x452)
+#define OMAP_DMA_CAPS_1_L (OMAP_DMA_BASE + 0x454)
+#define OMAP_DMA_CAPS_2 (OMAP_DMA_BASE + 0x456)
+#define OMAP_DMA_CAPS_3 (OMAP_DMA_BASE + 0x458)
+#define OMAP_DMA_CAPS_4 (OMAP_DMA_BASE + 0x45a)
+#define OMAP_DMA_PCH2_SR (OMAP_DMA_BASE + 0x460)
+#define OMAP_DMA_PCH0_SR (OMAP_DMA_BASE + 0x480)
+#define OMAP_DMA_PCH1_SR (OMAP_DMA_BASE + 0x482)
+#define OMAP_DMA_PCHD_SR (OMAP_DMA_BASE + 0x4c0)
+
+#define OMAP1510_DMA_LCD_BASE (0xfffedb00)
+#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00)
+#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02)
+#define OMAP1510_DMA_LCD_TOP_F1_U (OMAP1510_DMA_LCD_BASE + 0x04)
+#define OMAP1510_DMA_LCD_BOT_F1_L (OMAP1510_DMA_LCD_BASE + 0x06)
+#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08)
+
+#define OMAP1610_DMA_LCD_BASE (0xfffee300)
+#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0)
+#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2)
+#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4)
+#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8)
+#define OMAP1610_DMA_LCD_TOP_B1_U (OMAP1610_DMA_LCD_BASE + 0xca)
+#define OMAP1610_DMA_LCD_BOT_B1_L (OMAP1610_DMA_LCD_BASE + 0xcc)
+#define OMAP1610_DMA_LCD_BOT_B1_U (OMAP1610_DMA_LCD_BASE + 0xce)
+#define OMAP1610_DMA_LCD_TOP_B2_L (OMAP1610_DMA_LCD_BASE + 0xd0)
+#define OMAP1610_DMA_LCD_TOP_B2_U (OMAP1610_DMA_LCD_BASE + 0xd2)
+#define OMAP1610_DMA_LCD_BOT_B2_L (OMAP1610_DMA_LCD_BASE + 0xd4)
+#define OMAP1610_DMA_LCD_BOT_B2_U (OMAP1610_DMA_LCD_BASE + 0xd6)
+#define OMAP1610_DMA_LCD_SRC_EI_B1 (OMAP1610_DMA_LCD_BASE + 0xd8)
+#define OMAP1610_DMA_LCD_SRC_FI_B1_L (OMAP1610_DMA_LCD_BASE + 0xda)
+#define OMAP1610_DMA_LCD_SRC_EN_B1 (OMAP1610_DMA_LCD_BASE + 0xe0)
+#define OMAP1610_DMA_LCD_SRC_FN_B1 (OMAP1610_DMA_LCD_BASE + 0xe4)
+#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea)
+#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4)