X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fieee1394%2Fohci1394.c;h=628130a58af3fe9205750bdf4b68eb225815fbaa;hb=refs%2Fheads%2Fvserver;hp=1bd98e7716d1202d843b64f273c30be35c113879;hpb=76828883507a47dae78837ab5dec5a5b4513c667;p=linux-2.6.git diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c index 1bd98e771..628130a58 100644 --- a/drivers/ieee1394/ohci1394.c +++ b/drivers/ieee1394/ohci1394.c @@ -82,7 +82,6 @@ * */ -#include #include #include #include @@ -137,7 +136,7 @@ #define DBGMSG(fmt, args...) \ printk(KERN_INFO "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host->id , ## args) #else -#define DBGMSG(fmt, args...) +#define DBGMSG(fmt, args...) do {} while (0) #endif #ifdef CONFIG_IEEE1394_OHCI_DMA_DEBUG @@ -149,8 +148,8 @@ printk(KERN_INFO "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host-> --global_outstanding_dmas, ## args) static int global_outstanding_dmas = 0; #else -#define OHCI_DMA_ALLOC(fmt, args...) -#define OHCI_DMA_FREE(fmt, args...) +#define OHCI_DMA_ALLOC(fmt, args...) do {} while (0) +#define OHCI_DMA_FREE(fmt, args...) do {} while (0) #endif /* print general (card independent) information */ @@ -163,7 +162,7 @@ printk(level "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host->id , /* Module Parameters */ static int phys_dma = 1; -module_param(phys_dma, int, 0644); +module_param(phys_dma, int, 0444); MODULE_PARM_DESC(phys_dma, "Enable physical dma (default = 1)."); static void dma_trm_tasklet(unsigned long data); @@ -182,36 +181,35 @@ static int alloc_dma_trm_ctx(struct ti_ohci *ohci, struct dma_trm_ctx *d, static void ohci1394_pci_remove(struct pci_dev *pdev); #ifndef __LITTLE_ENDIAN -static unsigned hdr_sizes[] = -{ +const static size_t hdr_sizes[] = { 3, /* TCODE_WRITEQ */ 4, /* TCODE_WRITEB */ 3, /* TCODE_WRITE_RESPONSE */ - 0, /* ??? */ + 0, /* reserved */ 3, /* TCODE_READQ */ 4, /* TCODE_READB */ 3, /* TCODE_READQ_RESPONSE */ 4, /* TCODE_READB_RESPONSE */ - 1, /* TCODE_CYCLE_START (???) */ + 1, /* TCODE_CYCLE_START */ 4, /* TCODE_LOCK_REQUEST */ 2, /* TCODE_ISO_DATA */ 4, /* TCODE_LOCK_RESPONSE */ + /* rest is reserved or link-internal */ }; -/* Swap headers */ -static inline void packet_swab(quadlet_t *data, int tcode) +static inline void header_le32_to_cpu(quadlet_t *data, unsigned char tcode) { - size_t size = hdr_sizes[tcode]; + size_t size; - if (tcode > TCODE_LOCK_RESPONSE || hdr_sizes[tcode] == 0) + if (unlikely(tcode >= ARRAY_SIZE(hdr_sizes))) return; + size = hdr_sizes[tcode]; while (size--) - data[size] = swab32(data[size]); + data[size] = le32_to_cpu(data[size]); } #else -/* Don't waste cycles on same sex byte swaps */ -#define packet_swab(w,x) +#define header_le32_to_cpu(w,x) do {} while (0) #endif /* !LITTLE_ENDIAN */ /*********************************** @@ -470,7 +468,6 @@ static int get_nb_iso_ctx(struct ti_ohci *ohci, int reg) /* Global initialization */ static void ohci_initialize(struct ti_ohci *ohci) { - char irq_buf[16]; quadlet_t buf; int num_ports, i; @@ -544,12 +541,20 @@ static void ohci_initialize(struct ti_ohci *ohci) /* Initialize IR Legacy DMA channel mask */ ohci->ir_legacy_channels = 0; - /* - * Accept AT requests from all nodes. This probably - * will have to be controlled from the subsystem - * on a per node basis. - */ - reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0x80000000); + /* Accept AR requests from all nodes */ + reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); + + /* Set the address range of the physical response unit. + * Most controllers do not implement it as a writable register though. + * They will keep a hardwired offset of 0x00010000 and show 0x0 as + * register content. + * To actually enable physical responses is the job of our interrupt + * handler which programs the physical request filter. */ + reg_write(ohci, OHCI1394_PhyUpperBound, + OHCI1394_PHYS_UPPER_BOUND_PROGRAMMED >> 16); + + DBGMSG("physUpperBoundOffset=%08x", + reg_read(ohci, OHCI1394_PhyUpperBound)); /* Specify AT retries */ reg_write(ohci, OHCI1394_ATRetries, @@ -572,23 +577,20 @@ static void ohci_initialize(struct ti_ohci *ohci) OHCI1394_reqTxComplete | OHCI1394_isochRx | OHCI1394_isochTx | + OHCI1394_postedWriteErr | + OHCI1394_cycleTooLong | OHCI1394_cycleInconsistent); /* Enable link */ reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_linkEnable); buf = reg_read(ohci, OHCI1394_Version); -#ifndef __sparc__ - sprintf (irq_buf, "%d", ohci->dev->irq); -#else - sprintf (irq_buf, "%s", __irq_itoa(ohci->dev->irq)); -#endif - PRINT(KERN_INFO, "OHCI-1394 %d.%d (PCI): IRQ=[%s] " - "MMIO=[%lx-%lx] Max Packet=[%d] IR/IT contexts=[%d/%d]", + PRINT(KERN_INFO, "OHCI-1394 %d.%d (PCI): IRQ=[%d] " + "MMIO=[%llx-%llx] Max Packet=[%d] IR/IT contexts=[%d/%d]", ((((buf) >> 16) & 0xf) + (((buf) >> 20) & 0xf) * 10), - ((((buf) >> 4) & 0xf) + ((buf) & 0xf) * 10), irq_buf, - pci_resource_start(ohci->dev, 0), - pci_resource_start(ohci->dev, 0) + OHCI1394_REGISTER_SIZE - 1, + ((((buf) >> 4) & 0xf) + ((buf) & 0xf) * 10), ohci->dev->irq, + (unsigned long long)pci_resource_start(ohci->dev, 0), + (unsigned long long)pci_resource_start(ohci->dev, 0) + OHCI1394_REGISTER_SIZE - 1, ohci->max_packet_size, ohci->nb_iso_rcv_ctx, ohci->nb_iso_xmit_ctx); @@ -696,7 +698,7 @@ static void insert_packet(struct ti_ohci *ohci, d->prg_cpu[idx]->data[2] = packet->header[2]; d->prg_cpu[idx]->data[3] = packet->header[3]; } - packet_swab(d->prg_cpu[idx]->data, packet->tcode); + header_le32_to_cpu(d->prg_cpu[idx]->data, packet->tcode); } if (packet->data_size) { /* block transmit */ @@ -772,7 +774,7 @@ static void insert_packet(struct ti_ohci *ohci, d->prg_cpu[idx]->data[0] = packet->speed_code<<16 | (packet->header[0] & 0xFFFF); d->prg_cpu[idx]->data[1] = packet->header[0] & 0xFFFF0000; - packet_swab(d->prg_cpu[idx]->data, packet->tcode); + header_le32_to_cpu(d->prg_cpu[idx]->data, packet->tcode); d->prg_cpu[idx]->begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE | @@ -1221,7 +1223,7 @@ static int ohci_iso_recv_init(struct hpsb_iso *iso) int ctx; int ret = -ENOMEM; - recv = kmalloc(sizeof(*recv), SLAB_KERNEL); + recv = kmalloc(sizeof(*recv), GFP_KERNEL); if (!recv) return -ENOMEM; @@ -1914,7 +1916,7 @@ static int ohci_iso_xmit_init(struct hpsb_iso *iso) int ctx; int ret = -ENOMEM; - xmit = kmalloc(sizeof(*xmit), SLAB_KERNEL); + xmit = kmalloc(sizeof(*xmit), GFP_KERNEL); if (!xmit) return -ENOMEM; @@ -2297,8 +2299,7 @@ static void ohci_schedule_iso_tasklets(struct ti_ohci *ohci, spin_unlock_irqrestore(&ohci->iso_tasklet_list_lock, flags); } -static irqreturn_t ohci_irq_handler(int irq, void *dev_id, - struct pt_regs *regs_are_unused) +static irqreturn_t ohci_irq_handler(int irq, void *dev_id) { quadlet_t event, node_id; struct ti_ohci *ohci = (struct ti_ohci *)dev_id; @@ -2374,7 +2375,19 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id, event &= ~OHCI1394_unrecoverableError; } - + if (event & OHCI1394_postedWriteErr) { + PRINT(KERN_ERR, "physical posted write error"); + /* no recovery strategy yet, had to involve protocol drivers */ + } + if (event & OHCI1394_cycleTooLong) { + if(printk_ratelimit()) + PRINT(KERN_WARNING, "isochronous cycle too long"); + else + DBGMSG("OHCI1394_cycleTooLong"); + reg_write(ohci, OHCI1394_LinkControlSet, + OHCI1394_LinkControl_CycleMaster); + event &= ~OHCI1394_cycleTooLong; + } if (event & OHCI1394_cycleInconsistent) { /* We subscribe to the cycleInconsistent event only to * clear the corresponding event bit... otherwise, @@ -2382,7 +2395,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id, DBGMSG("OHCI1394_cycleInconsistent"); event &= ~OHCI1394_cycleInconsistent; } - if (event & OHCI1394_busReset) { /* The busReset event bit can't be cleared during the * selfID phase, so we disable busReset interrupts, to @@ -2426,7 +2438,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id, } event &= ~OHCI1394_busReset; } - if (event & OHCI1394_reqTxComplete) { struct dma_trm_ctx *d = &ohci->at_req_context; DBGMSG("Got reqTxComplete interrupt " @@ -2514,26 +2525,20 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id, reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); spin_unlock_irqrestore(&ohci->event_lock, flags); - /* Accept Physical requests from all nodes. */ - reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0xffffffff); - reg_write(ohci,OHCI1394_AsReqFilterLoSet, 0xffffffff); - /* Turn on phys dma reception. * * TODO: Enable some sort of filtering management. */ if (phys_dma) { - reg_write(ohci,OHCI1394_PhyReqFilterHiSet, 0xffffffff); - reg_write(ohci,OHCI1394_PhyReqFilterLoSet, 0xffffffff); - reg_write(ohci,OHCI1394_PhyUpperBound, 0x01000000); - } else { - reg_write(ohci,OHCI1394_PhyReqFilterHiSet, 0x00000000); - reg_write(ohci,OHCI1394_PhyReqFilterLoSet, 0x00000000); + reg_write(ohci, OHCI1394_PhyReqFilterHiSet, + 0xffffffff); + reg_write(ohci, OHCI1394_PhyReqFilterLoSet, + 0xffffffff); } DBGMSG("PhyReqFilter=%08x%08x", - reg_read(ohci,OHCI1394_PhyReqFilterHiSet), - reg_read(ohci,OHCI1394_PhyReqFilterLoSet)); + reg_read(ohci, OHCI1394_PhyReqFilterHiSet), + reg_read(ohci, OHCI1394_PhyReqFilterLoSet)); hpsb_selfid_complete(host, phyid, isroot); } else @@ -2589,8 +2594,9 @@ static const int TCODE_SIZE[16] = {20, 0, 16, -1, 16, 20, 20, 0, * Determine the length of a packet in the buffer * Optimization suggested by Pascal Drolet */ -static __inline__ int packet_length(struct dma_rcv_ctx *d, int idx, quadlet_t *buf_ptr, - int offset, unsigned char tcode, int noswap) +static inline int packet_length(struct dma_rcv_ctx *d, int idx, + quadlet_t *buf_ptr, int offset, + unsigned char tcode, int noswap) { int length = -1; @@ -2721,7 +2727,7 @@ static void dma_rcv_tasklet (unsigned long data) * bus reset. We always ignore it. */ if (tcode != OHCI1394_TCODE_PHY) { if (!ohci->no_swap_incoming) - packet_swab(d->spb, tcode); + header_le32_to_cpu(d->spb, tcode); DBGMSG("Packet received from node" " %d ack=0x%02X spd=%d tcode=0x%X" " length=%d ctx=%d tlabel=%d", @@ -2729,7 +2735,7 @@ static void dma_rcv_tasklet (unsigned long data) (cond_le32_to_cpu(d->spb[length/4-1], ohci->no_swap_incoming)>>16)&0x1f, (cond_le32_to_cpu(d->spb[length/4-1], ohci->no_swap_incoming)>>21)&0x3, tcode, length, d->ctx, - (cond_le32_to_cpu(d->spb[0], ohci->no_swap_incoming)>>10)&0x3f); + (d->spb[0]>>10)&0x3f); ack = (((cond_le32_to_cpu(d->spb[length/4-1], ohci->no_swap_incoming)>>16)&0x1f) == 0x11) ? 1 : 0; @@ -3013,7 +3019,7 @@ alloc_dma_rcv_ctx(struct ti_ohci *ohci, struct dma_rcv_ctx *d, return -ENOMEM; } - d->prg_cpu[i] = pci_pool_alloc(d->prg_pool, SLAB_KERNEL, d->prg_bus+i); + d->prg_cpu[i] = pci_pool_alloc(d->prg_pool, GFP_KERNEL, d->prg_bus+i); OHCI_DMA_ALLOC("pool dma_rcv prg[%d]", i); if (d->prg_cpu[i] != NULL) { @@ -3109,7 +3115,7 @@ alloc_dma_trm_ctx(struct ti_ohci *ohci, struct dma_trm_ctx *d, OHCI_DMA_ALLOC("dma_rcv prg pool"); for (i = 0; i < d->num_desc; i++) { - d->prg_cpu[i] = pci_pool_alloc(d->prg_pool, SLAB_KERNEL, d->prg_bus+i); + d->prg_cpu[i] = pci_pool_alloc(d->prg_pool, GFP_KERNEL, d->prg_bus+i); OHCI_DMA_ALLOC("pool dma_trm prg[%d]", i); if (d->prg_cpu[i] != NULL) { @@ -3207,7 +3213,19 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev, { struct hpsb_host *host; struct ti_ohci *ohci; /* shortcut to currently handled device */ - unsigned long ohci_base; + resource_size_t ohci_base; + +#ifdef CONFIG_PPC_PMAC + /* Necessary on some machines if ohci1394 was loaded/ unloaded before */ + if (machine_is(powermac)) { + struct device_node *ofn = pci_device_to_OF_node(dev); + + if (ofn) { + pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 1); + pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 1); + } + } +#endif /* CONFIG_PPC_PMAC */ if (pci_enable_device(dev)) FAIL(-ENXIO, "Failed to enable OHCI hardware"); @@ -3259,16 +3277,17 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev, * fail to report the right length. Anyway, the ohci spec * clearly says it's 2kb, so this shouldn't be a problem. */ ohci_base = pci_resource_start(dev, 0); - if (pci_resource_len(dev, 0) != OHCI1394_REGISTER_SIZE) - PRINT(KERN_WARNING, "Unexpected PCI resource length of %lx!", - pci_resource_len(dev, 0)); + if (pci_resource_len(dev, 0) < OHCI1394_REGISTER_SIZE) + PRINT(KERN_WARNING, "PCI resource length of 0x%llx too small!", + (unsigned long long)pci_resource_len(dev, 0)); /* Seems PCMCIA handles this internally. Not sure why. Seems * pretty bogus to force a driver to special case this. */ #ifndef PCMCIA if (!request_mem_region (ohci_base, OHCI1394_REGISTER_SIZE, OHCI1394_DRIVER_NAME)) - FAIL(-ENOMEM, "MMIO resource (0x%lx - 0x%lx) unavailable", - ohci_base, ohci_base + OHCI1394_REGISTER_SIZE); + FAIL(-ENOMEM, "MMIO resource (0x%llx - 0x%llx) unavailable", + (unsigned long long)ohci_base, + (unsigned long long)ohci_base + OHCI1394_REGISTER_SIZE); #endif ohci->init_state = OHCI_INIT_HAVE_MEM_REGION; @@ -3382,12 +3401,12 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev, spin_lock_init(&ohci->event_lock); /* - * interrupts are disabled, all right, but... due to SA_SHIRQ we + * interrupts are disabled, all right, but... due to IRQF_SHARED we * might get called anyway. We'll see no event, of course, but * we need to get to that "no event", so enough should be initialized * by that point. */ - if (request_irq(dev->irq, ohci_irq_handler, SA_SHIRQ, + if (request_irq(dev->irq, ohci_irq_handler, IRQF_SHARED, OHCI1394_DRIVER_NAME, ohci)) FAIL(-ENOMEM, "Failed to allocate shared interrupt %d", dev->irq); @@ -3401,6 +3420,14 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev, host->csr.max_rec = (reg_read(ohci, OHCI1394_BusOptions) >> 12) & 0xf; host->csr.lnk_spd = reg_read(ohci, OHCI1394_BusOptions) & 0x7; + if (phys_dma) { + host->low_addr_space = + (u64) reg_read(ohci, OHCI1394_PhyUpperBound) << 16; + if (!host->low_addr_space) + host->low_addr_space = OHCI1394_PHYS_UPPER_BOUND_FIXED; + } + host->middle_addr_space = OHCI1394_MIDDLE_ADDRESS_SPACE; + /* Tell the highlevel this host is ready */ if (hpsb_add_host(host)) FAIL(-ENOMEM, "Failed to register host with highlevel"); @@ -3459,24 +3486,13 @@ static void ohci1394_pci_remove(struct pci_dev *pdev) case OHCI_INIT_HAVE_TXRX_BUFFERS__MAYBE: /* The ohci_soft_reset() stops all DMA contexts, so we * dont need to do this. */ - /* Free AR dma */ free_dma_rcv_ctx(&ohci->ar_req_context); free_dma_rcv_ctx(&ohci->ar_resp_context); - - /* Free AT dma */ free_dma_trm_ctx(&ohci->at_req_context); free_dma_trm_ctx(&ohci->at_resp_context); - - /* Free IR dma */ free_dma_rcv_ctx(&ohci->ir_legacy_context); - - /* Free IT dma */ free_dma_trm_ctx(&ohci->it_legacy_context); - /* Free IR legacy dma */ - free_dma_rcv_ctx(&ohci->ir_legacy_context); - - case OHCI_INIT_HAVE_SELFID_BUFFER: pci_free_consistent(ohci->dev, OHCI1394_SI_DMA_BUF_SIZE, ohci->selfid_buf_cpu, @@ -3499,17 +3515,14 @@ static void ohci1394_pci_remove(struct pci_dev *pdev) #endif #ifdef CONFIG_PPC_PMAC - /* On UniNorth, power down the cable and turn off the chip - * clock when the module is removed to save power on - * laptops. Turning it back ON is done by the arch code when - * pci_enable_device() is called */ - { - struct device_node* of_node; - - of_node = pci_device_to_OF_node(ohci->dev); - if (of_node) { - pmac_call_feature(PMAC_FTR_1394_ENABLE, of_node, 0, 0); - pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, of_node, 0, 0); + /* On UniNorth, power down the cable and turn off the chip clock + * to save power on laptops */ + if (machine_is(powermac)) { + struct device_node* ofn = pci_device_to_OF_node(ohci->dev); + + if (ofn) { + pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 0); + pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 0); } } #endif /* CONFIG_PPC_PMAC */ @@ -3522,45 +3535,104 @@ static void ohci1394_pci_remove(struct pci_dev *pdev) put_device(dev); } - -static int ohci1394_pci_resume (struct pci_dev *pdev) +#ifdef CONFIG_PM +static int ohci1394_pci_suspend(struct pci_dev *pdev, pm_message_t state) { + int err; + struct ti_ohci *ohci = pci_get_drvdata(pdev); + + printk(KERN_INFO "%s does not fully support suspend and resume yet\n", + OHCI1394_DRIVER_NAME); + + if (!ohci) { + printk(KERN_ERR "%s: tried to suspend nonexisting host\n", + OHCI1394_DRIVER_NAME); + return -ENXIO; + } + DBGMSG("suspend called"); + + /* Clear the async DMA contexts and stop using the controller */ + hpsb_bus_reset(ohci->host); + + /* See ohci1394_pci_remove() for comments on this sequence */ + reg_write(ohci, OHCI1394_ConfigROMhdr, 0); + reg_write(ohci, OHCI1394_BusOptions, + (reg_read(ohci, OHCI1394_BusOptions) & 0x0000f007) | + 0x00ff0000); + reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff); + reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); + reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff); + reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff); + reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff); + reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff); + set_phy_reg(ohci, 4, ~0xc0 & get_phy_reg(ohci, 4)); + reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff); + ohci_devctl(ohci->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT); + ohci_soft_reset(ohci); + + err = pci_save_state(pdev); + if (err) { + PRINT(KERN_ERR, "pci_save_state failed with %d", err); + return err; + } + err = pci_set_power_state(pdev, pci_choose_state(pdev, state)); + if (err) + DBGMSG("pci_set_power_state failed with %d", err); + +/* PowerMac suspend code comes last */ #ifdef CONFIG_PPC_PMAC - if (_machine == _MACH_Pmac) { - struct device_node *of_node; + if (machine_is(powermac)) { + struct device_node *ofn = pci_device_to_OF_node(pdev); - /* Re-enable 1394 */ - of_node = pci_device_to_OF_node (pdev); - if (of_node) - pmac_call_feature (PMAC_FTR_1394_ENABLE, of_node, 0, 1); + if (ofn) + pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 0); } #endif /* CONFIG_PPC_PMAC */ - pci_restore_state(pdev); - pci_enable_device(pdev); - return 0; } - -static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state) +static int ohci1394_pci_resume(struct pci_dev *pdev) { - pci_save_state(pdev); + int err; + struct ti_ohci *ohci = pci_get_drvdata(pdev); + + if (!ohci) { + printk(KERN_ERR "%s: tried to resume nonexisting host\n", + OHCI1394_DRIVER_NAME); + return -ENXIO; + } + DBGMSG("resume called"); +/* PowerMac resume code comes first */ #ifdef CONFIG_PPC_PMAC - if (_machine == _MACH_Pmac) { - struct device_node *of_node; + if (machine_is(powermac)) { + struct device_node *ofn = pci_device_to_OF_node(pdev); - /* Disable 1394 */ - of_node = pci_device_to_OF_node (pdev); - if (of_node) - pmac_call_feature(PMAC_FTR_1394_ENABLE, of_node, 0, 0); + if (ofn) + pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 1); } -#endif +#endif /* CONFIG_PPC_PMAC */ + + pci_set_power_state(pdev, PCI_D0); + pci_restore_state(pdev); + err = pci_enable_device(pdev); + if (err) { + PRINT(KERN_ERR, "pci_enable_device failed with %d", err); + return err; + } + + /* See ohci1394_pci_probe() for comments on this sequence */ + ohci_soft_reset(ohci); + reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS); + reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); + reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff); + mdelay(50); + ohci_initialize(ohci); return 0; } - +#endif /* CONFIG_PM */ #define PCI_CLASS_FIREWIRE_OHCI ((PCI_CLASS_SERIAL_FIREWIRE << 8) | 0x10) @@ -3583,8 +3655,10 @@ static struct pci_driver ohci1394_pci_driver = { .id_table = ohci1394_pci_tbl, .probe = ohci1394_pci_probe, .remove = ohci1394_pci_remove, +#ifdef CONFIG_PM .resume = ohci1394_pci_resume, .suspend = ohci1394_pci_suspend, +#endif }; /*********************************** @@ -3711,5 +3785,7 @@ static int __init ohci1394_init(void) return pci_register_driver(&ohci1394_pci_driver); } -module_init(ohci1394_init); +/* Register before most other device drivers. + * Useful for remote debugging via physical DMA, e.g. using firescope. */ +fs_initcall(ohci1394_init); module_exit(ohci1394_cleanup);