X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;ds=sidebyside;f=include%2Fasm-arm%2Farch-ixp2000%2Firqs.h;h=62f09c7ff420243a5b651ee565f48d51a2b9d405;hb=43bc926fffd92024b46cafaf7350d669ba9ca884;hp=6ef085909c1031b571af971a0b4e0bcce8130063;hpb=6a77f38946aaee1cd85eeec6cf4229b204c15071;p=linux-2.6.git diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h index 6ef085909..62f09c7ff 100644 --- a/include/asm-arm/arch-ixp2000/irqs.h +++ b/include/asm-arm/arch-ixp2000/irqs.h @@ -45,12 +45,12 @@ #define IRQ_IXP2000_ME_ATTN 14 #define IRQ_IXP2000_PCI 15 /* PCI INTA or INTB */ #define IRQ_IXP2000_THDA0 16 /* thread 0-31A */ -#define IRQ_IXP2000_THDA1 17 /* thread 32-63A */ -#define IRQ_IXP2000_THDA2 18 /* thread 64-95A, IXP2800 only */ +#define IRQ_IXP2000_THDA1 17 /* thread 32-63A, IXP2800 only */ +#define IRQ_IXP2000_THDA2 18 /* thread 64-95A */ #define IRQ_IXP2000_THDA3 19 /* thread 96-127A, IXP2800 only */ #define IRQ_IXP2000_THDB0 24 /* thread 0-31B */ -#define IRQ_IXP2000_THDB1 25 /* thread 32-63B */ -#define IRQ_IXP2000_THDB2 26 /* thread 64-95B, IXP2800 only */ +#define IRQ_IXP2000_THDB1 25 /* thread 32-63B, IXP2800 only */ +#define IRQ_IXP2000_THDB2 26 /* thread 64-95B */ #define IRQ_IXP2000_THDB3 27 /* thread 96-127B, IXP2800 only */ /* define generic GPIOs */ @@ -67,12 +67,45 @@ #define IRQ_IXP2000_PCIA 40 #define IRQ_IXP2000_PCIB 41 -#define NR_IXP2000_IRQS 42 +/* Int sources from IRQ_ERROR_STATUS */ +#define IRQ_IXP2000_DRAM0_MIN_ERR 42 +#define IRQ_IXP2000_DRAM0_MAJ_ERR 43 +#define IRQ_IXP2000_DRAM1_MIN_ERR 44 +#define IRQ_IXP2000_DRAM1_MAJ_ERR 45 +#define IRQ_IXP2000_DRAM2_MIN_ERR 46 +#define IRQ_IXP2000_DRAM2_MAJ_ERR 47 +/* 48-57 reserved */ +#define IRQ_IXP2000_SRAM0_ERR 58 +#define IRQ_IXP2000_SRAM1_ERR 59 +#define IRQ_IXP2000_SRAM2_ERR 60 +#define IRQ_IXP2000_SRAM3_ERR 61 +/* 62-65 reserved */ +#define IRQ_IXP2000_MEDIA_ERR 66 +#define IRQ_IXP2000_PCI_ERR 67 +#define IRQ_IXP2000_SP_INT 68 + +#define NR_IXP2000_IRQS 69 #define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) #define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) +#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) +#define IXP2000_VALID_ERR_IRQ_MASK (\ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \ + IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) ) + /* * This allows for all the on-chip sources plus up to 32 CPLD based * IRQs. Should be more than enough.