X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;ds=sidebyside;f=include%2Fasm-arm%2Farch-s3c2410%2Fregs-dsc.h;h=a023b0434efedd87da3fd636fae2f06924716e50;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=0da1ec7b7675c8618244f0d533d43bbaf1f0633d;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git

diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h
index 0da1ec7b7..a023b0434 100644
--- a/include/asm-arm/arch-s3c2410/regs-dsc.h
+++ b/include/asm-arm/arch-s3c2410/regs-dsc.h
@@ -20,15 +20,15 @@
 
 #ifdef CONFIG_CPU_S3C2440
 
-#define S3C2440_DSC0	   S3C2410_GPIOREG(0xc0)
-#define S3C2440_DSC1	   S3C2410_GPIOREG(0xc4)
+#define S3C2440_DSC0	   S3C2410_GPIOREG(0xc4)
+#define S3C2440_DSC1	   S3C2410_GPIOREG(0xc8)
 
 #define S3C2440_SELECT_DSC0 (0)
 #define S3C2440_SELECT_DSC1 (1<<31)
 
 #define S3C2440_DSC_GETSHIFT(x) ((x) & 31)
 
-#define S3C2440_DSC0_ENABLE     (1<<31)
+#define S3C2440_DSC0_DISABLE	(1<<31)
 
 #define S3C2440_DSC0_ADDR       (S3C2440_SELECT_DSC0 | 8)
 #define S3C2440_DSC0_ADDR_12mA  (0<<8)
@@ -69,19 +69,19 @@
 #define S3C2440_DSC0_DATA0_6mA  (3<<0)
 #define S3C2440_DSC0_DATA0_MASK (3<<0)
 
-#define S3C2440_DSC1_SCK0       (S3C2440_SELECT_DSC1 | 28)
-#define S3C2440_DSC1_SCK0_12mA  (0<<28)
-#define S3C2440_DSC1_SCK0_10mA  (1<<28)
-#define S3C2440_DSC1_SCK0_8mA   (2<<28)
-#define S3C2440_DSC1_SCK0_6mA   (3<<28)
-#define S3C2440_DSC1_SCK0_MASK  (3<<28)
-
-#define S3C2440_DSC1_SCK1       (S3C2440_SELECT_DSC1 | 26)
-#define S3C2440_DSC1_SCK1_12mA  (0<<26)
-#define S3C2440_DSC1_SCK1_10mA  (1<<26)
-#define S3C2440_DSC1_SCK1_8mA   (2<<26)
-#define S3C2440_DSC1_SCK1_6mA   (3<<26)
-#define S3C2440_DSC1_SCK1_MASK  (3<<26)
+#define S3C2440_DSC1_SCK1       (S3C2440_SELECT_DSC1 | 28)
+#define S3C2440_DSC1_SCK1_12mA  (0<<28)
+#define S3C2440_DSC1_SCK1_10mA  (1<<28)
+#define S3C2440_DSC1_SCK1_8mA   (2<<28)
+#define S3C2440_DSC1_SCK1_6mA   (3<<28)
+#define S3C2440_DSC1_SCK1_MASK  (3<<28)
+
+#define S3C2440_DSC1_SCK0       (S3C2440_SELECT_DSC1 | 26)
+#define S3C2440_DSC1_SCK0_12mA  (0<<26)
+#define S3C2440_DSC1_SCK0_10mA  (1<<26)
+#define S3C2440_DSC1_SCK0_8mA   (2<<26)
+#define S3C2440_DSC1_SCK0_6mA   (3<<26)
+#define S3C2440_DSC1_SCK0_MASK  (3<<26)
 
 #define S3C2440_DSC1_SCKE       (S3C2440_SELECT_DSC1 | 24)
 #define S3C2440_DSC1_SCKE_10mA  (0<<24)