X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Farm%2Fmach-footbridge%2Ftime.c;h=5d02e95dede310ac52c00cb3e8832b5a83760d09;hb=refs%2Fheads%2Fvserver;hp=e9f5708b44218368cc4615aaeb72a3f844f57158;hpb=5fc42a6ed0ec81088c37caadb45898ae6cd0ad2c;p=linux-2.6.git

diff --git a/arch/arm/mach-footbridge/time.c b/arch/arm/mach-footbridge/time.c
index e9f5708b4..5d02e95de 100644
--- a/arch/arm/mach-footbridge/time.c
+++ b/arch/arm/mach-footbridge/time.c
@@ -19,99 +19,27 @@
 
 #include <linux/timex.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/sched.h>
 #include <linux/mc146818rtc.h>
 #include <linux/bcd.h>
 
-#include <asm/hardware/dec21285.h>
-
 #include <asm/hardware.h>
-#include <asm/irq.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
 #include <asm/io.h>
-#include <asm/hardware/clps7111.h>
 
 #include <asm/mach/time.h>
+#include "common.h"
 
 static int rtc_base;
 
-#define mSEC_10_from_14 ((14318180 + 100) / 200)
-
-static unsigned long isa_gettimeoffset(void)
-{
-	int count;
-
-	static int count_p = (mSEC_10_from_14/6);    /* for the first call after boot */
-	static unsigned long jiffies_p = 0;
-
-	/*
-	 * cache volatile jiffies temporarily; we have IRQs turned off. 
-	 */
-	unsigned long jiffies_t;
-
-	/* timer count may underflow right here */
-	outb_p(0x00, 0x43);	/* latch the count ASAP */
-
-	count = inb_p(0x40);	/* read the latched count */
-
-	/*
-	 * We do this guaranteed double memory access instead of a _p 
-	 * postfix in the previous port access. Wheee, hackady hack
-	 */
- 	jiffies_t = jiffies;
-
-	count |= inb_p(0x40) << 8;
-
-	/* Detect timer underflows.  If we haven't had a timer tick since 
-	   the last time we were called, and time is apparently going
-	   backwards, the counter must have wrapped during this routine. */
-	if ((jiffies_t == jiffies_p) && (count > count_p))
-		count -= (mSEC_10_from_14/6);
-	else
-		jiffies_p = jiffies_t;
-
-	count_p = count;
-
-	count = (((mSEC_10_from_14/6)-1) - count) * (tick_nsec / 1000);
-	count = (count + (mSEC_10_from_14/6)/2) / (mSEC_10_from_14/6);
-
-	return count;
-}
-
-static irqreturn_t
-isa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	timer_tick(regs);
-
-	return IRQ_HANDLED;
-}
-
 static unsigned long __init get_isa_cmos_time(void)
 {
 	unsigned int year, mon, day, hour, min, sec;
-	int i;
 
 	// check to see if the RTC makes sense.....
 	if ((CMOS_READ(RTC_VALID) & RTC_VRT) == 0)
 		return mktime(1970, 1, 1, 0, 0, 0);
 
-	/* The Linux interpretation of the CMOS clock register contents:
-	 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
-	 * RTC registers show the second which has precisely just started.
-	 * Let's hope other operating systems interpret the RTC the same way.
-	 */
-	/* read RTC exactly on falling edge of update flag */
-	for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
-		if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
-			break;
-
-	for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */
-		if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
-			break;
-
-	do { /* Isn't this overkill ? UIP above should guarantee consistency */
+	do {
 		sec  = CMOS_READ(RTC_SECONDS);
 		min  = CMOS_READ(RTC_MINUTES);
 		hour = CMOS_READ(RTC_HOURS);
@@ -133,8 +61,7 @@ static unsigned long __init get_isa_cmos_time(void)
 	return mktime(year, mon, day, hour, min, sec);
 }
 
-static int
-set_isa_cmos_time(void)
+static int set_isa_cmos_time(void)
 {
 	int retval = 0;
 	int real_seconds, real_minutes, cmos_minutes;
@@ -186,34 +113,7 @@ set_isa_cmos_time(void)
 	return retval;
 }
 
-
-static unsigned long timer1_latch;
-
-static unsigned long timer1_gettimeoffset (void)
-{
-	unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
-
-	return ((tick_nsec / 1000) * value) / timer1_latch;
-}
-
-static irqreturn_t
-timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	*CSR_TIMER1_CLR = 0;
-
-	timer_tick(regs);
-
-	return IRQ_HANDLED;
-}
-
-static struct irqaction footbridge_timer_irq = {
-	.flags	= SA_INTERRUPT
-};
-
-/*
- * Set up timer interrupt.
- */
-void __init footbridge_init_time(void)
+void __init isa_rtc_init(void)
 {
 	if (machine_is_co285() ||
 	    machine_is_personal_server())
@@ -262,35 +162,4 @@ void __init footbridge_init_time(void)
 		} else
 			rtc_base = 0;
 	}
-
-	if (machine_is_ebsa285() ||
-	    machine_is_co285() ||
-	    machine_is_personal_server()) {
-		gettimeoffset = timer1_gettimeoffset;
-
-		timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
-
-		*CSR_TIMER1_CLR  = 0;
-		*CSR_TIMER1_LOAD = timer1_latch;
-		*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
-
-		footbridge_timer_irq.name = "Timer1 Timer Tick";
-		footbridge_timer_irq.handler = timer1_interrupt;
-		
-		setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
-
-	} else {
-		/* enable PIT timer */
-		/* set for periodic (4) and LSB/MSB write (0x30) */
-		outb(0x34, 0x43);
-		outb((mSEC_10_from_14/6) & 0xFF, 0x40);
-		outb((mSEC_10_from_14/6) >> 8, 0x40);
-
-		gettimeoffset = isa_gettimeoffset;
-
-		footbridge_timer_irq.name = "ISA Timer Tick";
-		footbridge_timer_irq.handler = isa_timer_interrupt;
-		
-		setup_irq(IRQ_ISA_TIMER, &footbridge_timer_irq);
-	}
 }