X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Farm%2Fmach-omap%2Fmux.c;h=bcf3c6e5ecd06802b3a11d3ad85250f0dd21a95b;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=70665dfafeee9fc93a2fd0a9153c47cde76eb1bc;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git

diff --git a/arch/arm/mach-omap/mux.c b/arch/arm/mach-omap/mux.c
index 70665dfaf..bcf3c6e5e 100644
--- a/arch/arm/mach-omap/mux.c
+++ b/arch/arm/mach-omap/mux.c
@@ -32,18 +32,26 @@
 #define __MUX_C__
 #include <asm/arch/mux.h>
 
+#ifdef CONFIG_OMAP_MUX
+
 /*
  * Sets the Omap MUX and PULL_DWN registers based on the table
  */
-int omap_cfg_reg(const reg_cfg_t reg_cfg)
+int __init_or_module
+omap_cfg_reg(const reg_cfg_t reg_cfg)
 {
-#ifdef CONFIG_OMAP_MUX
-	static spinlock_t mux_spin_lock = SPIN_LOCK_UNLOCKED;
+	static DEFINE_SPINLOCK(mux_spin_lock);
 
 	unsigned long flags;
 	reg_cfg_set *cfg;
 	unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
 		pull_orig = 0, pull = 0;
+	unsigned int mask, warn = 0;
+
+	if (reg_cfg > ARRAY_SIZE(reg_cfg_table)) {
+		printk(KERN_ERR "MUX: reg_cfg %d\n", reg_cfg);
+		return -EINVAL;
+	}
 
 	cfg = &reg_cfg_table[reg_cfg];
 
@@ -56,12 +64,20 @@ int omap_cfg_reg(const reg_cfg_t reg_cfg)
 
 	/* Check the mux register in question */
 	if (cfg->mux_reg) {
+		unsigned	tmp1, tmp2;
+
 		reg_orig = omap_readl(cfg->mux_reg);
 
 		/* The mux registers always seem to be 3 bits long */
-		reg = reg_orig & ~(0x7 << cfg->mask_offset);
+		mask = (0x7 << cfg->mask_offset);
+		tmp1 = reg_orig & mask;
+		reg = reg_orig & ~mask;
+
+		tmp2 = (cfg->mask << cfg->mask_offset);
+		reg |= tmp2;
 
-		reg |= (cfg->mask << cfg->mask_offset);
+		if (tmp1 != tmp2)
+			warn = 1;
 
 		omap_writel(reg, cfg->mux_reg);
 	}
@@ -70,12 +86,18 @@ int omap_cfg_reg(const reg_cfg_t reg_cfg)
 	if (!cpu_is_omap1510()) {
 		if (cfg->pu_pd_reg && cfg->pull_val) {
 			pu_pd_orig = omap_readl(cfg->pu_pd_reg);
+			mask = 1 << cfg->pull_bit;
+
 			if (cfg->pu_pd_val) {
+				if (!(pu_pd_orig & mask))
+					warn = 1;
 				/* Use pull up */
-				pu_pd = pu_pd_orig | (1 << cfg->pull_bit);
+				pu_pd = pu_pd_orig | mask;
 			} else {
+				if (pu_pd_orig & mask)
+					warn = 1;
 				/* Use pull down */
-				pu_pd = pu_pd_orig & ~(1 << cfg->pull_bit);
+				pu_pd = pu_pd_orig & ~mask;
 			}
 			omap_writel(pu_pd, cfg->pu_pd_reg);
 		}
@@ -84,21 +106,32 @@ int omap_cfg_reg(const reg_cfg_t reg_cfg)
 	/* Check for an associated pull down register */
 	if (cfg->pull_reg) {
 		pull_orig = omap_readl(cfg->pull_reg);
+		mask = 1 << cfg->pull_bit;
 
 		if (cfg->pull_val) {
+			if (pull_orig & mask)
+				warn = 1;
 			/* Low bit = pull enabled */
-			pull = pull_orig & ~(1 << cfg->pull_bit);
+			pull = pull_orig & ~mask;
 		} else {
+			if (!(pull_orig & mask))
+				warn = 1;
 			/* High bit = pull disabled */
-			pull = pull_orig | (1 << cfg->pull_bit);
+			pull = pull_orig | mask;
 		}
 
 		omap_writel(pull, cfg->pull_reg);
 	}
 
+	if (warn) {
+#ifdef CONFIG_OMAP_MUX_WARNINGS
+		printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
+#endif
+	}
+
 #ifdef CONFIG_OMAP_MUX_DEBUG
-	if (cfg->debug) {
-		printk("Omap: Setting register %s\n", cfg->name);
+	if (cfg->debug || warn) {
+		printk("MUX: Setting register %s\n", cfg->name);
 		printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 		       cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
 
@@ -118,8 +151,13 @@ int omap_cfg_reg(const reg_cfg_t reg_cfg)
 
 	spin_unlock_irqrestore(&mux_spin_lock, flags);
 
-#endif
+#ifdef CONFIG_OMAP_MUX_ERRORS
+	return warn ? -ETXTBSY : 0;
+#else
 	return 0;
+#endif
 }
 
 EXPORT_SYMBOL(omap_cfg_reg);
+
+#endif	/* CONFIG_OMAP_MUX */