X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Farm%2Fmm%2Fmm-armv.c;h=50c2c0f8d7177d3d8be8283e4e32a6acfc66913c;hb=746550cff061581f89c687ada8523670768364f2;hp=1b5a3f75ee0d6590682f21aebe4c8f3c9c4422b4;hpb=86090fcac5e27b630656fe3d963a6b80e26dac44;p=linux-2.6.git

diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 1b5a3f75e..50c2c0f8d 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -18,7 +18,6 @@
 
 #include <asm/pgalloc.h>
 #include <asm/page.h>
-#include <asm/rmap.h>
 #include <asm/io.h>
 #include <asm/setup.h>
 #include <asm/tlbflush.h>
@@ -231,7 +230,7 @@ void free_pgd_slow(pgd_t *pgd)
 
 	pte = pmd_page(*pmd);
 	pmd_clear(pmd);
-	pgtable_remove_rmap(pte);
+	dec_page_state(nr_page_table_pages);
 	pte_free(pte);
 	pmd_free(pmd);
 free:
@@ -305,27 +304,27 @@ static struct mem_types mem_types[] __initdata = {
 	[MT_DEVICE] = {
 		.prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
 				L_PTE_WRITE,
-		.prot_l1   = PMD_TYPE_TABLE | PMD_BIT4,
-		.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
+		.prot_l1   = PMD_TYPE_TABLE,
+		.prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED |
 				PMD_SECT_AP_WRITE,
 		.domain    = DOMAIN_IO,
 	},
 	[MT_CACHECLEAN] = {
-		.prot_sect = PMD_TYPE_SECT | PMD_BIT4,
+		.prot_sect = PMD_TYPE_SECT,
 		.domain    = DOMAIN_KERNEL,
 	},
 	[MT_MINICLEAN] = {
-		.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_MINICACHE,
+		.prot_sect = PMD_TYPE_SECT | PMD_SECT_MINICACHE,
 		.domain    = DOMAIN_KERNEL,
 	},
 	[MT_VECTORS] = {
 		.prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
 				L_PTE_EXEC,
-		.prot_l1   = PMD_TYPE_TABLE | PMD_BIT4,
+		.prot_l1   = PMD_TYPE_TABLE,
 		.domain    = DOMAIN_USER,
 	},
 	[MT_MEMORY] = {
-		.prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_AP_WRITE,
+		.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
 		.domain    = DOMAIN_KERNEL,
 	}
 };
@@ -353,6 +352,15 @@ static void __init build_mem_type_table(void)
 		ecc_mask = 0;
 	}
 
+	if (cpu_arch <= CPU_ARCH_ARMv5) {
+		mem_types[MT_DEVICE].prot_l1       |= PMD_BIT4;
+		mem_types[MT_DEVICE].prot_sect     |= PMD_BIT4;
+		mem_types[MT_CACHECLEAN].prot_sect |= PMD_BIT4;
+		mem_types[MT_MINICLEAN].prot_sect  |= PMD_BIT4;
+		mem_types[MT_VECTORS].prot_l1      |= PMD_BIT4;
+		mem_types[MT_MEMORY].prot_sect     |= PMD_BIT4;
+	}
+
 	/*
 	 * ARMv6 and above have extended page tables.
 	 */
@@ -482,6 +490,7 @@ void setup_mm_for_reboot(char mode)
 	pgd_t *pgd;
 	pmd_t *pmd;
 	int i;
+	int cpu_arch = cpu_architecture();
 
 	if (current->mm && current->mm->pgd)
 		pgd = current->mm->pgd;
@@ -491,7 +500,9 @@ void setup_mm_for_reboot(char mode)
 	for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++) {
 		pmdval = (i << PGDIR_SHIFT) |
 			 PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
-			 PMD_BIT4 | PMD_TYPE_SECT;
+			 PMD_TYPE_SECT;
+		if (cpu_arch <= CPU_ARCH_ARMv5)
+			pmdval |= PMD_BIT4;
 		pmd = pmd_offset(pgd + i, i << PGDIR_SHIFT);
 		set_pmd(pmd, __pmd(pmdval));
 	}