X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Farm%2Fmm%2Fproc-arm1020.S;h=1f325231b9e47bac1ea9ed53c38f97d96e8458d4;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=1267ab586711a16c51f32c635a2438fe5f2c4b99;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 1267ab586..1f325231b 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -431,36 +431,29 @@ __arm1020_setup: mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 - mcr p15, 0, r4, c2, c0 @ load page table pointer - mov r0, #0x1f @ Domains 0, 1 = client - mcr p15, 0, r0, c3, c0 @ load domain access register mrc p15, 0, r0, c1, c0 @ get control register v4 -/* - * Clear out 'unwanted' bits (then put them in if we need them) - */ - bic r0, r0, #0x1e00 @ i...??r......... - bic r0, r0, #0x000e @ ............wca. -/* - * Turn on what we want - */ - orr r0, r0, #0x0031 @ ..........DP...M - orr r0, r0, #0x0100 @ .......S........ - + ldr r5, arm1020_cr1_clear + bic r0, r0, r5 + ldr r5, arm1020_cr1_set + orr r0, r0, r5 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - orr r0, r0, #0x4000 @ .R.............. -#endif -#ifndef CONFIG_CPU_BPREDICT_DISABLE - orr r0, r0, #0x0800 @ ....Z........... -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - orr r0, r0, #0x0004 @ Enable D cache -#endif -#ifndef CONFIG_CPU_ICACHE_DISABLE - orr r0, r0, #0x1000 @ I Cache on + orr r0, r0, #0x4000 @ .R.. .... .... .... #endif mov pc, lr .size __arm1020_setup, . - __arm1020_setup + /* + * R + * .RVI ZFRS BLDP WCAM + * .0.1 1001 ..11 0101 /* FIXME: why no V bit? */ + */ + .type arm1020_cr1_clear, #object + .type arm1020_cr1_set, #object +arm1020_cr1_clear: + .word 0x593f +arm1020_cr1_set: + .word 0x1935 + __INITDATA /* @@ -522,7 +515,9 @@ cpu_arm1020_name: __arm1020_proc_info: .long 0x4104a200 @ ARM 1020T (Architecture v5T) .long 0xff0ffff0 - .long 0x00000c02 @ mmuflags + .long PMD_TYPE_SECT | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm1020_setup .long cpu_arch_name .long cpu_elf_name