X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Farm%2Fmm%2Fproc-arm1026.S;h=248110c9cf139cc21b2e8498d4e168dce2aeed8d;hb=6a77f38946aaee1cd85eeec6cf4229b204c15071;hp=38a06cb1e9fce58a783a7fc85a824bb1bc87b5d9;hpb=87fc8d1bb10cd459024a742c6a10961fefcef18f;p=linux-2.6.git diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 38a06cb1e..248110c9c 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -389,35 +389,30 @@ __arm1026_setup: mov r0, #4 @ explicitly disable writeback mcr p15, 7, r0, c15, c0, 0 #endif - mov r0, #0x1f @ Domains 0, 1 = client - mcr p15, 0, r0, c3, c0 @ load domain access register mrc p15, 0, r0, c1, c0 @ get control register v4 -/* - * Clear out 'unwanted' bits (then put them in if we need them) - */ - bic r0, r0, #0x1e00 @ ...i??r......... - bic r0, r0, #0x000e @ ............wca. -/* - * Turn on what we want - */ - orr r0, r0, #0x0031 @ ..........DP...M - orr r0, r0, #0x2100 @ ..V....S........ - + ldr r5, arm1026_cr1_clear + bic r0, r0, r5 + ldr r5, arm1026_cr1_set + orr r0, r0, r5 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - orr r0, r0, #0x4000 @ .R.............. -#endif -#ifndef CONFIG_CPU_BPREDICT_DISABLE - orr r0, r0, #0x0800 @ ....Z........... -#endif -#ifndef CONFIG_CPU_DCACHE_DISABLE - orr r0, r0, #0x0004 @ .............C.. -#endif -#ifndef CONFIG_CPU_ICACHE_DISABLE - orr r0, r0, #0x1000 @ ...I............ + orr r0, r0, #0x4000 @ .R.. .... .... .... #endif mov pc, lr .size __arm1026_setup, . - __arm1026_setup + /* + * R + * .RVI ZFRS BLDP WCAM + * .011 1001 ..11 0101 + * + */ + .type arm1026_cr1_clear, #object + .type arm1026_cr1_set, #object +arm1026_cr1_clear: + .word 0x7f3f +arm1026_cr1_set: + .word 0x3935 + __INITDATA /* @@ -480,7 +475,10 @@ cpu_arm1026_name: __arm1026_proc_info: .long 0x4106a260 @ ARM 1026EJ-S (v5TEJ) .long 0xff0ffff0 - .long 0x00000c12 @ mmuflags + .long PMD_TYPE_SECT | \ + PMD_BIT4 | \ + PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ b __arm1026_setup .long cpu_arch_name .long cpu_elf_name