X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Farm%2Fmm%2Fproc-v6.S;h=92f3ca31b7b90e46c03f05104f6e5d6300d2ce7b;hb=987b0145d94eecf292d8b301228356f44611ab7c;hp=ee6f152987350033fdf69586b8fe01314f5c28eb;hpb=f7ed79d23a47594e7834d66a8f14449796d4f3e6;p=linux-2.6.git

diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index ee6f15298..92f3ca31b 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -14,21 +14,12 @@
 #include <asm/asm-offsets.h>
 #include <asm/hardware/arm_scu.h>
 #include <asm/procinfo.h>
-#include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
 
 #include "proc-macros.S"
 
 #define D_CACHE_LINE_SIZE	32
 
-#define TTB_C		(1 << 0)
-#define TTB_S		(1 << 1)
-#define TTB_IMP		(1 << 2)
-#define TTB_RGN_NC	(0 << 3)
-#define TTB_RGN_WBWA	(1 << 3)
-#define TTB_RGN_WT	(2 << 3)
-#define TTB_RGN_WB	(3 << 3)
-
 	.macro	cpsie, flags
 	.ifc \flags, f
 	.long	0xf1080040
@@ -123,7 +114,7 @@ ENTRY(cpu_v6_switch_mm)
 	mov	r2, #0
 	ldr	r1, [r1, #MM_CONTEXT_ID]	@ get mm->context.id
 #ifdef CONFIG_SMP
-	orr	r0, r0, #TTB_RGN_WBWA|TTB_S	@ mark PTWs shared, outer cacheable
+	orr	r0, r0, #2			@ set shared pgtable
 #endif
 	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB
 	mcr	p15, 0, r2, c7, c10, 4		@ drain write buffer
@@ -169,8 +160,8 @@ ENTRY(cpu_v6_set_pte)
 	tst	r1, #L_PTE_YOUNG
 	biceq	r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK
 
-	tst	r1, #L_PTE_EXEC
-	orreq	r2, r2, #PTE_EXT_XN
+@	tst	r1, #L_PTE_EXEC
+@	orreq	r2, r2, #PTE_EXT_XN
 
 	tst	r1, #L_PTE_PRESENT
 	moveq	r2, #0
@@ -229,7 +220,7 @@ __v6_setup:
 	mcr	p15, 0, r0, c8, c7, 0		@ invalidate I + D TLBs
 	mcr	p15, 0, r0, c2, c0, 2		@ TTB control register
 #ifdef CONFIG_SMP
-	orr	r4, r4, #TTB_RGN_WBWA|TTB_S	@ mark PTWs shared, outer cacheable
+	orr	r4, r4, #2			@ set shared pgtable
 #endif
 	mcr	p15, 0, r4, c2, c0, 1		@ load TTB1
 #ifdef CONFIG_VFP