X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fia64%2Fkernel%2Fivt.S;h=1269d2c0f81be1f26212c47aae80e95777ed260e;hb=2c66a62d2d9e2315e6e748b96643f7f141c4d017;hp=c65b6bfb29beb67304e42df39e2fd97357f5c660;hpb=86090fcac5e27b630656fe3d963a6b80e26dac44;p=linux-2.6.git diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S index c65b6bfb2..1269d2c0f 100644 --- a/arch/ia64/kernel/ivt.S +++ b/arch/ia64/kernel/ivt.S @@ -181,6 +181,12 @@ ENTRY(vhpt_miss) (p7) itc.d r24 ;; #ifdef CONFIG_SMP + /* + * Tell the assemblers dependency-violation checker that the above "itc" instructions + * cannot possibly affect the following loads: + */ + dv_serialize_data + /* * Re-check L2 and L3 pagetable. If they changed, we may have received a ptc.g * between reading the pagetable and the "itc". If so, flush the entry we @@ -229,6 +235,12 @@ ENTRY(itlb_miss) itc.i r18 ;; #ifdef CONFIG_SMP + /* + * Tell the assemblers dependency-violation checker that the above "itc" instructions + * cannot possibly affect the following loads: + */ + dv_serialize_data + ld8 r19=[r17] // read L3 PTE again and see if same mov r20=PAGE_SHIFT<<2 // setup page size for purge ;; @@ -267,6 +279,12 @@ dtlb_fault: itc.d r18 ;; #ifdef CONFIG_SMP + /* + * Tell the assemblers dependency-violation checker that the above "itc" instructions + * cannot possibly affect the following loads: + */ + dv_serialize_data + ld8 r19=[r17] // read L3 PTE again and see if same mov r20=PAGE_SHIFT<<2 // setup page size for purge ;; @@ -504,6 +522,12 @@ ENTRY(dirty_bit) ;; (p6) itc.d r25 // install updated PTE ;; + /* + * Tell the assemblers dependency-violation checker that the above "itc" instructions + * cannot possibly affect the following loads: + */ + dv_serialize_data + ld8 r18=[r17] // read PTE again ;; cmp.eq p6,p7=r18,r25 // is it same as the newly installed @@ -563,6 +587,12 @@ ENTRY(iaccess_bit) ;; (p6) itc.i r25 // install updated PTE ;; + /* + * Tell the assemblers dependency-violation checker that the above "itc" instructions + * cannot possibly affect the following loads: + */ + dv_serialize_data + ld8 r18=[r17] // read PTE again ;; cmp.eq p6,p7=r18,r25 // is it same as the newly installed @@ -610,6 +640,11 @@ ENTRY(daccess_bit) cmp.eq p6,p7=r26,r18 ;; (p6) itc.d r25 // install updated PTE + /* + * Tell the assemblers dependency-violation checker that the above "itc" instructions + * cannot possibly affect the following loads: + */ + dv_serialize_data ;; ld8 r18=[r17] // read PTE again ;;