X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fia64%2Fkernel%2Fptrace.c;h=9140c2c29cbd902eda8fd600a8c3f723c0328fc7;hb=f7f1b0f1e2fbadeab12d24236000e778aa9b1ead;hp=0432abe563c3642842385a1eb50c3004fc09f71e;hpb=5273a3df6485dc2ad6aa7ddd441b9a21970f003b;p=linux-2.6.git diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 0432abe56..9140c2c29 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c @@ -1,11 +1,10 @@ /* * Kernel support for the ptrace() and syscall tracing interfaces. * - * Copyright (C) 1999-2003 Hewlett-Packard Co + * Copyright (C) 1999-2005 Hewlett-Packard Co * David Mosberger-Tang * - * Derived from the x86 and Alpha versions. Most of the code in here - * could actually be factored into a common set of routines. + * Derived from the x86 and Alpha versions. */ #include #include @@ -17,6 +16,8 @@ #include #include #include +#include +#include #include #include @@ -31,9 +32,6 @@ #include "entry.h" -#define p4 (1UL << 4) /* for pSys (see entry.h) */ -#define p5 (1UL << 5) /* for pNonSys (see entry.h) */ - /* * Bits in the PSR that we allow ptrace() to change: * be, up, ac, mfl, mfh (the user mask; five bits total) @@ -43,9 +41,11 @@ * ri (restart instruction; two bits) * is (instruction set; one bit) */ -#define IPSR_WRITE_MASK \ - (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI) -#define IPSR_READ_MASK IPSR_WRITE_MASK +#define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \ + | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI) + +#define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */ +#define PFM_MASK MASK(38) #define PTRACE_DEBUG 0 @@ -71,23 +71,24 @@ in_syscall (struct pt_regs *pt) unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat) { -# define GET_BITS(first, last, unat) \ - ({ \ - unsigned long bit = ia64_unat_pos(&pt->r##first); \ - unsigned long mask = ((1UL << (last - first + 1)) - 1) << first; \ - unsigned long dist; \ - if (bit < first) \ - dist = 64 + bit - first; \ - else \ - dist = bit - first; \ - ia64_rotr(unat, dist) & mask; \ +# define GET_BITS(first, last, unat) \ + ({ \ + unsigned long bit = ia64_unat_pos(&pt->r##first); \ + unsigned long nbits = (last - first + 1); \ + unsigned long mask = MASK(nbits) << first; \ + unsigned long dist; \ + if (bit < first) \ + dist = 64 + bit - first; \ + else \ + dist = bit - first; \ + ia64_rotr(unat, dist) & mask; \ }) unsigned long val; /* - * Registers that are stored consecutively in struct pt_regs can be handled in - * parallel. If the register order in struct_pt_regs changes, this code MUST be - * updated. + * Registers that are stored consecutively in struct pt_regs + * can be handled in parallel. If the register order in + * struct_pt_regs changes, this code MUST be updated. */ val = GET_BITS( 1, 1, scratch_unat); val |= GET_BITS( 2, 3, scratch_unat); @@ -109,23 +110,24 @@ ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat) unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat) { -# define PUT_BITS(first, last, nat) \ - ({ \ - unsigned long bit = ia64_unat_pos(&pt->r##first); \ - unsigned long mask = ((1UL << (last - first + 1)) - 1) << first; \ - long dist; \ - if (bit < first) \ - dist = 64 + bit - first; \ - else \ - dist = bit - first; \ - ia64_rotl(nat & mask, dist); \ +# define PUT_BITS(first, last, nat) \ + ({ \ + unsigned long bit = ia64_unat_pos(&pt->r##first); \ + unsigned long nbits = (last - first + 1); \ + unsigned long mask = MASK(nbits) << first; \ + long dist; \ + if (bit < first) \ + dist = 64 + bit - first; \ + else \ + dist = bit - first; \ + ia64_rotl(nat & mask, dist); \ }) unsigned long scratch_unat; /* - * Registers that are stored consecutively in struct pt_regs can be handled in - * parallel. If the register order in struct_pt_regs changes, this code MUST be - * updated. + * Registers that are stored consecutively in struct pt_regs + * can be handled in parallel. If the register order in + * struct_pt_regs changes, this code MUST be updated. */ scratch_unat = PUT_BITS( 1, 1, nat); scratch_unat |= PUT_BITS( 2, 3, nat); @@ -152,7 +154,7 @@ ia64_increment_ip (struct pt_regs *regs) ri = 0; regs->cr_iip += 16; } else if (ri == 2) { - get_user(w0, (char *) regs->cr_iip + 0); + get_user(w0, (char __user *) regs->cr_iip + 0); if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) { /* * rfi'ing to slot 2 of an MLX bundle causes @@ -174,7 +176,7 @@ ia64_decrement_ip (struct pt_regs *regs) if (ia64_psr(regs)->ri == 0) { regs->cr_iip -= 16; ri = 2; - get_user(w0, (char *) regs->cr_iip + 0); + get_user(w0, (char __user *) regs->cr_iip + 0); if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) { /* * rfi'ing to slot 2 of an MLX bundle causes @@ -188,10 +190,12 @@ ia64_decrement_ip (struct pt_regs *regs) } /* - * This routine is used to read an rnat bits that are stored on the kernel backing store. - * Since, in general, the alignment of the user and kernel are different, this is not - * completely trivial. In essence, we need to construct the user RNAT based on up to two - * kernel RNAT values and/or the RNAT value saved in the child's pt_regs. + * This routine is used to read an rnat bits that are stored on the + * kernel backing store. Since, in general, the alignment of the user + * and kernel are different, this is not completely trivial. In + * essence, we need to construct the user RNAT based on up to two + * kernel RNAT values and/or the RNAT value saved in the child's + * pt_regs. * * user rbs * @@ -224,24 +228,28 @@ ia64_decrement_ip (struct pt_regs *regs) * +--------+ * <--- child_stack->ar_bspstore * - * The way to think of this code is as follows: bit 0 in the user rnat corresponds to some - * bit N (0 <= N <= 62) in one of the kernel rnat value. The kernel rnat value holding - * this bit is stored in variable rnat0. rnat1 is loaded with the kernel rnat value that + * The way to think of this code is as follows: bit 0 in the user rnat + * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat + * value. The kernel rnat value holding this bit is stored in + * variable rnat0. rnat1 is loaded with the kernel rnat value that * form the upper bits of the user rnat value. * * Boundary cases: * - * o when reading the rnat "below" the first rnat slot on the kernel backing store, - * rnat0/rnat1 are set to 0 and the low order bits are merged in from pt->ar_rnat. + * o when reading the rnat "below" the first rnat slot on the kernel + * backing store, rnat0/rnat1 are set to 0 and the low order bits are + * merged in from pt->ar_rnat. * - * o when reading the rnat "above" the last rnat slot on the kernel backing store, - * rnat0/rnat1 gets its value from sw->ar_rnat. + * o when reading the rnat "above" the last rnat slot on the kernel + * backing store, rnat0/rnat1 gets its value from sw->ar_rnat. */ static unsigned long get_rnat (struct task_struct *task, struct switch_stack *sw, - unsigned long *krbs, unsigned long *urnat_addr, unsigned long *urbs_end) + unsigned long *krbs, unsigned long *urnat_addr, + unsigned long *urbs_end) { - unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr, umask = 0, mask, m; + unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr; + unsigned long umask = 0, mask, m; unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift; long num_regs, nbits; struct pt_regs *pt; @@ -254,11 +262,12 @@ get_rnat (struct task_struct *task, struct switch_stack *sw, nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end); else nbits = 63; - mask = (1UL << nbits) - 1; + mask = MASK(nbits); /* - * First, figure out which bit number slot 0 in user-land maps to in the kernel - * rnat. Do this by figuring out how many register slots we're beyond the user's - * backingstore and then computing the equivalent address in kernel space. + * First, figure out which bit number slot 0 in user-land maps + * to in the kernel rnat. Do this by figuring out how many + * register slots we're beyond the user's backingstore and + * then computing the equivalent address in kernel space. */ num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1); slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs); @@ -268,7 +277,7 @@ get_rnat (struct task_struct *task, struct switch_stack *sw, if (ubspstore + 63 > urnat_addr) { /* some bits need to be merged in from pt->ar_rnat */ - umask = ((1UL << ia64_rse_slot_num(ubspstore)) - 1) & mask; + umask = MASK(ia64_rse_slot_num(ubspstore)) & mask; urnat = (pt->ar_rnat & umask); mask &= ~umask; if (!mask) @@ -304,7 +313,6 @@ put_rnat (struct task_struct *task, struct switch_stack *sw, long num_regs, nbits; struct pt_regs *pt; unsigned long cfm, *urbs_kargs; - struct unw_frame_info info; pt = ia64_task_regs(task); kbsp = (unsigned long *) sw->ar_bspstore; @@ -316,11 +324,8 @@ put_rnat (struct task_struct *task, struct switch_stack *sw, * If entered via syscall, don't allow user to set rnat bits * for syscall args. */ - unw_init_from_blocked_task(&info,task); - if (unw_unwind_to_user(&info) == 0) { - unw_get_cfm(&info,&cfm); - urbs_kargs = ia64_rse_skip_regs(urbs_end,-(cfm & 0x7f)); - } + cfm = pt->cr_ifs; + urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f)); } if (urbs_kargs >= urnat_addr) @@ -330,12 +335,13 @@ put_rnat (struct task_struct *task, struct switch_stack *sw, return; nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs); } - mask = (1UL << nbits) - 1; + mask = MASK(nbits); /* - * First, figure out which bit number slot 0 in user-land maps to in the kernel - * rnat. Do this by figuring out how many register slots we're beyond the user's - * backingstore and then computing the equivalent address in kernel space. + * First, figure out which bit number slot 0 in user-land maps + * to in the kernel rnat. Do this by figuring out how many + * register slots we're beyond the user's backingstore and + * then computing the equivalent address in kernel space. */ num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1); slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs); @@ -345,7 +351,7 @@ put_rnat (struct task_struct *task, struct switch_stack *sw, if (ubspstore + 63 > urnat_addr) { /* some bits need to be place in pt->ar_rnat: */ - umask = ((1UL << ia64_rse_slot_num(ubspstore)) - 1) & mask; + umask = MASK(ia64_rse_slot_num(ubspstore)) & mask; pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask); mask &= ~umask; if (!mask) @@ -371,25 +377,28 @@ put_rnat (struct task_struct *task, struct switch_stack *sw, } static inline int -on_kernel_rbs (unsigned long addr, unsigned long bspstore, unsigned long urbs_end) +on_kernel_rbs (unsigned long addr, unsigned long bspstore, + unsigned long urbs_end) { - return (addr >= bspstore - && addr <= (unsigned long) ia64_rse_rnat_addr((unsigned long *) urbs_end)); + unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *) + urbs_end); + return (addr >= bspstore && addr <= (unsigned long) rnat_addr); } /* - * Read a word from the user-level backing store of task CHILD. ADDR is the user-level - * address to read the word from, VAL a pointer to the return value, and USER_BSP gives - * the end of the user-level backing store (i.e., it's the address that would be in ar.bsp - * after the user executed a "cover" instruction). + * Read a word from the user-level backing store of task CHILD. ADDR + * is the user-level address to read the word from, VAL a pointer to + * the return value, and USER_BSP gives the end of the user-level + * backing store (i.e., it's the address that would be in ar.bsp after + * the user executed a "cover" instruction). * - * This routine takes care of accessing the kernel register backing store for those - * registers that got spilled there. It also takes care of calculating the appropriate - * RNaT collection words. + * This routine takes care of accessing the kernel register backing + * store for those registers that got spilled there. It also takes + * care of calculating the appropriate RNaT collection words. */ long -ia64_peek (struct task_struct *child, struct switch_stack *child_stack, unsigned long user_rbs_end, - unsigned long addr, long *val) +ia64_peek (struct task_struct *child, struct switch_stack *child_stack, + unsigned long user_rbs_end, unsigned long addr, long *val) { unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr; struct pt_regs *child_regs; @@ -401,10 +410,13 @@ ia64_peek (struct task_struct *child, struct switch_stack *child_stack, unsigned child_regs = ia64_task_regs(child); bspstore = (unsigned long *) child_regs->ar_bspstore; krbs = (unsigned long *) child + IA64_RBS_OFFSET/8; - if (on_kernel_rbs(addr, (unsigned long) bspstore, (unsigned long) urbs_end)) { + if (on_kernel_rbs(addr, (unsigned long) bspstore, + (unsigned long) urbs_end)) + { /* - * Attempt to read the RBS in an area that's actually on the kernel RBS => - * read the corresponding bits in the kernel RBS. + * Attempt to read the RBS in an area that's actually + * on the kernel RBS => read the corresponding bits in + * the kernel RBS. */ rnat_addr = ia64_rse_rnat_addr(laddr); ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end); @@ -417,18 +429,23 @@ ia64_peek (struct task_struct *child, struct switch_stack *child_stack, unsigned if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) { /* - * It is implementation dependent whether the data portion of a - * NaT value gets saved on a st8.spill or RSE spill (e.g., see - * EAS 2.6, 4.4.4.6 Register Spill and Fill). To get consistent - * behavior across all possible IA-64 implementations, we return - * zero in this case. + * It is implementation dependent whether the + * data portion of a NaT value gets saved on a + * st8.spill or RSE spill (e.g., see EAS 2.6, + * 4.4.4.6 Register Spill and Fill). To get + * consistent behavior across all possible + * IA-64 implementations, we return zero in + * this case. */ *val = 0; return 0; } if (laddr < urbs_end) { - /* the desired word is on the kernel RBS and is not a NaT */ + /* + * The desired word is on the kernel RBS and + * is not a NaT. + */ regnum = ia64_rse_num_regs(bspstore, laddr); *val = *ia64_rse_skip_regs(krbs, regnum); return 0; @@ -442,74 +459,75 @@ ia64_peek (struct task_struct *child, struct switch_stack *child_stack, unsigned } long -ia64_poke (struct task_struct *child, struct switch_stack *child_stack, unsigned long user_rbs_end, - unsigned long addr, long val) +ia64_poke (struct task_struct *child, struct switch_stack *child_stack, + unsigned long user_rbs_end, unsigned long addr, long val) { - unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end = (long *) user_rbs_end; + unsigned long *bspstore, *krbs, regnum, *laddr; + unsigned long *urbs_end = (long *) user_rbs_end; struct pt_regs *child_regs; laddr = (unsigned long *) addr; child_regs = ia64_task_regs(child); bspstore = (unsigned long *) child_regs->ar_bspstore; krbs = (unsigned long *) child + IA64_RBS_OFFSET/8; - if (on_kernel_rbs(addr, (unsigned long) bspstore, (unsigned long) urbs_end)) { + if (on_kernel_rbs(addr, (unsigned long) bspstore, + (unsigned long) urbs_end)) + { /* - * Attempt to write the RBS in an area that's actually on the kernel RBS - * => write the corresponding bits in the kernel RBS. + * Attempt to write the RBS in an area that's actually + * on the kernel RBS => write the corresponding bits + * in the kernel RBS. */ if (ia64_rse_is_rnat_slot(laddr)) - put_rnat(child, child_stack, krbs, laddr, val, urbs_end); + put_rnat(child, child_stack, krbs, laddr, val, + urbs_end); else { if (laddr < urbs_end) { regnum = ia64_rse_num_regs(bspstore, laddr); *ia64_rse_skip_regs(krbs, regnum) = val; } } - } else if (access_process_vm(child, addr, &val, sizeof(val), 1) != sizeof(val)) { + } else if (access_process_vm(child, addr, &val, sizeof(val), 1) + != sizeof(val)) return -EIO; - } return 0; } /* - * Calculate the address of the end of the user-level register backing store. This is the - * address that would have been stored in ar.bsp if the user had executed a "cover" - * instruction right before entering the kernel. If CFMP is not NULL, it is used to - * return the "current frame mask" that was active at the time the kernel was entered. + * Calculate the address of the end of the user-level register backing + * store. This is the address that would have been stored in ar.bsp + * if the user had executed a "cover" instruction right before + * entering the kernel. If CFMP is not NULL, it is used to return the + * "current frame mask" that was active at the time the kernel was + * entered. */ unsigned long -ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt, unsigned long *cfmp) +ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt, + unsigned long *cfmp) { - unsigned long *krbs, *bspstore, cfm; - struct unw_frame_info info; + unsigned long *krbs, *bspstore, cfm = pt->cr_ifs; long ndirty; krbs = (unsigned long *) child + IA64_RBS_OFFSET/8; bspstore = (unsigned long *) pt->ar_bspstore; ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19)); - cfm = pt->cr_ifs & ~(1UL << 63); - if (in_syscall(pt)) { - /* - * If bit 63 of cr.ifs is cleared, the kernel was entered via a system - * call and we need to recover the CFM that existed on entry to the - * kernel by unwinding the kernel stack. - */ - unw_init_from_blocked_task(&info, child); - if (unw_unwind_to_user(&info) == 0) { - unw_get_cfm(&info, &cfm); - ndirty += (cfm & 0x7f); - } - } + if (in_syscall(pt)) + ndirty += (cfm & 0x7f); + else + cfm &= ~(1UL << 63); /* clear valid bit */ + if (cfmp) *cfmp = cfm; return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty); } /* - * Synchronize (i.e, write) the RSE backing store living in kernel space to the VM of the - * CHILD task. SW and PT are the pointers to the switch_stack and pt_regs structures, - * respectively. USER_RBS_END is the user-level address at which the backing store ends. + * Synchronize (i.e, write) the RSE backing store living in kernel + * space to the VM of the CHILD task. SW and PT are the pointers to + * the switch_stack and pt_regs structures, respectively. + * USER_RBS_END is the user-level address at which the backing store + * ends. */ long ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw, @@ -523,7 +541,8 @@ ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw, ret = ia64_peek(child, sw, user_rbs_end, addr, &val); if (ret < 0) return ret; - if (access_process_vm(child, addr, &val, sizeof(val), 1) != sizeof(val)) + if (access_process_vm(child, addr, &val, sizeof(val), 1) + != sizeof(val)) return -EIO; } return 0; @@ -537,13 +556,14 @@ thread_matches (struct task_struct *thread, unsigned long addr) if (ptrace_check_attach(thread, 0) < 0) /* - * If the thread is not in an attachable state, we'll ignore it. - * The net effect is that if ADDR happens to overlap with the - * portion of the thread's register backing store that is - * currently residing on the thread's kernel stack, then ptrace() - * may end up accessing a stale value. But if the thread isn't - * stopped, that's a problem anyhow, so we're doing as well as we - * can... + * If the thread is not in an attachable state, we'll + * ignore it. The net effect is that if ADDR happens + * to overlap with the portion of the thread's + * register backing store that is currently residing + * on the thread's kernel stack, then ptrace() may end + * up accessing a stale value. But if the thread + * isn't stopped, that's a problem anyhow, so we're + * doing as well as we can... */ return 0; @@ -556,10 +576,11 @@ thread_matches (struct task_struct *thread, unsigned long addr) } /* - * GDB apparently wants to be able to read the register-backing store of any thread when - * attached to a given process. If we are peeking or poking an address that happens to - * reside in the kernel-backing store of another thread, we need to attach to that thread, - * because otherwise we end up accessing stale data. + * GDB apparently wants to be able to read the register-backing store + * of any thread when attached to a given process. If we are peeking + * or poking an address that happens to reside in the kernel-backing + * store of another thread, we need to attach to that thread, because + * otherwise we end up accessing stale data. * * task_list_lock must be read-locked before calling this routine! */ @@ -573,7 +594,8 @@ find_thread_for_addr (struct task_struct *child, unsigned long addr) if (!(mm = get_task_mm(child))) return child; - mm_users = atomic_read(&mm->mm_users) - 1; /* -1 because of our get_task_mm()... */ + /* -1 because of our get_task_mm(): */ + mm_users = atomic_read(&mm->mm_users) - 1; if (mm_users <= 1) goto out; /* not multi-threaded */ @@ -613,11 +635,17 @@ ia64_flush_fph (struct task_struct *task) { struct ia64_psr *psr = ia64_psr(ia64_task_regs(task)); + /* + * Prevent migrating this task while + * we're fiddling with the FPU state + */ + preempt_disable(); if (ia64_is_local_fpu_owner(task) && psr->mfh) { psr->mfh = 0; task->thread.flags |= IA64_THREAD_FPH_VALID; ia64_save_fpu(&task->thread.fph[0]); } + preempt_enable(); } /* @@ -643,7 +671,8 @@ ia64_sync_fph (struct task_struct *task) } static int -access_fr (struct unw_frame_info *info, int regnum, int hi, unsigned long *data, int write_access) +access_fr (struct unw_frame_info *info, int regnum, int hi, + unsigned long *data, int write_access) { struct ia64_fpreg fpval; int ret; @@ -665,36 +694,91 @@ access_fr (struct unw_frame_info *info, int regnum, int hi, unsigned long *data, * kernel exit-path, rather than the syscall-exit path. */ static void -convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt, unsigned long cfm) +convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt, + unsigned long cfm) { struct unw_frame_info info, prev_info; - unsigned long ip, pr; + unsigned long ip, sp, pr; unw_init_from_blocked_task(&info, child); while (1) { prev_info = info; if (unw_unwind(&info) < 0) return; - if (unw_get_rp(&info, &ip) < 0) + + unw_get_sp(&info, &sp); + if ((long)((unsigned long)child + IA64_STK_OFFSET - sp) + < IA64_PT_REGS_SIZE) { + dprintk("ptrace.%s: ran off the top of the kernel " + "stack\n", __FUNCTION__); + return; + } + if (unw_get_pr (&prev_info, &pr) < 0) { + unw_get_rp(&prev_info, &ip); + dprintk("ptrace.%s: failed to read " + "predicate register (ip=0x%lx)\n", + __FUNCTION__, ip); return; - if (ip < FIXADDR_USER_END) + } + if (unw_is_intr_frame(&info) + && (pr & (1UL << PRED_USER_STACK))) break; } unw_get_pr(&prev_info, &pr); - pr &= ~pSys; - pr |= pNonSys; + pr &= ~(1UL << PRED_SYSCALL); + pr |= (1UL << PRED_NON_SYSCALL); unw_set_pr(&prev_info, pr); pt->cr_ifs = (1UL << 63) | cfm; } static int -access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data, int write_access) +access_nat_bits (struct task_struct *child, struct pt_regs *pt, + struct unw_frame_info *info, + unsigned long *data, int write_access) +{ + unsigned long regnum, nat_bits, scratch_unat, dummy = 0; + char nat = 0; + + if (write_access) { + nat_bits = *data; + scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits); + if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) { + dprintk("ptrace: failed to set ar.unat\n"); + return -1; + } + for (regnum = 4; regnum <= 7; ++regnum) { + unw_get_gr(info, regnum, &dummy, &nat); + unw_set_gr(info, regnum, dummy, + (nat_bits >> regnum) & 1); + } + } else { + if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) { + dprintk("ptrace: failed to read ar.unat\n"); + return -1; + } + nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat); + for (regnum = 4; regnum <= 7; ++regnum) { + unw_get_gr(info, regnum, &dummy, &nat); + nat_bits |= (nat != 0) << regnum; + } + *data = nat_bits; + } + return 0; +} + +static int +access_uarea (struct task_struct *child, unsigned long addr, + unsigned long *data, int write_access) { unsigned long *ptr, regnum, urbs_end, rnat_addr, cfm; struct switch_stack *sw; struct pt_regs *pt; +# define pt_reg_addr(pt, reg) ((void *) \ + ((unsigned long) (pt) \ + + offsetof(struct pt_regs, reg))) + pt = ia64_task_regs(child); sw = (struct switch_stack *) (child->thread.ksp + 16); @@ -710,17 +794,20 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data ia64_sync_fph(child); else ia64_flush_fph(child); - ptr = (unsigned long *) ((unsigned long) &child->thread.fph + addr); + ptr = (unsigned long *) + ((unsigned long) &child->thread.fph + addr); } else if ((addr >= PT_F10) && (addr < PT_F11 + 16)) { /* scratch registers untouched by kernel (saved in pt_regs) */ - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, f10) + addr - PT_F10); + ptr = pt_reg_addr(pt, f10) + (addr - PT_F10); } else if (addr >= PT_F12 && addr < PT_F15 + 16) { - /* scratch registers untouched by kernel (saved in switch_stack) */ - ptr = (unsigned long *) ((long) sw + (addr - PT_NAT_BITS - 32)); + /* + * Scratch registers untouched by kernel (saved in + * switch_stack). + */ + ptr = (unsigned long *) ((long) sw + + (addr - PT_NAT_BITS - 32)); } else if (addr < PT_AR_LC + 8) { /* preserved state: */ - unsigned long nat_bits, scratch_unat, dummy = 0; struct unw_frame_info info; char nat = 0; int ret; @@ -731,62 +818,48 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data switch (addr) { case PT_NAT_BITS: - if (write_access) { - nat_bits = *data; - scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits); - if (unw_set_ar(&info, UNW_AR_UNAT, scratch_unat) < 0) { - dprintk("ptrace: failed to set ar.unat\n"); - return -1; - } - for (regnum = 4; regnum <= 7; ++regnum) { - unw_get_gr(&info, regnum, &dummy, &nat); - unw_set_gr(&info, regnum, dummy, (nat_bits >> regnum) & 1); - } - } else { - if (unw_get_ar(&info, UNW_AR_UNAT, &scratch_unat) < 0) { - dprintk("ptrace: failed to read ar.unat\n"); - return -1; - } - nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat); - for (regnum = 4; regnum <= 7; ++regnum) { - unw_get_gr(&info, regnum, &dummy, &nat); - nat_bits |= (nat != 0) << regnum; - } - *data = nat_bits; - } - return 0; + return access_nat_bits(child, pt, &info, + data, write_access); case PT_R4: case PT_R5: case PT_R6: case PT_R7: if (write_access) { /* read NaT bit first: */ unsigned long dummy; - ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4, &dummy, &nat); + ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4, + &dummy, &nat); if (ret < 0) return ret; } - return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data, &nat, - write_access); + return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data, + &nat, write_access); - case PT_B1: case PT_B2: case PT_B3: case PT_B4: case PT_B5: - return unw_access_br(&info, (addr - PT_B1)/8 + 1, data, write_access); + case PT_B1: case PT_B2: case PT_B3: + case PT_B4: case PT_B5: + return unw_access_br(&info, (addr - PT_B1)/8 + 1, data, + write_access); case PT_AR_EC: - return unw_access_ar(&info, UNW_AR_EC, data, write_access); + return unw_access_ar(&info, UNW_AR_EC, data, + write_access); case PT_AR_LC: - return unw_access_ar(&info, UNW_AR_LC, data, write_access); + return unw_access_ar(&info, UNW_AR_LC, data, + write_access); default: if (addr >= PT_F2 && addr < PT_F5 + 16) - return access_fr(&info, (addr - PT_F2)/16 + 2, (addr & 8) != 0, - data, write_access); + return access_fr(&info, (addr - PT_F2)/16 + 2, + (addr & 8) != 0, data, + write_access); else if (addr >= PT_F16 && addr < PT_F31 + 16) - return access_fr(&info, (addr - PT_F16)/16 + 16, (addr & 8) != 0, + return access_fr(&info, + (addr - PT_F16)/16 + 16, + (addr & 8) != 0, data, write_access); else { - dprintk("ptrace: rejecting access to register address 0x%lx\n", - addr); + dprintk("ptrace: rejecting access to register " + "address 0x%lx\n", addr); return -1; } } @@ -795,34 +868,49 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data switch (addr) { case PT_AR_BSP: /* - * By convention, we use PT_AR_BSP to refer to the end of the user-level - * backing store. Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof) to get - * the real value of ar.bsp at the time the kernel was entered. + * By convention, we use PT_AR_BSP to refer to + * the end of the user-level backing store. + * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof) + * to get the real value of ar.bsp at the time + * the kernel was entered. * - * Furthermore, when changing the contents of PT_AR_BSP (or - * PT_CFM) we MUST copy any users-level stacked registers that are - * stored on the kernel stack back to user-space because - * otherwise, we might end up clobbering kernel stacked registers. - * Also, if this happens while the task is blocked in a system - * call, which convert the state such that the non-system-call - * exit path is used. This ensures that the proper state will be - * picked up when resuming execution. However, it *also* means - * that once we write PT_AR_BSP/PT_CFM, it won't be possible to - * modify the syscall arguments of the pending system call any - * longer. This shouldn't be an issue because modifying - * PT_AR_BSP/PT_CFM generally implies that we're either abandoning - * the pending system call or that we defer it's re-execution - * (e.g., due to GDB doing an inferior function call). + * Furthermore, when changing the contents of + * PT_AR_BSP (or PT_CFM) we MUST copy any + * users-level stacked registers that are + * stored on the kernel stack back to + * user-space because otherwise, we might end + * up clobbering kernel stacked registers. + * Also, if this happens while the task is + * blocked in a system call, which convert the + * state such that the non-system-call exit + * path is used. This ensures that the proper + * state will be picked up when resuming + * execution. However, it *also* means that + * once we write PT_AR_BSP/PT_CFM, it won't be + * possible to modify the syscall arguments of + * the pending system call any longer. This + * shouldn't be an issue because modifying + * PT_AR_BSP/PT_CFM generally implies that + * we're either abandoning the pending system + * call or that we defer it's re-execution + * (e.g., due to GDB doing an inferior + * function call). */ urbs_end = ia64_get_user_rbs_end(child, pt, &cfm); if (write_access) { if (*data != urbs_end) { if (ia64_sync_user_rbs(child, sw, - pt->ar_bspstore, urbs_end) < 0) + pt->ar_bspstore, + urbs_end) < 0) return -1; if (in_syscall(pt)) - convert_to_non_syscall(child, pt, cfm); - /* simulate user-level write of ar.bsp: */ + convert_to_non_syscall(child, + pt, + cfm); + /* + * Simulate user-level write + * of ar.bsp: + */ pt->loadrs = 0; pt->ar_bspstore = *data; } @@ -833,14 +921,17 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data case PT_CFM: urbs_end = ia64_get_user_rbs_end(child, pt, &cfm); if (write_access) { - if (((cfm ^ *data) & 0x3fffffffffU) != 0) { + if (((cfm ^ *data) & PFM_MASK) != 0) { if (ia64_sync_user_rbs(child, sw, - pt->ar_bspstore, urbs_end) < 0) + pt->ar_bspstore, + urbs_end) < 0) return -1; if (in_syscall(pt)) - convert_to_non_syscall(child, pt, cfm); - pt->cr_ifs = ((pt->cr_ifs & ~0x3fffffffffUL) - | (*data & 0x3fffffffffUL)); + convert_to_non_syscall(child, + pt, + cfm); + pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK) + | (*data & PFM_MASK)); } } else *data = cfm; @@ -848,99 +939,98 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data case PT_CR_IPSR: if (write_access) - pt->cr_ipsr = ((*data & IPSR_WRITE_MASK) - | (pt->cr_ipsr & ~IPSR_WRITE_MASK)); + pt->cr_ipsr = ((*data & IPSR_MASK) + | (pt->cr_ipsr & ~IPSR_MASK)); + else + *data = (pt->cr_ipsr & IPSR_MASK); + return 0; + + case PT_AR_RSC: + if (write_access) + pt->ar_rsc = *data | (3 << 2); /* force PL3 */ else - *data = (pt->cr_ipsr & IPSR_READ_MASK); + *data = pt->ar_rsc; return 0; case PT_AR_RNAT: urbs_end = ia64_get_user_rbs_end(child, pt, NULL); - rnat_addr = (long) ia64_rse_rnat_addr((long *) urbs_end); + rnat_addr = (long) ia64_rse_rnat_addr((long *) + urbs_end); if (write_access) - return ia64_poke(child, sw, urbs_end, rnat_addr, *data); + return ia64_poke(child, sw, urbs_end, + rnat_addr, *data); else - return ia64_peek(child, sw, urbs_end, rnat_addr, data); + return ia64_peek(child, sw, urbs_end, + rnat_addr, data); case PT_R1: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, r1)); + ptr = pt_reg_addr(pt, r1); break; - case PT_R2: case PT_R3: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r2) + addr - PT_R2); + ptr = pt_reg_addr(pt, r2) + (addr - PT_R2); break; case PT_R8: case PT_R9: case PT_R10: case PT_R11: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r8)+ addr - PT_R8); + ptr = pt_reg_addr(pt, r8) + (addr - PT_R8); break; case PT_R12: case PT_R13: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r12)+ addr - PT_R12); + ptr = pt_reg_addr(pt, r12) + (addr - PT_R12); break; case PT_R14: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, r14)); + ptr = pt_reg_addr(pt, r14); break; case PT_R15: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, r15)); + ptr = pt_reg_addr(pt, r15); break; case PT_R16: case PT_R17: case PT_R18: case PT_R19: case PT_R20: case PT_R21: case PT_R22: case PT_R23: case PT_R24: case PT_R25: case PT_R26: case PT_R27: case PT_R28: case PT_R29: case PT_R30: case PT_R31: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, r16) + addr - PT_R16); + ptr = pt_reg_addr(pt, r16) + (addr - PT_R16); break; case PT_B0: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, b0)); + ptr = pt_reg_addr(pt, b0); break; case PT_B6: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, b6)); + ptr = pt_reg_addr(pt, b6); break; case PT_B7: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, b7)); + ptr = pt_reg_addr(pt, b7); break; case PT_F6: case PT_F6+8: case PT_F7: case PT_F7+8: case PT_F8: case PT_F8+8: case PT_F9: case PT_F9+8: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, f6) + addr - PT_F6); + ptr = pt_reg_addr(pt, f6) + (addr - PT_F6); break; case PT_AR_BSPSTORE: - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, ar_bspstore)); - break; - case PT_AR_RSC: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_rsc)); + ptr = pt_reg_addr(pt, ar_bspstore); break; case PT_AR_UNAT: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_unat)); + ptr = pt_reg_addr(pt, ar_unat); break; case PT_AR_PFS: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_pfs)); + ptr = pt_reg_addr(pt, ar_pfs); break; case PT_AR_CCV: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_ccv)); + ptr = pt_reg_addr(pt, ar_ccv); break; case PT_AR_FPSR: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, ar_fpsr)); + ptr = pt_reg_addr(pt, ar_fpsr); break; case PT_CR_IIP: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, cr_iip)); + ptr = pt_reg_addr(pt, cr_iip); break; case PT_PR: - ptr = (unsigned long *) ((long) pt + offsetof(struct pt_regs, pr)); + ptr = pt_reg_addr(pt, pr); break; /* scratch register */ default: /* disallow accessing anything else... */ - dprintk("ptrace: rejecting access to register address 0x%lx\n", - addr); + dprintk("ptrace: rejecting access to register " + "address 0x%lx\n", addr); return -1; } } else if (addr <= PT_AR_SSD) { - ptr = (unsigned long *) - ((long) pt + offsetof(struct pt_regs, ar_csd) + addr - PT_AR_CSD); + ptr = pt_reg_addr(pt, ar_csd) + (addr - PT_AR_CSD); } else { /* access debug registers */ @@ -953,41 +1043,46 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data } if (regnum >= 8) { - dprintk("ptrace: rejecting access to register address 0x%lx\n", addr); + dprintk("ptrace: rejecting access to register " + "address 0x%lx\n", addr); return -1; } #ifdef CONFIG_PERFMON /* - * Check if debug registers are used by perfmon. This test must be done - * once we know that we can do the operation, i.e. the arguments are all - * valid, but before we start modifying the state. + * Check if debug registers are used by perfmon. This + * test must be done once we know that we can do the + * operation, i.e. the arguments are all valid, but + * before we start modifying the state. * - * Perfmon needs to keep a count of how many processes are trying to - * modify the debug registers for system wide monitoring sessions. + * Perfmon needs to keep a count of how many processes + * are trying to modify the debug registers for system + * wide monitoring sessions. * - * We also include read access here, because they may cause the - * PMU-installed debug register state (dbr[], ibr[]) to be reset. The two - * arrays are also used by perfmon, but we do not use - * IA64_THREAD_DBG_VALID. The registers are restored by the PMU context - * switch code. + * We also include read access here, because they may + * cause the PMU-installed debug register state + * (dbr[], ibr[]) to be reset. The two arrays are also + * used by perfmon, but we do not use + * IA64_THREAD_DBG_VALID. The registers are restored + * by the PMU context switch code. */ if (pfm_use_debug_registers(child)) return -1; #endif if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) { child->thread.flags |= IA64_THREAD_DBG_VALID; - memset(child->thread.dbr, 0, sizeof(child->thread.dbr)); - memset(child->thread.ibr, 0, sizeof(child->thread.ibr)); + memset(child->thread.dbr, 0, + sizeof(child->thread.dbr)); + memset(child->thread.ibr, 0, + sizeof(child->thread.ibr)); } ptr += regnum; - if (write_access) - /* don't let the user set kernel-level breakpoints... */ + if ((regnum & 1) && write_access) { + /* don't let the user set kernel-level breakpoints: */ *ptr = *data & ~(7UL << 56); - else - *data = *ptr; - return 0; + return 0; + } } if (write_access) *ptr = *data; @@ -997,19 +1092,19 @@ access_uarea (struct task_struct *child, unsigned long addr, unsigned long *data } static long -ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) +ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr) { + unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val; + struct unw_frame_info info; + struct ia64_fpreg fpval; struct switch_stack *sw; struct pt_regs *pt; - long ret, retval; - struct unw_frame_info info; + long ret, retval = 0; char nat = 0; int i; - retval = verify_area(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs)); - if (retval != 0) { + if (!access_ok(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs))) return -EIO; - } pt = ia64_task_regs(child); sw = (struct switch_stack *) (child->thread.ksp + 16); @@ -1023,12 +1118,19 @@ ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) return -EIO; } - retval = 0; + if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0 + || access_uarea(child, PT_AR_EC, &ec, 0) < 0 + || access_uarea(child, PT_AR_LC, &lc, 0) < 0 + || access_uarea(child, PT_AR_RNAT, &rnat, 0) < 0 + || access_uarea(child, PT_AR_BSP, &bsp, 0) < 0 + || access_uarea(child, PT_CFM, &cfm, 0) + || access_uarea(child, PT_NAT_BITS, &nat_bits, 0)) + return -EIO; /* control regs */ retval |= __put_user(pt->cr_iip, &ppr->cr_iip); - retval |= access_uarea(child, PT_CR_IPSR, &ppr->cr_ipsr, 0); + retval |= __put_user(psr, &ppr->cr_ipsr); /* app regs */ @@ -1039,11 +1141,11 @@ ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]); retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]); - retval |= access_uarea(child, PT_AR_EC, &ppr->ar[PT_AUR_EC], 0); - retval |= access_uarea(child, PT_AR_LC, &ppr->ar[PT_AUR_LC], 0); - retval |= access_uarea(child, PT_AR_RNAT, &ppr->ar[PT_AUR_RNAT], 0); - retval |= access_uarea(child, PT_AR_BSP, &ppr->ar[PT_AUR_BSP], 0); - retval |= access_uarea(child, PT_CFM, &ppr->cfm, 0); + retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]); + retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]); + retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]); + retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]); + retval |= __put_user(cfm, &ppr->cfm); /* gr1-gr3 */ @@ -1053,7 +1155,9 @@ ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* gr4-gr7 */ for (i = 4; i < 8; i++) { - retval |= unw_access_gr(&info, i, &ppr->gr[i], &nat, 0); + if (unw_access_gr(&info, i, &val, &nat, 0) < 0) + return -EIO; + retval |= __put_user(val, &ppr->gr[i]); } /* gr8-gr11 */ @@ -1077,7 +1181,9 @@ ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* b1-b5 */ for (i = 1; i < 6; i++) { - retval |= unw_access_br(&info, i, &ppr->br[i], 0); + if (unw_access_br(&info, i, &val, 0) < 0) + return -EIO; + __put_user(val, &ppr->br[i]); } /* b6-b7 */ @@ -1088,29 +1194,34 @@ ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* fr2-fr5 */ for (i = 2; i < 6; i++) { - retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 0); - retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 0); + if (unw_get_fr(&info, i, &fpval) < 0) + return -EIO; + retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval)); } /* fr6-fr11 */ - retval |= __copy_to_user(&ppr->fr[6], &pt->f6, sizeof(struct ia64_fpreg) * 6); + retval |= __copy_to_user(&ppr->fr[6], &pt->f6, + sizeof(struct ia64_fpreg) * 6); /* fp scratch regs(12-15) */ - retval |= __copy_to_user(&ppr->fr[12], &sw->f12, sizeof(struct ia64_fpreg) * 4); + retval |= __copy_to_user(&ppr->fr[12], &sw->f12, + sizeof(struct ia64_fpreg) * 4); /* fr16-fr31 */ for (i = 16; i < 32; i++) { - retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 0); - retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 0); + if (unw_get_fr(&info, i, &fpval) < 0) + return -EIO; + retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval)); } /* fph */ ia64_flush_fph(child); - retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph, sizeof(ppr->fr[32]) * 96); + retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph, + sizeof(ppr->fr[32]) * 96); /* preds */ @@ -1118,26 +1229,27 @@ ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* nat bits */ - retval |= access_uarea(child, PT_NAT_BITS, &ppr->nat, 0); + retval |= __put_user(nat_bits, &ppr->nat); ret = retval ? -EIO : 0; return ret; } static long -ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr) +ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr) { + unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0; + struct unw_frame_info info; struct switch_stack *sw; + struct ia64_fpreg fpval; struct pt_regs *pt; - long ret, retval; - struct unw_frame_info info; - char nat = 0; + long ret, retval = 0; int i; - retval = verify_area(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs)); - if (retval != 0) { + memset(&fpval, 0, sizeof(fpval)); + + if (!access_ok(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs))) return -EIO; - } pt = ia64_task_regs(child); sw = (struct switch_stack *) (child->thread.ksp + 16); @@ -1151,27 +1263,25 @@ ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr) return -EIO; } - retval = 0; - /* control regs */ retval |= __get_user(pt->cr_iip, &ppr->cr_iip); - retval |= access_uarea(child, PT_CR_IPSR, &ppr->cr_ipsr, 1); + retval |= __get_user(psr, &ppr->cr_ipsr); /* app regs */ retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]); - retval |= __get_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]); + retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]); retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]); retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]); retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]); retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]); - retval |= access_uarea(child, PT_AR_EC, &ppr->ar[PT_AUR_EC], 1); - retval |= access_uarea(child, PT_AR_LC, &ppr->ar[PT_AUR_LC], 1); - retval |= access_uarea(child, PT_AR_RNAT, &ppr->ar[PT_AUR_RNAT], 1); - retval |= access_uarea(child, PT_AR_BSP, &ppr->ar[PT_AUR_BSP], 1); - retval |= access_uarea(child, PT_CFM, &ppr->cfm, 1); + retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]); + retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]); + retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]); + retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]); + retval |= __get_user(cfm, &ppr->cfm); /* gr1-gr3 */ @@ -1181,11 +1291,10 @@ ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* gr4-gr7 */ for (i = 4; i < 8; i++) { - long ret = unw_get_gr(&info, i, &ppr->gr[i], &nat); - if (ret < 0) { - return ret; - } - retval |= unw_access_gr(&info, i, &ppr->gr[i], &nat, 1); + retval |= __get_user(val, &ppr->gr[i]); + /* NaT bit will be set via PT_NAT_BITS: */ + if (unw_set_gr(&info, i, val, 0) < 0) + return -EIO; } /* gr8-gr11 */ @@ -1209,7 +1318,8 @@ ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* b1-b5 */ for (i = 1; i < 6; i++) { - retval |= unw_access_br(&info, i, &ppr->br[i], 1); + retval |= __get_user(val, &ppr->br[i]); + unw_set_br(&info, i, val); } /* b6-b7 */ @@ -1220,29 +1330,35 @@ ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* fr2-fr5 */ for (i = 2; i < 6; i++) { - retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 1); - retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 1); + retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval)); + if (unw_set_fr(&info, i, fpval) < 0) + return -EIO; } /* fr6-fr11 */ - retval |= __copy_from_user(&pt->f6, &ppr->fr[6], sizeof(ppr->fr[6]) * 6); + retval |= __copy_from_user(&pt->f6, &ppr->fr[6], + sizeof(ppr->fr[6]) * 6); /* fp scratch regs(12-15) */ - retval |= __copy_from_user(&sw->f12, &ppr->fr[12], sizeof(ppr->fr[12]) * 4); + retval |= __copy_from_user(&sw->f12, &ppr->fr[12], + sizeof(ppr->fr[12]) * 4); /* fr16-fr31 */ for (i = 16; i < 32; i++) { - retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 1); - retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 1); + retval |= __copy_from_user(&fpval, &ppr->fr[i], + sizeof(fpval)); + if (unw_set_fr(&info, i, fpval) < 0) + return -EIO; } /* fph */ ia64_sync_fph(child); - retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32], sizeof(ppr->fr[32]) * 96); + retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32], + sizeof(ppr->fr[32]) * 96); /* preds */ @@ -1250,7 +1366,16 @@ ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr) /* nat bits */ - retval |= access_uarea(child, PT_NAT_BITS, &ppr->nat, 1); + retval |= __get_user(nat_bits, &ppr->nat); + + retval |= access_uarea(child, PT_CR_IPSR, &psr, 1); + retval |= access_uarea(child, PT_AR_RSC, &rsc, 1); + retval |= access_uarea(child, PT_AR_EC, &ec, 1); + retval |= access_uarea(child, PT_AR_LC, &lc, 1); + retval |= access_uarea(child, PT_AR_RNAT, &rnat, 1); + retval |= access_uarea(child, PT_AR_BSP, &bsp, 1); + retval |= access_uarea(child, PT_CFM, &cfm, 1); + retval |= access_uarea(child, PT_NAT_BITS, &nat_bits, 1); ret = retval ? -EIO : 0; return ret; @@ -1266,16 +1391,15 @@ ptrace_disable (struct task_struct *child) { struct ia64_psr *child_psr = ia64_psr(ia64_task_regs(child)); - /* make sure the single step/take-branch tra bits are not set: */ + /* make sure the single step/taken-branch trap bits are not set: */ child_psr->ss = 0; child_psr->tb = 0; } asmlinkage long -sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, - long arg4, long arg5, long arg6, long arg7, long stack) +sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data) { - struct pt_regs *pt, *regs = (struct pt_regs *) &stack; + struct pt_regs *pt; unsigned long urbs_end, peek_or_poke; struct task_struct *child; struct switch_stack *sw; @@ -1295,8 +1419,10 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, goto out; } - peek_or_poke = (request == PTRACE_PEEKTEXT || request == PTRACE_PEEKDATA - || request == PTRACE_POKETEXT || request == PTRACE_POKEDATA); + peek_or_poke = (request == PTRACE_PEEKTEXT + || request == PTRACE_PEEKDATA + || request == PTRACE_POKETEXT + || request == PTRACE_POKEDATA); ret = -ESRCH; read_lock(&tasklist_lock); { @@ -1310,6 +1436,9 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, read_unlock(&tasklist_lock); if (!child) goto out; + if (!vx_check(vx_task_xid(child), VX_WATCH|VX_IDENT)) + goto out_tsk; + ret = -EPERM; if (pid == 1) /* no messing around with init! */ goto out_tsk; @@ -1328,31 +1457,37 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, switch (request) { case PTRACE_PEEKTEXT: - case PTRACE_PEEKDATA: /* read word at location addr */ + case PTRACE_PEEKDATA: + /* read word at location addr */ urbs_end = ia64_get_user_rbs_end(child, pt, NULL); ret = ia64_peek(child, sw, urbs_end, addr, &data); if (ret == 0) { ret = data; - regs->r8 = 0; /* ensure "ret" is not mistaken as an error code */ + /* ensure "ret" is not mistaken as an error code: */ + force_successful_syscall_return(); } goto out_tsk; case PTRACE_POKETEXT: - case PTRACE_POKEDATA: /* write the word at location addr */ + case PTRACE_POKEDATA: + /* write the word at location addr */ urbs_end = ia64_get_user_rbs_end(child, pt, NULL); ret = ia64_poke(child, sw, urbs_end, addr, data); goto out_tsk; - case PTRACE_PEEKUSR: /* read the word at addr in the USER area */ + case PTRACE_PEEKUSR: + /* read the word at addr in the USER area */ if (access_uarea(child, addr, &data, 0) < 0) { ret = -EIO; goto out_tsk; } ret = data; - regs->r8 = 0; /* ensure "ret" is not mistaken as an error code */ + /* ensure "ret" is not mistaken as an error code */ + force_successful_syscall_return(); goto out_tsk; - case PTRACE_POKEUSR: /* write the word at addr in the USER area */ + case PTRACE_POKEUSR: + /* write the word at addr in the USER area */ if (access_uarea(child, addr, &data, 1) < 0) { ret = -EIO; goto out_tsk; @@ -1360,18 +1495,22 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, ret = 0; goto out_tsk; - case PTRACE_OLD_GETSIGINFO: /* for backwards-compatibility */ + case PTRACE_OLD_GETSIGINFO: + /* for backwards-compatibility */ ret = ptrace_request(child, PTRACE_GETSIGINFO, addr, data); goto out_tsk; - case PTRACE_OLD_SETSIGINFO: /* for backwards-compatibility */ + case PTRACE_OLD_SETSIGINFO: + /* for backwards-compatibility */ ret = ptrace_request(child, PTRACE_SETSIGINFO, addr, data); goto out_tsk; - case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ - case PTRACE_CONT: /* restart after signal. */ + case PTRACE_SYSCALL: + /* continue and stop at next (return from) syscall */ + case PTRACE_CONT: + /* restart after signal. */ ret = -EIO; - if (data > _NSIG) + if (!valid_signal(data)) goto out_tsk; if (request == PTRACE_SYSCALL) set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); @@ -1379,7 +1518,10 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); child->exit_code = data; - /* make sure the single step/taken-branch trap bits are not set: */ + /* + * Make sure the single step/taken-branch trap bits + * are not set: + */ ia64_psr(pt)->ss = 0; ia64_psr(pt)->tb = 0; @@ -1393,22 +1535,21 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, * sigkill. Perhaps it should be put in the status * that it wants to exit. */ - if (child->state == TASK_ZOMBIE) /* already dead */ + if (child->exit_state == EXIT_ZOMBIE) + /* already dead */ goto out_tsk; child->exit_code = SIGKILL; - /* make sure the single step/take-branch tra bits are not set: */ - ia64_psr(pt)->ss = 0; - ia64_psr(pt)->tb = 0; - + ptrace_disable(child); wake_up_process(child); ret = 0; goto out_tsk; - case PTRACE_SINGLESTEP: /* let child execute for one instruction */ + case PTRACE_SINGLESTEP: + /* let child execute for one instruction */ case PTRACE_SINGLEBLOCK: ret = -EIO; - if (data > _NSIG) + if (!valid_signal(data)) goto out_tsk; clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); @@ -1424,16 +1565,19 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, ret = 0; goto out_tsk; - case PTRACE_DETACH: /* detach a process that was attached. */ + case PTRACE_DETACH: + /* detach a process that was attached. */ ret = ptrace_detach(child, data); goto out_tsk; case PTRACE_GETREGS: - ret = ptrace_getregs(child, (struct pt_all_user_regs*) data); + ret = ptrace_getregs(child, + (struct pt_all_user_regs __user *) data); goto out_tsk; case PTRACE_SETREGS: - ret = ptrace_setregs(child, (struct pt_all_user_regs*) data); + ret = ptrace_setregs(child, + (struct pt_all_user_regs __user *) data); goto out_tsk; default: @@ -1447,9 +1591,8 @@ sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data, return ret; } -/* "asmlinkage" so the input arguments are preserved... */ -asmlinkage void +void syscall_trace (void) { if (!test_thread_flag(TIF_SYSCALL_TRACE)) @@ -1457,18 +1600,62 @@ syscall_trace (void) if (!(current->ptrace & PT_PTRACED)) return; /* - * The 0x80 provides a way for the tracing parent to distinguish between a syscall - * stop and SIGTRAP delivery. + * The 0x80 provides a way for the tracing parent to + * distinguish between a syscall stop and SIGTRAP delivery. */ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0)); + ptrace_notify(SIGTRAP + | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0)); /* - * This isn't the same as continuing with a signal, but it will do for normal use. - * strace only continues with a signal if the stopping signal is not SIGTRAP. - * -brl + * This isn't the same as continuing with a signal, but it + * will do for normal use. strace only continues with a + * signal if the stopping signal is not SIGTRAP. -brl */ if (current->exit_code) { send_sig(current->exit_code, current, 1); current->exit_code = 0; } } + +/* "asmlinkage" so the input arguments are preserved... */ + +asmlinkage void +syscall_trace_enter (long arg0, long arg1, long arg2, long arg3, + long arg4, long arg5, long arg6, long arg7, + struct pt_regs regs) +{ + if (test_thread_flag(TIF_SYSCALL_TRACE) + && (current->ptrace & PT_PTRACED)) + syscall_trace(); + + if (unlikely(current->audit_context)) { + long syscall; + int arch; + + if (IS_IA32_PROCESS(®s)) { + syscall = regs.r1; + arch = AUDIT_ARCH_I386; + } else { + syscall = regs.r15; + arch = AUDIT_ARCH_IA64; + } + + audit_syscall_entry(current, arch, syscall, arg0, arg1, arg2, arg3); + } + +} + +/* "asmlinkage" so the input arguments are preserved... */ + +asmlinkage void +syscall_trace_leave (long arg0, long arg1, long arg2, long arg3, + long arg4, long arg5, long arg6, long arg7, + struct pt_regs regs) +{ + if (unlikely(current->audit_context)) + audit_syscall_exit(current, AUDITSC_RESULT(regs.r10), regs.r8); + + if (test_thread_flag(TIF_SYSCALL_TRACE) + && (current->ptrace & PT_PTRACED)) + syscall_trace(); +}