X-Git-Url: http://git.onelab.eu/?a=blobdiff_plain;f=arch%2Fm68knommu%2FKconfig;h=5f592ec362448f7270f1687f6f899ec9414f29e0;hb=97bf2856c6014879bd04983a3e9dfcdac1e7fe85;hp=1ae18d8b2d827dda5bcf0007b02c3f73bb5c8686;hpb=76828883507a47dae78837ab5dec5a5b4513c667;p=linux-2.6.git diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 1ae18d8b2..5f592ec36 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig @@ -5,7 +5,7 @@ mainmenu "uClinux/68k (w/o MMU) Kernel Configuration" -config M68KNOMMU +config M68K bool default y @@ -25,6 +25,22 @@ config RWSEM_XCHGADD_ALGORITHM bool default n +config ARCH_HAS_ILOG2_U32 + bool + default n + +config ARCH_HAS_ILOG2_U64 + bool + default n + +config GENERIC_FIND_NEXT_BIT + bool + default y + +config GENERIC_HWEIGHT + bool + default y + config GENERIC_CALIBRATE_DELAY bool default y @@ -111,6 +127,11 @@ config M5307 help Motorola ColdFire 5307 processor support. +config M532x + bool "MCF532x" + help + Freescale (Motorola) ColdFire 532x processor support. + config M5407 bool "MCF5407" help @@ -125,125 +146,43 @@ config M527x config COLDFIRE bool - depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M5407) + depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407) default y -choice - prompt "CPU CLOCK Frequency" - default AUTO - -config CLOCK_AUTO - bool "AUTO" - ---help--- - Define the CPU clock frequency in use. On many boards you don't - really need to know, so you can select the AUTO option. On some - boards you need to know the real clock frequency to determine other - system timing (for example baud rate dividors, etc). Some processors - have an internal PLL and you can select a frequency to run at. - You need to know a little about the internals of your processor to - set this. If in doubt choose the AUTO option. - -config CLOCK_11MHz - bool "11MHz" - help - Select a 11MHz CPU clock frequency. - -config CLOCK_16MHz - bool "16MHz" - help - Select a 16MHz CPU clock frequency. - -config CLOCK_20MHz - bool "20MHz" - help - Select a 20MHz CPU clock frequency. - -config CLOCK_24MHz - bool "24MHz" - help - Select a 24MHz CPU clock frequency. - -config CLOCK_25MHz - bool "25MHz" - help - Select a 25MHz CPU clock frequency. - -config CLOCK_33MHz - bool "33MHz" - help - Select a 33MHz CPU clock frequency. - -config CLOCK_40MHz - bool "40MHz" - help - Select a 40MHz CPU clock frequency. - -config CLOCK_45MHz - bool "45MHz" - help - Select a 45MHz CPU clock frequency. - -config CLOCK_48MHz - bool "48MHz" - help - Select a 48MHz CPU clock frequency. - -config CLOCK_50MHz - bool "50MHz" - help - Select a 50MHz CPU clock frequency. - -config CLOCK_54MHz - bool "54MHz" - help - Select a 54MHz CPU clock frequency. - -config CLOCK_60MHz - bool "60MHz" - help - Select a 60MHz CPU clock frequency. - -config CLOCK_62_5MHz - bool "62.5MHz" - help - Select a 62.5MHz CPU clock frequency. - -config CLOCK_64MHz - bool "64MHz" - help - Select a 64MHz CPU clock frequency. - -config CLOCK_66MHz - bool "66MHz" - help - Select a 66MHz CPU clock frequency. - -config CLOCK_70MHz - bool "70MHz" - help - Select a 70MHz CPU clock frequency. - -config CLOCK_100MHz - bool "100MHz" - help - Select a 100MHz CPU clock frequency. - -config CLOCK_140MHz - bool "140MHz" - help - Select a 140MHz CPU clock frequency. - -config CLOCK_150MHz - bool "150MHz" - help - Select a 150MHz CPU clock frequency. - -config CLOCK_166MHz - bool "166MHz" +config CLOCK_SET + bool "Enable setting the CPU clock frequency" + default n help - Select a 166MHz CPU clock frequency. - -endchoice + On some CPU's you do not need to know what the core CPU clock + frequency is. On these you can disable clock setting. On some + traditional 68K parts, and on all ColdFire parts you need to set + the appropriate CPU clock frequency. On these devices many of the + onboard peripherals derive their timing from the master CPU clock + frequency. + +config CLOCK_FREQ + int "Set the core clock frequency" + default "66666666" + depends on CLOCK_SET + help + Define the CPU clock frequency in use. This is the core clock + frequency, it may or may not be the same as the external clock + crystal fitted to your board. Some processors have an internal + PLL and can have their frequency programmed at run time, others + use internal dividers. In general the kernel won't setup a PLL + if it is fitted (there are some exceptions). This value will be + specific to the exact CPU that you are using. + +config CLOCK_DIV + int "Set the core/bus clock divide ratio" + default "1" + depends on CLOCK_SET + help + On many SoC style CPUs the master CPU clock is also used to drive + on-chip peripherals. The clock that is distributed to these + peripherals is sometimes a fixed ratio of the master clock + frequency. If so then set this to the divider ratio of the + master clock to the peripheral clock. If not sure then select 1. config OLDMASK bool "Old mask 5307 (1H55J) silicon" @@ -261,7 +200,7 @@ config PILOT3 Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII. config XCOPILOT_BUGS - bool " (X)Copilot support" + bool "(X)Copilot support" depends on PILOT3 help Support the bugs of Xcopilot. @@ -285,20 +224,20 @@ config DRAGEN2 Support for the DragenEngine II board. config DIRECT_IO_ACCESS - bool " Allow user to access IO directly" + bool "Allow user to access IO directly" depends on (UCSIMM || UCDIMM || DRAGEN2) help Disable the CPU internal registers protection in user mode, to allow a user application to read/write them. config INIT_LCD - bool " Initialize LCD" + bool "Initialize LCD" depends on (UCSIMM || UCDIMM || DRAGEN2) help Initialize the LCD controller of the 68x328 processor. config MEMORY_RESERVE - int " Memory reservation (MiB)" + int "Memory reservation (MiB)" depends on (UCSIMM || UCDIMM) help Reserve certain memory regions on 68x328 based boards. @@ -369,6 +308,12 @@ config COBRA5272 help Support for the senTec COBRA5272 board. +config AVNET5282 + bool "Avnet 5282 board support" + depends on M528x + help + Support for the Avnet 5282 board. + config M5282EVB bool "Motorola M5282EVB board support" depends on M528x @@ -411,6 +356,18 @@ config SECUREEDGEMP3 help Support for the SnapGear SecureEdge/MP3 platform. +config M5329EVB + bool "Freescale (Motorola) M5329EVB board support" + depends on M532x + help + Support for the Freescale (Motorola) M5329EVB board. + +config COBRA5329 + bool "senTec COBRA5329 board support" + depends on M532x + help + Support for the senTec COBRA5329 board. + config M5407C3 bool "Motorola M5407C3 board support" depends on M5407 @@ -460,7 +417,7 @@ config MOD5272 Support for the Netburner MOD-5272 board. config ROMFS_FROM_ROM - bool " ROMFS image not RAM resident" + bool "ROMFS image not RAM resident" depends on (NETtel || SNAPGEAR) help The ROMfs filesystem will stay resident in the FLASH/ROM, not be @@ -479,7 +436,7 @@ config ARNEWSH config FREESCALE bool default y - depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3) + depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3) config HW_FEITH bool @@ -500,6 +457,11 @@ config SNEHA bool default y depends on CPU16B + +config AVNET + bool + default y + depends on (AVNET5282) config LARGE_ALLOCS bool "Allow allocating large blocks (> 1MB) of memory" @@ -518,38 +480,46 @@ config 4KSTACKS running more threads on a system and also reduces the pressure on the VM subsystem for higher order allocations. -choice - prompt "RAM size" - default AUTO - -config RAMAUTO - bool "AUTO" - ---help--- - Configure the RAM size on your platform. Many platforms can auto - detect this, on those choose the AUTO option. Otherwise set the - RAM size you intend using. +comment "RAM configuration" -config RAM4MB - bool "4MiB" +config RAMBASE + hex "Address of the base of RAM" + default "0" help - Set RAM size to be 4MiB. + Define the address that RAM starts at. On many platforms this is + 0, the base of the address space. And this is the default. Some + platforms choose to setup their RAM at other addresses within the + processor address space. -config RAM8MB - bool "8MiB" +config RAMSIZE + hex "Size of RAM (in bytes)" + default "0x400000" help - Set RAM size to be 8MiB. + Define the size of the system RAM. If you select 0 then the + kernel will try to probe the RAM size at runtime. This is not + supported on all CPU types. -config RAM16MB - bool "16MiB" +config VECTORBASE + hex "Address of the base of system vectors" + default "0" help - Set RAM size to be 16MiB. + Define the address of the system vectors. Commonly this is + put at the start of RAM, but it doesn't have to be. On ColdFire + platforms this address is programmed into the VBR register, thus + actually setting the address to use. -config RAM32MB - bool "32MiB" +config KERNELBASE + hex "Address of the base of kernel code" + default "0x400" help - Set RAM size to be 32MiB. - -endchoice + Typically on m68k systems the kernel will not start at the base + of RAM, but usually some small offset from it. Define the start + address of the kernel here. The most common setup will have the + processor vectors at the base of RAM and then the start of the + kernel. On some platforms some RAM is reserved for boot loaders + and the kernel starts after that. The 0x400 default was based on + a system with the RAM based at address 0, and leaving enough room + for the theoretical maximum number of 256 vectors. choice prompt "RAM bus width" @@ -557,7 +527,7 @@ choice config RAMAUTOBIT bool "AUTO" - ---help--- + help Select the physical RAM data bus size. Not needed on most platforms, so you can generally choose AUTO. @@ -578,6 +548,59 @@ config RAM32BIT endchoice +comment "ROM configuration" + +config ROM + bool "Specify ROM linker regions" + default n + help + Define a ROM region for the linker script. This creates a kernel + that can be stored in flash, with possibly the text, and data + regions being copied out to RAM at startup. + +config ROMBASE + hex "Address of the base of ROM device" + default "0" + depends on ROM + help + Define the address that the ROM region starts at. Some platforms + use this to set their chip select region accordingly for the boot + device. + +config ROMVEC + hex "Address of the base of the ROM vectors" + default "0" + depends on ROM + help + This is almost always the same as the base of the ROM. Since on all + 68000 type variants the vectors are at the base of the boot device + on system startup. + +config ROMVECSIZE + hex "Size of ROM vector region (in bytes)" + default "0x400" + depends on ROM + help + Define the size of the vector region in ROM. For most 68000 + variants this would be 0x400 bytes in size. Set to 0 if you do + not want a vector region at the start of the ROM. + +config ROMSTART + hex "Address of the base of system image in ROM" + default "0x400" + depends on ROM + help + Define the start address of the system image in ROM. Commonly this + is strait after the ROM vectors. + +config ROMSIZE + hex "Size of the ROM device" + default "0x100000" + depends on ROM + help + Size of the ROM device. On some platforms this is used to setup + the chip select that controls the boot ROM device. + choice prompt "Kernel executes from" ---help--- @@ -591,7 +614,9 @@ config RAMKERNEL config ROMKERNEL bool "ROM" help - The kernel will be resident in FLASH/ROM when running. + The kernel will be resident in FLASH/ROM when running. This is + often referred to as Execute-in-Place (XIP), since the kernel + code executes from the position it is stored in the FLASH/ROM. endchoice